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VNQ690SP-E
QUAD CHANNEL HIGH SIDE DRIVER
Table 1. General Features
Type VNQ690SP-E RDS(on) 90m (*)
Figure 1. Package
Iout
10A
VCC
36V
(*) Per each channel
s OUTPUT
CURRENT PER CHANNEL: 10A s CMOS COMPATIBLE INPUTS s OPEN LOAD DETECTION (OFF STATE) s UNDERVOLTAGE & OVERVOLTAGE n SHUT- DOWN s OVERVOLTAGE CLAMP s THERMAL SHUT-DOWN s CURRENT LIMITATION s VERY LOW STAND-BY POWER DISSIPATION s PROTECTION AGAINST: n LOSS OF GROUND & LOSS OF VCC s REVERSE BATTERY PROTECTION (**) s IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE
10
1
PowerSO-10TM
DESCRIPTION The VNQ690SP-E is a monolithic device made by using| STMicroelectronics VIPower M0-3 Technology, intended for driving resistive or inductive loads with one side connected to ground. This device has four independent channels. Built-in thermal shut down and output current limitation protect the chip from over temperature and short circuit.
Table 2. Order Codes
Package PowerSO-10TM
Note: (**) See application schematic at page 9
Tube VNQ690SP-E
Tape and Reel VNQ690SPTR-E
Rev. 1 October 2004 1/20
VNQ690SP-E
Figure 2. Block Diagram
VCC
OVERVOLTAGE UNDERVOLTAGE DEMAG 1
DRIVER 1
OUTPUT 1 ILIM1
INPUT 1 INPUT 2 INPUT 3 INPUT 4 STATUS STATUS
DRIVER 4
DEMAG 2
DRIVER 2
OUTPUT 2 ILIM2
LOGIC DEMAG 3
DRIVER 3
OUTPUT 3 ILIM3 DEMAG 4
OVERTEMP. 1 ILIM4 OVERTEMP. 2 OVERTEMP. 3 OVERTEMP. 4 GND OPEN LOAD OFF-STATE
OUTPUT 4
Table 3. Absolute Maximum Ratings
Symbol VCC Parameter Value Unit
Supply voltage (continuous) Reverse supply voltage (continuous) Output current (continuous), per each channel Reverse output current (continuous), per each channel Input current Status current Ground current at TC<25C (continuous) Electrostatic Discharge (Human Body Model: R=1.5K; C=100pF) - INPUT
41 -0.3 Internally limited -15 +/- 10 +/- 10 -200 4000 4000 5000 5000 78 53 -40 to 150 -65 to 150
V V A A mA mA mA V V V V W mJ C C
-VCC IOUT IR IIN ISTAT IGND
VESD
- STATUS - OUTPUT - VCC
Ptot EMAX Tj Tstg
Power dissipation at TC=25C Maximum Switching Energy (L=0.38mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=14A) Junction operating temperature Storage temperature
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VNQ690SP-E
Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins
STATUS INPUT 4 INPUT 3 INPUT 2 INPUT 1
6 7 8 9 10 11 VCC
5 4 3 2 1
GND OUTPUT 4 OUTPUT 3 OUTPUT 2 OUTPUT 1
Connection / Pin Status Floating X To Ground
N.C. X X
Output X
Input X Through 10K resistor
Figure 4. Current and Voltage Conventions
IS IIN1 INPUT 1 VCC OUTPUT 1 VIN1 VIN2 IIN2 INPUT 2 IIN3 INPUT 3 VIN3 IIN4 INPUT 4 VIN4 STATUS VSTAT OUTPUT 4 GND VOUT4 OUTPUT 3 VOUT3 IOUT4 OUTPUT 2 IOUT3 VOUT2 IOUT1 IOUT2
VF1 (*)
VCC VOUT1
ISTAT
IGND
(*) VFn = VCCn - VOUTn during reverse battery condition
Table 4. Thermal Data
Symbol Rthj-case Rtj-amb Parameter Thermal resistance junction-case (MAX) per channel Thermal resistance junction-ambient (MAX) Value 2 52 (1) 37 (2) Unit C/W C/W
Note: 1. When mounted on a standard single-sided FR-4 board with 0.5cm of Cu (at least 35 m thick) Note: 2. When mounted on a standard single-sided FR-4 board with 6cm of Cu (at least 35 m thick).
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VNQ690SP-E
ELECTRICAL CHARACTERISTICS (VCC=6V up to 24V; -40CSymbol VCC (#) Parameter Test Conditions Min. Typ. Max. Unit
Operating supply voltage Undervoltage shutdown Undervoltage hysteresis Overvoltage shutdown Overvoltage hysteresis Off state; VIN=VOUT =0V; VCC=13.5V Off state; VIN=VOUT =0V; VCC=13.5V Tj=25C On state; VIN=3.25V; 9V6 3.5 0.2 36 0.25
13 4.6
36 6 1
V V V V V
VUSD (#) VUVhyst (#) VOV (#) VOVhyst (#)
12 12 6
40 25 12 90 180
A A mA m m A A A A
IS (#)
Supply current
RON IL(off1) IL(off2) IL(off3) IL(off4)
On state resistance Off State Output Current Off State Output Current Off State Output Current Off State Output Current
IOUT=1A; Tj=25C; 9V50 0 5 3
Note: (#) Per device.
Table 6. Protection (see note 1) (per each channel)
Symbol TTSD Parameter Test Conditions Min. Typ. Max. Unit
Shutdown temperature Reset temperature Thermal hysteresis DC Short circuit current Turn-off output voltage clamp Status low output voltage Status leakage current Status pin input capacitance Status clamp voltage 9V150 135 7 10
170
200
C C C A A V V A pF V V
TR Thyst ILIM Vdemag VSTAT ILSTAT CSTAT VSCL
15 14
25 20 20
VCC-41
VCC-48
VCC-55 0.5 10 25
6
6.8 -0.7
8
Note: 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles
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VNQ690SP-E
ELECTRICAL CHARACTERISTICS (continued) Table 7. VCC - Output Diode
Symbol VF Parameter Forward on Voltage Test Conditions -IOUT=0.9A; Tj=150C Min Typ Max 0.6 Unit V
Table 8. Switching (V CC=13V)
Symbol td(on) td(off) Parameter Turn-on delay time Turn-off delay time Test Conditions RL=13 channels 1,2,3,4 RL=13 channels 1,2,3,4 RL=13 channels 1,2,3,4 Min Typ 30 30 See relative diagram See relative diagram Max Unit s s V/s
dVOUT /dt(on) Turn-on voltage slope
dVOUT /dt(off) Turn-off voltage slope
RL=13 channels 1,2,3,4
V/s
Table 9. Openload Detection (off state) per each channel
Symbol tSDL VOL TDOL Parameter Status Delay Openload Voltage Detection Threshold Openload Detection Delay at Turn Off Test Conditions See Figure 1 (Openload detection reading must be performed after TDOL). VIN=0V VCC=18V Min Typ Max 20 1.5 2.5 3.5 300 Unit s V s
Table 10. Logic Input
Symbol VIL VIH VHYST IIH IIL VICL Parameter Input Low Level Voltage Input High Level Voltage Input Hysteresis Voltage Input high level voltage Input Current Input Clamp Voltage Test Conditions Min 3.25 0.5 VIN=3.25V VIN=1.25V IIN=1mA IIN=-1mA 10 1 6 6.8 -0.7 8 Typ Max 1.25 Unit V V V A A V V
Figure 5. Status Timing Waveforms
OPENLOAD STATUS TIMING VIN OVERTEMP STATUS TIMING
VIN
VSTAT VSTAT tDOL tSDL tSDL tSDL
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Table 11. Truth Table (Per each channel)
CONDITIONS Normal Operation INPUT L H L H L H L H L H L H OUTPUT L H L L L L L L L X H H SENSE H H H L X X H H H H L H
Overtemperature
Undervoltage
Overvoltage
Current Limitation
Output Voltage > VOL
Figure 6. Switching Characteristics
VLOAD 90% 80%
dVOUT/dt(on)
dVOUT/dt(off)
10% t VIN
td(on)
tr
td(off)
t
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VNQ690SP-E
Table 12. Electrical Transient Requirements
ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I C C C C C C II C C C C C E III C C C C C E IV C C C C C E I -25 V +25 V -25 V +25 V -4 V II -50 V +50 V -50 V +50 V -5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V Test Levels Result IV -100 V +100 V -150 V +100 V -7 V Delays and Impedance 2 ms 10 0.2 ms 10 0.1 s 50 0.1 s 50 100 ms, 0.01
CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device.
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VNQ690SP-E
Figure 7. Waveforms
NORMAL OPERATION INPUTn LOAD VOLTAGEn STATUS UNDERVOLTAGE VUSDhyst VUSD INPUTn LOAD VOLTAGEn STATUS undefined
VCC
OVERVOLTAGE VCCOPENLOAD with external pull-up INPUTn LOAD VOLTAGEn STATUS tDOL tDOL VOL
VCC>VOV
Tj INPUTn LOAD CURRENTn STATUS
TTSD TR
OVERTEMPERATURE
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VNQ690SP-E
Figure 8. Application Schematic
+5V +5V
Rprot STATUS
VCC
Dld Rprot INPUT1 OUTPUT1 C
Rprot
INPUT2 OUTPUT2
Rprot INPUT3 Rprot INPUT4 GND OUTPUT4 OUTPUT3
RGND VGND
DGND
Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2.
GND PROTECTION REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / (IS(on)max). 2) RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device's datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table.
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VNQ690SP-E
C I/Os PROTECTION:
If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k.
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VNQ690SP-E
Figure 9. Off State Output Current
IL(off1) (A)
3.5 3.25 3 2.75 2.5 2.25 2 1.75 1.5 1.25 1 -50 -25 0 25 50 75 100 125 150 175
Figure 12. High Level Input Current
Iih (A)
5 4.5
Vcc=24V Vout=0V
Vin=3.25V
4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
Figure 10. Input High Level
Vih (V)
4 3.75 3.5 3.25 3 2.75 2.5 2.25 2 -50 -25 0 25 50 75 100 125 150 175
Figure 13. Input Low Level
Vil (V)
2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
Figure 11. Input Clamp Voltage
Vicl (V)
8 7.75
Figure 14. Input Hysteresis Voltage
Vihyst (V)
1.4 1.3
Iin=1mA
7.5 7.25 7
1.2 1.1 1 0.9
6.75 0.8 6.5 6.25 6 -50 -25 0 25 50 75 100 125 150 175 0.7 0.6 0.5 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
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VNQ690SP-E
Figure 15. Overvoltage Shutdown
Vov (V)
50 47.5 45 42.5 40 2.5 37.5 35 32.5 30 -50 -25 0 25 50 75 100 125 150 175 0 -50 -25 0 25 50 75 100 125 150 175 2 1.5 1 0.5
Figure 18. Openload Off State Detection Threshold
Vol (V)
5 4.5
Vin=0V
4 3.5 3
Tc (C)
Tc (C)
Figure 16. Turn-on Voltage Slope
dVout/dt(on) (V/ms)
500 450 400 350 300 250 200 150 100 50 0 -50 -25 0 25 50 75 100 125 150 175
Figure 19. Turn-off Voltage Slope
dVout/dt(off) (V/ms)
600 550
Vcc=13V RI=13Ohm
500 450 400 350 300 250 200 150 100 -50
Vcc=13V RI=13Ohm
-25
0
25
50
75
100
125
150
175
Tc (C)
Tc (C)
Figure 17. ILIM Vs Tcase
Ilim (A)
25 22.5
Figure 20. On State Resistance Vs VCC
Ron (mOhm)
160
Tc= 150C Vcc=13V
140
20 120 17.5 100 15 12.5 10 7.5 5 -50 -25 0 25 50 75 100 125 150 175 80
Iout=1A
Tc= 25C
60
Tc= -40C
40
20 0 5 10 15 20 25 30 35 40
Tc (C)
Vcc (V)
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VNQ690SP-E
Figure 21. On State Resistance Vs Tcase
Ron (mOhm)
160 140 120 100 80 60 40 20 0 -50 -25 0 25 50 75 100 125 150 175
Figure 23. Status Clamp Voltage
Vscl (V)
7.4 7.3
Iout=1A Vcc=9V; 18V & 36V
Istat=1mA
7.2 7.1 7 6.9 6.8 6.7 6.6 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
Figure 22. Status Leakage Current
Ilstat (A)
0.05 0.045
Figure 24. Status Low Output Voltage
Vstat (V)
0.8 0.7
Vstat=5V
0.04 0.035 0.03 0.025 0.02 0.015 0.01 -50 -25 0 25 50 75 100 125 150 175 0.6 0.5 0.4 0.3 0.2 0.1 0 -50
Istat=1.6mA
-25
0
25
50
75
100
125
150
175
Tc (C)
Tc (C)
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VNQ690SP-E
Figure 25. Maximum turn off current versus load inductance
ILMAX (A) 100
10
A B C
1 0.01
0.1
1 L(mH)
10
100
A = Single Pulse at TJstart=150C B= Repetitive pulse at T Jstart=100C C= Repetitive Pulse at T Jstart=125C Conditions: VCC=13.5V
Values are generated with R L=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C.
VIN, IL Demagnetization Demagnetization Demagnetization
t
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VNQ690SP-E
PowerSO-10TM Thermal Data Figure 26. PowerSO-10TM PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: from minimum pad lay-out to 8cm2).
Figure 27. Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb (C/W)
55
Tj-Tamb=50C
50 45 40 35 30
0 2 4 6 8 10
PCB Cu heatsink area (cm^2)
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VNQ690SP-E
Figure 28. PowerSO-10 Thermal Impedance Junction Ambient Single Pulse
ZTH (C/W) 1000
100
Footprint 6 cm2
10
1
0.1
0.01 0.0001 0.001 0.01 0.1 1 Time (s) 10 100 1000
Figure 29. Thermal fitting model of a double channel HSD in PowerSO-10
Pulse calculation formula
Z TH = R TH + Z THtp ( 1 - )
where
= tp T
Table 13. Thermal Parameter
Tj_1
Pd1 C1 C2 C1 C2 C3 C4 C5 C6
R1
R2
R3
R4
R5
R6
Tj_2
R1 Pd2
R2
T_amb
Area/island (cm2) R1 (C/W) R2 (C/W) R3( C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C)
Footprint 0.05 0.3 0.3 0.8 12 37 0.001 5.00E-03 0.02 0.3 0.75 3
6
22
5
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VNQ690SP-E
PACKAGE MECHANICAL Table 14. PowerSO-10TM Mechanical Data
Symbol A A (*) A1 B B (*) C C (*) D D1 E E2 E2 (*) E4 E4 (*) e F F (*) H H (*) h L L (*) a (*)
Note: (*) Muar only POA P013P
millimeters Min 3.35 3.4 0.00 0.40 0.37 0.35 0.23 9.40 7.40 9.30 7.20 7.30 5.90 5.90 1.27 1.25 1.20 13.80 13.85 0.50 1.20 0.80 0 2 1.80 1.10 8 8 1.35 1.40 14.40 14.35 Typ Max 3.65 3.6 0.10 0.60 0.53 0.55 0.32 9.60 7.60 9.50 7.60 7.50 6.10 6.30
Figure 30. PowerSO-10TM Package Dimensions
B
0.10 A B
10
H
E
E2
E4
1
SEATING PLANE e
0.25
B
DETAIL "A"
A
C D = D1 = = = SEATING PLANE
h
A F A1
A1
L DETAIL "A"
P095A
17/20
VNQ690SP-E
Figure 31. PowerSO-10TM Suggested Pad Layout And Tube Shipment (No Suffix)
14.6 - 14.9 10.8 - 11 6.30
A A C C
CASABLANCA
B
MUAR
0.67 - 0.73 1 2 3 4 5 10 9 8 7 6 0.54 - 0.6
B
9.5
All dimensions are in mm.
1.27
Base Q.ty Bulk Q.ty Tube length ( 0.5) Casablanca Muar 50 50 1000 1000 532 532
A
B
C ( 0.1) 0.8 0.8
10.4 16.4 4.9 17.2
Figure 32. Tape And Reel Shipment (suffix "TR") REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 600 600 330 1.5 13 20.2 24.4 60 30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 24 4 24 1.5 1.5 11.5 6.5 2
End
All dimensions are in mm.
Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components
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VNQ690SP-E
REVISION HISTORY
Date Oct. 2004 Revision 1 - First Issue. Description of Changes
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VNQ690SP-E
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
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