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Genesys Logic, Inc. GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller Datasheet Revision 1.02 Dec. 28, 2006 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller Copyright: Copyright (c) 2006 Genesys Logic Incorporated. All rights reserved. No part of the materials may be reproduced in any form or by any means without prior written consent of Genesys Logic Inc. Disclaimer: ALL MATERIALS ARE PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NO LICENSE OR RIGHT IS GRANTED UNDER ANY PATENT OR TRADEMARK OF GENESYS LOGIC INC.. GENESYS LOGIC HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS IN REGARD TO MATERIALS, INCLUDING ALL WARRANTIES, IMPLIED OR EXPRESS, OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF INTELLECTUAL PROPERTY, INCLUDING, WITHOUT LIMITATION, THE X-D PICTURE CARDTM LICENSE. IN NO EVENT SHALL GENESYS LOGIC BE LIABLE FOR ANY DAMAGES INCLUDING, WITHOUT LIMITATION, DAMAGES RESULTING FROM LOSS OF INFORMATION OR PROFITS. PLEASE BE ADVISED THAT THE MATERIALS MAY CONTAIN ERRORS OR OMMISIONS. GENESYS LOGIC MAY MAKE CHANGES TO THE MATERIALS OR TO THE PRODUCTS DESCRIBED THEREIN AT ANY TIME WITHOUT NOTICE. Trademarks: is a registered trademark of Genesys Logic, Inc. All trademarks are the properties of their respective owners. Office: Genesys Logic, Inc. 12F, No. 205, Sec. 3, Beishin Rd., Shindian City, Taipei, Taiwan Tel: (886-2) 8913-1888 Fax: (886-2) 6629-6168 http://www.genesyslogic.com (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 2 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller Revision History Revision 1.00 1.01 1.02 Date 2006/10/11 2006/11/01 2006/12/28 First formal release Remove xD/MS/SM card description Delete ISP function Description (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 3 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller TABLE OF CONTENTS CHAPTER 1 GENERAL DESCRIPTION................................................... 7 CHAPTER 2 FEATURES .............................................................................. 8 CHAPTER 3 PIN ASSIGNMENT ................................................................ 9 3.1 PINOUT ....................................................................................................... 9 3.2 PIN LIST.................................................................................................... 10 3.3 PIN DESCRIPTIONS ................................................................................... 11 CHAPTER 4 BLOCK DIAGRAM.............................................................. 13 CHAPTER 5 FUNCTION DESCRIPTION ............................................... 14 CHAPTER 6 ELECTRICAL CHARACTERISTICS............................... 15 6.1 ABSOLUTE MAXIMUM RATINGS.............................................................. 15 6.2 OPERATING CONDITIONS......................................................................... 15 6.3 DC CHARACTERISTICS ............................................................................ 15 6.4 PMOS CHARACTERISTICS ...................................................................... 16 6.5 5V TO 3.3 V REGULATOR CHARACTERISTICS ........................................ 17 6.6 AC CHARACTERISTICS ............................................................................ 17 6.6.1 UTMI Transceiver .......................................................................... 17 6.6.2 Secure Digital / MultiMediaCard.................................................. 17 6.6.3 Reset Timing.................................................................................... 18 6.6.4 EEPROM 93C46 Timing................................................................ 19 CHAPTER 7 PACKAGE DIMENSION..................................................... 21 CHAPTER 8 ORDERING INFORMATION ............................................ 23 (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 4 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller LIST OF FIGURES FIGURE 3.2 - 48 PIN LQFP/LQFN PINOUT DIAGRAM ....................................................... 9 FIGURE 4.1 - BLOCK DIAGRAM ......................................................................................... 13 FIGURE 6.1 - EMBEDDED PMOS SWITCH ARCHITECTURE.............................................. 16 FIGURE 6.2 - V-I CURVE OF PMOS SWITCH @ 25 C ..................................................... 16 FIGURE 6.4 - TIMING DIAGRAM OF SECURE DIGITAL / MULTIMEDIACARD .................. 17 FIGURE 6.5 - TIMING DIAGRAM OF RESET WIDTH ........................................................... 18 FIGURE 6.6 - TIMING DIAGRAM OF POWER GOOD TO USB COMMAND RECEIVE READY 18 FIGURE 6.7 - TIMING DIAGRAM OF EEPROM 93C46 ..................................................... 19 FIGURE 7.1 - GL828 48 PIN LQFP PACKAGE................................................................... 21 FIGURE 7.2 - GL828 48 PIN LQFN PACKAGE .................................................................. 22 (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 5 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller LIST OF TABLES TABLE 3.1 - 48 PIN LIST .................................................................................................... 10 TABLE 3.2 - PIN DESCRIPTIONS ......................................................................................... 11 TABLE 6.1 - ABSOLUTE MAXIMUM RATINGS.................................................................... 15 TABLE 6.2 - OPERATING CONDITIONS .............................................................................. 15 TABLE 6.3 - DC CHARACTERISTICS .................................................................................. 15 TABLE 6.4 - PMOS DRIVING STRENGTH VERSUS JUNCTION TEMPERATURE ................. 16 TABLE 6.5 - REGULATOR OUTPUT CURRENT................................................................... 17 TABLE 8.1 - ORDERING INFORMATION ............................................................................. 23 (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 6 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller CHAPTER 1 GENERAL DESCRIPTION The GL828 is USB 2.0 Single Interface Flash Card Reader controller. It supports USB 2.0 high-speed TM TM transmission to Secure Digital (SD), Mini SDTM, Micro SDTM , T-Flash , MultiMediaCard (MMC), RS TM MultiMediaCard (RS MMC), MMC Micro, HS-MMC, MMC-Mobile, on one chip. As a single chip solution for USB 2.0 flash card reader, the GL828 complies with Universal Serial Bus specification rev. 2.0, USB Storage Class specification ver.1.0, and flash card interface specification each. The GL828 can support SD/MMC card interface in single slot. For the best performance consideration, the GL828 integrates high efficiency card interface hardware engine for data transfer. The GL828 pin assignment design fits to card sockets to provide easier PCB layout. Package types are 48 Pin LQFP/LQFN (7mm x 7mm), the GL828 can fit your various design in standalone and PC embedded, MFP, TV ... with USB 2.0 with SD/MMC single interface flash card reader/ writer applications. (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 7 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller CHAPTER 2 FEATURES USB specification compliance - Comply with 480Mbps Universal Serial Bus specification rev. 2.0. - Comply with USB Storage Class specification rev. 1.0. Support 1 device address and up to 4 endpoints: Control (0)/ Bulk Read (1)/ Bulk Write (2)/Interrupt (3). Integrated USB building blocks - USB2.0 transceiver macro (UTM), Serial Interface Engine (SIE), Build-in power-on reset (POR) and low-voltage detector (LVD) Embedded 8051 micro-controller - Operate @ 60 MHz clock, 12 clocks per instruction cycle - Embedded 48K Byte mask ROM and internal 256 byte SRAM - Embedded 4K Byte external SRAM - Support up to external 48K code ROM Secure Digital and MultiMediaCard - Supports SD specification v1.0 / v1.1 / v2.0 - Supports MMC specification v3.X / v4.0 / v4.1 / v4.2. - x1 / x4 / x8 data transmission. - Automatic CRC7 generation for command and CRC7 verification for response on CMD - Support automatic CRC16 generation and verification on DAT0:7 In addition to full packet transaction, optional single byte / bit operation on both CMD and DAT line / lines TM TM - Process data in block or byte On board 12 MHz Crystal driver circuit or 12/48 MHz Clock input. On-Chip 5V to 3.3V regulator. No external regulator required. On-Chip power MOSFETs for supplying flash media card power. Available in 48 Pin LQFP/LQFN (7x7 mm) package (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 8 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller CHAPTER 3 PIN ASSIGNMENT 3.1 Pinout Figure 3.2 - 48 Pin LQFP/LQFN Pinout Diagram (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 9 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller 3.2 Pin List Table 3.1 - 48 Pin List Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 GL828 Pin name N/C N/C SD_WPZ VDD18O GND AVDD DM DP GND RREF AVDD GND X1 X2 DVDD GND Type B/I, pu Power Power Power A A Power A Power Power OSC OSC Power Power Pin# 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 GL828 Pin name TEST_MOD EXTRSTZ SK CS DO DI SD_CDZ N/C VP5 DVDD GND D4 D3 D5 GPIO0 D6 Type Pin# I, pd I, pu 33 34 GL828 Pin name N/C GND DVDD PMOSO D2 D7 SD_CLK D0 SD_CMD N/C D1 N/C N/C GPIO3 GPIO2 GPIO1 Type Power Power PMOS B/I, f B/I, f B/I, f B/I, f B/I, f B/I, f B/I, pd B/I, pd B/I, pd B/I, pd 35 B/I, pd 36 B/I, pd 37 B/I, pd 38 B/I, pd 39 Power Power Power B/I, f B/I, f B/I, f 40 41 42 43 44 45 46 B/I, pd 47 B/I, f 48 (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 10 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller 3.3 Pin Descriptions Table 3.2 - Pin Descriptions Pin name VDD18O GND AVDD DM DP RREF X1 X2 DVDD GND VP5 PMOSO TEST_MOD EXTRSTZ SD_CDZ D0~D7 SD_CLK SD_WPZ SD_CMD GPIO0~3 SK CS DO DI GL828 LQFP48 Pin 4 5,9,12 6,11 7 8 10 13 14 15,26,35 16,27,34 25 36 17 18 23 40,43,37,29,28, 30,32,38 39 3 41 41,48,47,46 19 20 21 22 Type P P P A A A OSC OSC P P P PMOS I, pd I, pu B/I, pd B/I, f B/I, f B/I, pu B/I, f B/I, pd B/I, pd B/I, pd B/I, pd B/I, pd Internal regulator 1.8V output Analog ground Analog power USB DUSB D+ Reference resistor 12MHz/48MHz input. This pin can be connected to one terminal of crystal or external 12MHz/48MHz clock source. 12MHz/48MHz output. This is another terminal of the crystal or NC when using an external 12MHz/48MHz clock source is used to drive PLL. Digital power 3.3V Digital ground Regulator 5V Input Power MOS 3.3V Output Test mode selection External reset. It is active low. The low pulse should be 1 us width at least. SD& MMC Card detection. Normal High, active low. SD data 0~3 MMC data 0~7 SD/MMC CLK SD Write Protect Detection. When no card is inserted, pull low. When SM or SD card is inserted, the pin is pull up and active low. SD/MMC CMD GPIO0~3 / GPIO3 : Power LED 93C46 Clock 93C46 CS 93C46 Data out 93C46 Data in / Access LED Description Notation: Type A B B/I B/O I Analog Bi-directional Bi-directional, default input Bi-directional, default output Input (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 11 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller O OSC P f pd pu Output Oscillator Power / Ground Internal floating Internal pull down Internal pull up (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 12 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller CHAPTER 4 BLOCK DIAGRAM Figure 4.1 - Block Diagram (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 13 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller CHAPTER 5 FUNCTION DESCRIPTION UTM The USB 2.0 Transceiver Macrocell is the analog circuitry that handles the low level USB protocol and signaling, and shifts the clock domain of the data from the USB 2.0 rate to one that is compatible with the general logic. SIE The Serial Interface Engine, which contains the USB PID and address recognition logic, and other sequencing and state machine logic to handle USB packets and transactions. EPFIFO Endpoint FIFO includes Control FIFO (FIFO0), interrupt FIFO (FIFO3), Bulk In/Out FIFO (BULKFIFO) Control FIFO FIFO of control endpoint 0. It is 64-byte FIFO, and it is used for endpoint 0 data transfer. Interrupt FIFO 64-byte depth FIFO of endpoint 3 for status interrupt Bulk In/Out FIFO It can be in the TX mode or RX mode: 1. It contains ping-pong FIFO (512 bytes each bank) for transmit/receive data continuously. 2. It can be directly accessed by Uc MHE It contains 1 MIF (Media Interface) MIF SD / MMC Remote wakeup Support Card insert wakeup while suspend. External reset circuit Non-inverting, Schmitt input with weak pull-up using DVDD power. CLOCK Source Selection It selects 12/48 MHz input by exterior pull resistor. (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 14 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller CHAPTER 6 ELECTRICAL CHARACTERISTICS 6.1 Absolute Maximum Ratings Table 6.1 - Absolute Maximum Ratings Parameter Storage Temperature Ambient Temperature Supply Voltage to Ground Potential DC Input Voltage to Any Pin Value -65C to +150 C -40C to +80 C -0.5V to +4.0V -0.5V to +5.8V 6.2 Operating Conditions Table 6.2 - Operating Conditions Parameter Ta (Ambient Temperature Under Bias) Supply Voltage Ground Voltage FOSC (Oscillator or Crystal Frequency) Value 0C to 70C +3.0V to +3.6V 0V 12 MHz 0.05% 12 MHz 0.25% (for USB full-speed only) 6.3 DC Characteristics Table 6.3 - DC Characteristics Symbol VREG VCC VIH VIL II VOH VOL IOH IOL CIN ISUSP ICC Parameter Regulation Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Input Leakage current Output High Voltage Output Low Voltage Output Current High Output Current Low Input Pin Capacitance Suspend current Supply current 1.5K external pull-up included Connect to USB with 8051 operating VDD=3.3V VOH=2.4V VDD=3.3V VOL=0.4V 0 < VIN < VCC Condition Min. 4.5 3.0 2.0 -0.3 -10 2.4 10 Typ. 8 8 5 Max. 5.5 3.6 3.6 0.8 10 0.4 450 60 Unit V V V V A V V mA mA pF A mA (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 15 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller 6.4 PMOS Characteristics Table 6.4 - PMOS Driving Strength versus Junction Temperature (Core Power=1.8V, IO Power=3.3V) Junction Temperature 25 C 80 C 0 C Driving Strength (mA) 186.2 10% 153.5 10% 212.7 10% On-Resistance (ohm) 1.61 10% 1.951 10% 1.421 10% Note: 1. Driving strength is defined as the PMOS sinking current when Vio=3.3V, Vd=3.1V. 2. On-resistance is calculated by 0.2V divided by driving strength. Figure 6.1 - Embedded PMOS Switch Architecture Figure 6.2 - V-I Curve of PMOS Switch @ 25 C (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 16 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller 6.5 5V to 3.3 V Regulator Characteristics Table 6.5 - Regulator Output Current Parameters Iq Io_max Vo_0mA Vo_200mA Description Quiescent current Output driving capability V33 voltage without loading V33 voltage with 200mA load Test Conditions no loading Vout > 2.9V Min. 10 200 3.0 2.9 Type. 18 500 3.4 3.34 Max. 25 600 3.57 3.52 Units uA mA V V 6.6 AC Characteristics 6.6.1 UTMI Transceiver The GL828 is fully compatible with Universal Serial Bus specification rev. 2.0 and USB 2.0 Transceiver Macercell Interface (UTMI) specification rev. 1.01. Please refer to the specifications for more information. 6.6.2 Secure Digital / MultiMediaCard fPP tWL tWH Clock tTHL tISU tTLH tIH Input tODLY Output Figure 6.4 - Timing Diagram of Secure Digital / MultiMediaCard (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 17 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller SD Interface Timing (CL = 30PF) SYMBOL fPP fOD tWL tWH tTLH tTHL tISU tIH tODLY PARAMETER Clock frequency Data Transfer Mode Clock frequency Identification Mode Clock low time (min) Clock high time (min) Clock rise time (max) Clock fall time (max) Input set-up time (min) Input hold time (min) Output delay time (max) 48 375 7.4 7.4 3 3 6.6 6.6 2 CLOCK RATE 20 375 22 22 3 3 19.8 19.8 2 15 375 30 30 3 3 27 27 2 6 375 80 80 3 3 72 72 2 UNIT MHz KHz ns ns ns ns ns ns ns 6.6.3 Reset Timing Trst EXTRSTZ Figure 6.5 - Timing Diagram of Reset width Figure 6.6 - Timing Diagram of Power Good to USB command receive ready (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 18 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller Parameter Trst T1 T2 Description Chip reset sense timing width External reset valid from power up to high Reset Deassertion to respond USB command ready Min 2 1.03 72 Typ Max Unit us ms ms 6.6.4 EEPROM 93C46 Timing Figure 6.7 - Timing Diagram of EEPROM 93C46 AC Characteristics of 93C46 Interface (with CLOAD = 15 pF) PARAMETER fSK tWH tWL tTLH tTHL tCSS DESCRIPTION SK clock frequency SK H pulse length SK L pulse length SK rise time SK fall time CS setup time MINIMUM 200k 500 500 1 MAXIMUM 400k 5 10 10 UNIT Hz ns ns ns ns s (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 19 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller tCSH tISU tIH tOSU tOH CS hold time DI setup time DI hold time DO setup time DO hold time 1 1 1 5 5 s s s ns ns (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 20 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller CHAPTER 7 PACKAGE DIMENSION Figure 7.1 - GL828 48 Pin LQFP Package (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 21 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller Figure 7.2 - GL828 48 Pin LQFN Package (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 22 GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller CHAPTER 8 ORDERING INFORMATION Table 8.1 - Ordering Information Part Number GL828-MNG GL828-PNG Package 48-pin LQFP 48-pin LQFN Normal/Green Green Package Green Package Version XX XX Status Available Available (c)2000-2006 Genesys Logic Inc. - All rights reserved. Page 23 |
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