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PD - 95662 IRFP17N50LPBF HEXFET(R) Power MOSFET Applications * Zero Voltage Switching SMPS VDSS RDS(on) typ. Trr typ. ID * Telecom and Server Power Supplies * Uninterruptible Power Supplies 0.28 500V 170ns 16A * Motor Control applications * Lead-Free Features and Benefits * SuperFast body diode eliminates the need for external diodes in ZVS applications. * Lower Gate charge results in simpler drive requirements. * Enhanced dv/dt capabilities offer improved ruggedness. * Higher Gate voltage threshold offers improved noise TO-247AC immunity. Absolute Maximum Ratings Parameter ID @ TC = 25C Continuous Drain Current, VGS @ 10V ID @ TC = 100C Continuous Drain Current, VGS @ 10V IDM Pulsed Drain Current Max. 16 11 64 220 1.8 30 13 -55 to + 150 W W/C V V/ns C 300 (1.6mm from case ) 10lbxin (1.1Nxm) A Units SMPS MOSFET PD @TC = 25C Power Dissipation VGS dv/dt TJ TSTG Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and e Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw Diode Characteristics Symbol IS ISM VSD trr Qrr IRRM ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time Min. Typ. Max. Units --- --- --- --- --- --- --- --- --- --- --- 170 220 470 7.3 16 A 64 1.5 250 330 710 11 nC A V ns Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 16A, VGS = 0V TJ = 25C, IF = 16A TJ = 125C, di/dt = 100A/s TJ = 125C, di/dt = 100A/s TJ = 25C f f f f TJ = 25C, IS = 16A, VGS = 0V 810 1210 Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com 1 07/30/04 IRFP17N50LPBF Static @ TJ = 25C (unless otherwise specified) Symbol V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) IDSS IGSS RG Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance Min. Typ. Max. Units 500 --- --- 3.0 --- --- --- --- --- --- 0.60 0.28 --- --- --- --- --- 1.4 --- --- 0.32 5.0 50 2.0 100 -100 --- V V A mA nA Conditions VGS = 0V, ID = 250A VGS = 10V, ID = 9.9A V/C Reference to 25C, I D = 1mA f VDS = VGS, ID = 250A VDS = 500V, VGS = 0V VDS = 400V, VGS = 0V, TJ = 125C VGS = 30V VGS = -30V f = 1MHz, open drain Dynamic @ TJ = 25C (unless otherwise specified) Symbol gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Coss eff. (ER) Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Effective Output Capacitance (Energy Related) Min. Typ. Max. Units 11 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 21 51 50 28 2760 325 37 3690 84 159 120 --- 130 33 59 --- --- --- --- --- --- --- --- --- --- --- pF ns nC S ID = 16A Conditions VDS = 50V, ID = 9.9A VDS = 400V VGS = 10V, See Fig. 7 & 15 VDD = 250V ID = 16A RG = 7.5 VGS = 10V, See Fig. 14a & 14b VGS = 0V VDS = 25V = 1.0MHz, See Fig. 5 VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 400V, = 1.0MHz VGS = 0V,VDS = 0V to 400V f f g Avalanche Characteristics Symbol EAS IAR EAR Parameter Single Pulse Avalanche Energyd Avalanche CurrentA Repetitive Avalanche Energy Typ. --- --- --- Max. 390 16 22 Units mJ A mJ Thermal Resistance Symbol RJC RCS RJA Parameter Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Typ. --- 0.50 --- Max. 0.56 --- 62 Units C/W Notes: Repetitive rating; pulse width limited by max. junction temperature. (See Fig. 11) Starting TJ = 25C, L = 3.0mH, RG = 25, IAS = 16A. (See Figure 12). ISD = 16A, di/dt 347A/s, VDD V(BR)DSS, TJ 150C. Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . Coss eff.(ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 to 80% VDSS. 2 www.irf.com IRFP17N50LPBF 100 VGS TOP 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 100 VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP ID, Drain-to-Source Current (A) 10 ID, Drain-to-Source Current (A) 10 1 5.0V 5.0V 0.1 1 20s PULSE WIDTH Tj = 25C 0.01 0.1 1 10 100 0.1 0.1 1 20s PULSE WIDTH Tj = 150C 10 100 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics I D , Drain-to-Source Current (A) TJ = 150 C RDS(on) , Drain-to-Source On Resistance (Normalized) 100 3.0 ID = 16A 2.5 10 2.0 TJ = 25 C 1.5 1 1.0 0.5 0.1 4.0 V DS = 50V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0 10.0 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRFP17N50LPBF 100000 20 VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds 10000 15 C, Capacitance(pF) Ciss 1000 Energy (J) 10 Coss 100 5 Crss 10 1 10 100 1000 0 0 100 200 300 400 500 600 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typ. Output Capacitance Stored Energy vs. VDS 20 ID = 16A V DS= 400V V DS= 250V V DS= 100V 100 VGS , Gate-to-Source Voltage (V) ISD , Reverse Drain Current (A) 16 TJ = 150 C 10 12 TJ = 25 C 1 8 4 0 0 30 60 90 120 150 0.1 0.2 V GS = 0 V 0.6 0.9 1.3 1.6 QG , Total Gate Charge (nC) VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 8. Typical Source-Drain Diode Forward Voltage 4 www.irf.com IRFP17N50LPBF 20 VDS V GS RD 16 ID , Drain Current (A) RG 10V Pulse Width 1 s Duty Factor 0.1 % D.U.T. + - VDD 12 8 Fig 10a. Switching Time Test Circuit 4 VDS 90% 0 25 50 75 100 125 150 TC , Case Temperature ( C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms 1 Thermal Response(Z thJC ) D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D =t 1 / t 2 2. Peak TJ = P DM x ZthJC + TC 0.01 0.001 0.00001 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFP17N50LPBF EAS , Single Pulse Avalanche Energy (mJ) 1000 800 OPERATION IN THIS AREA LIMITED BY RDS(on) 640 ID 7A 10A BOTTOM 16A TOP ID , Drain Current (A) 100 10us 10 100us 1ms 1 10ms 480 320 160 0.1 TC = 25 C TJ = 150 C Single Pulse 10 100 1000 10000 0 25 50 75 100 125 150 VDS , Drain-to-Source Voltage (V) Starting T J , Junction Temperature ( C) Fig 12. Maximum Safe Operating Area Fig 13. Maximum Avalanche Energy vs. Drain Current 15V V(BR)DSS VDS L DRIVER tp RG 20V D.U.T IAS tp + V - DD A 0.01 I AS Fig 14a. Unclamped Inductive Test Circuit Current Regulator Same Type as D.U.T. Fig 14b. Unclamped Inductive Waveforms 50K 12V .2F .3F QG VGS D.U.T. + V - DS QGS VG QGD VGS 3mA IG ID Current Sampling Resistors Charge Fig 15a. Gate Charge Test Circuit Fig 15b. Basic Gate Charge Waveform 6 www.irf.com IRFP17N50LPBF Peak Diode Recovery dv/dt Test Circuit D.U.T + + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer - + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 16. For N-Channel HEXFET(R) Power MOSFETs www.irf.com 7 IRFP17N50LPBF TO-247AC Package Outline Dimensions are shown in millimeters (inches) TO-247AC Part Marking Information EXAMPLE: T HIS IS AN IRFPE30 WITH AS SEMBLY LOT CODE 5657 ASSEMBLED ON WW 35, 2000 IN THE ASSEMBLY LINE "H" Note: "P" in assembly line position indicates "Lead-Free" PART NUMBER INT ERNATIONAL RECTIF IER LOGO AS SEMBLY LOT CODE IRFPE30 56 035H 57 DATE CODE YEAR 0 = 2000 WEEK 35 LINE H Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.07/04 8 www.irf.com |
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