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| MCP601/1R/2/3/4 2.7V to 6.0V Single Supply CMOS Op Amps Features * * * * * * * * Single-Supply: 2.7V to 6.0V Rail-to-Rail Output Input Range Includes Ground Gain Bandwidth Product: 2.8 MHz (typical) Unity-Gain Stable Low Quiescent Current: 230 A/amplifier (typical) Chip Select (CS): MCP603 only Temperature Ranges: - Industrial: -40C to +85C - Extended: -40C to +125C * Available in Single, Dual, and Quad Description The Microchip Technology Inc. MCP601/1R/2/3/4 family of low-power operational amplifiers (op amps) are offered in single (MCP601), single with Chip Select (CS) (MCP603), dual (MCP602), and quad (MCP604) configurations. These op amps utilize an advanced CMOS technology that provides low bias current, highspeed operation, high open-loop gain, and rail-to-rail output swing. This product offering operates with a single supply voltage that can be as low as 2.7V, while drawing 230 A (typical) of quiescent current per amplifier. In addition, the common mode input voltage range goes 0.3V below ground, making these amplifiers ideal for single-supply operation. These devices are appropriate for low power, battery operated circuits due to the low quiescent current, for A/D convert driver amplifiers because of their wide bandwidth or for anti-aliasing filters by virtue of their low input bias current. The MCP601, MCP602, and MCP603 are available in standard 8-lead PDIP, SOIC, and TSSOP packages. The MCP601 and MCP601R are also available in a standard 5-lead SOT-23 package, while the MCP603 is available in a standard 6-lead SOT-23 package. The MCP604 is offered in standard 14-lead PDIP, SOIC, and TSSOP packages. The MCP601/1R/2/3/4 family is available in the Industrial and Extended temperature ranges and has a power supply range of 2.7V to 6.0V. Typical Applications * * * * * * * Portable Equipment A/D Converter Driver Photo Diode Pre-amp Analog Filters Data Acquisition Notebooks and PDAs Sensor Interface Available Tools * * * * * * SPICE Macro Models FilterLab(R) Software MindiTM Simulation Tool MAPS (Microchip Advanced Part Selector) Analog Demonstration and Evaluation Boards Application Notes Package Types MCP601 PDIP, SOIC, TSSOP NC 1 VIN- 2 VIN+ 3 VSS 4 8 NC 7 VDD 6 VOUT 5 NC MCP602 PDIP, SOIC, TSSOP VOUTA 1 VINA- 2 VINA+ 3 VSS 4 8 VDD 7 VOUTB 6 VINB- 5 VINB+ MCP603 PDIP, SOIC, TSSOP NC 1 VIN- 2 VIN+ 3 VSS 4 8 CS 7 VDD 6 VOUT 5 NC MCP604 PDIP, SOIC, TSSOP VOUTA 1 VINA- 2 VINA+ 3 VDD 4 VINB+ 5 VINB- 6 VOUTB 7 14 VOUTD 13 VIND- 12 VIND+ 11 VSS 10 VINC+ 9 VINC- 8 VOUTC MCP601 SOT23-5 VOUT 1 VSS 2 VIN+ 3 4 VIN- 5 VDD VOUT 1 VDD 2 VIN+ 3 MCP601R SOT23-5 5 VSS 4 VIN- VOUT 1 VSS 2 VIN+ 3 MCP603 SOT23-6 6 VDD 5 CS 4 VIN- (c) 2007 Microchip Technology Inc. DS21314G-page 1 MCP601/1R/2/3/4 1.0 ELECTRICAL CHARACTERISTICS Notice: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. See Section 4.1.2 "Input Voltage and Current Limits". Absolute Maximum Ratings VDD - VSS ........................................................................7.0V Current at Input Pins .....................................................2 mA Analog Inputs (VIN+, VIN-) ........ VSS - 1.0V to VDD + 1.0V All Other Inputs and Outputs ......... VSS - 0.3V to VDD + 0.3V Difference Input Voltage ...................................... |VDD - VSS| Output Short Circuit Current .................................Continuous Current at Output and Supply Pins ............................30 mA Storage Temperature....................................-65C to +150C Maximum Junction Temperature (TJ) ......................... .+150C ESD Protection On All Pins (HBM; MM) .............. 3 kV; 200V DC CHARACTERISTICS Electrical Specifications: Unless otherwise specified, TA = +25C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, and RL = 100 k to VL, and CS is tied low. (Refer to Figure 1-2 and Figure 1-3). Parameters Input Offset Input Offset Voltage Industrial Temperature Extended Temperature Input Offset Temperature Drift Power Supply Rejection Input Current and Impedance Input Bias Current Industrial Temperature Extended Temperature Input Offset Current Common Mode Input Impedance Differential Input Impedance Common Mode Common Mode Input Range Common Mode Rejection Ratio Open-loop Gain DC Open-loop Gain (large signal) Sym VOS VOS VOS VOS/TA PSRR IB IB IB IOS ZCM ZDIFF VCMR CMRR AOL AOL Output Maximum Output Voltage Swing Linear Output Voltage Swing Output Short Circuit Current Min -2 -3 -4.5 -- 80 -- -- -- -- -- -- VSS - 0.3 75 100 95 Typ 0.7 1 1 2.5 88 1 20 450 1 1013||6 1013||3 -- 90 115 110 Max +2 +3 +4.5 -- -- -- 60 5000 -- -- -- VDD - 1.2 -- -- -- Units mV mV mV V/C dB Conditions TA = -40C to +85C (Note 1) TA = -40C to +125C (Note 1) TA = -40C to +125C VDD = 2.7V to 5.5V pA pA TA = +85C (Note 1) pA TA = +125C (Note 1) pA ||pF ||pF V dB dB dB VDD = 5.0V, VCM = -0.3V to 3.8V RL = 25 k to VL, VOUT = 0.1V to VDD - 0.1V RL = 5 k to VL, VOUT = 0.1V to VDD - 0.1V RL = 25 k to VL, Output overdrive = 0.5V RL = 5 k to VL, Output overdrive = 0.5V RL = 25 k to VL, AOL 100 dB RL = 5 k to VL, AOL 95 dB VDD = 5.5V VDD = 2.7V VOL, VOH VSS + 15 VOL, VOH VSS + 45 VSS + 100 VOUT VOUT VSS + 100 ISC -- -- ISC -- -- -- -- 22 12 VDD - 20 VDD - 60 VDD - 100 VDD - 100 -- -- mV mV mV mV mA mA Power Supply Supply Voltage VDD 2.7 -- 6.0 V (Note 2) -- 230 325 A IO = 0 Quiescent Current per Amplifier IQ Note 1: These specifications are not tested in either the SOT-23 or TSSOP packages with date codes older than YYWW = 0408. In these cases, the minimum and maximum values are by design and characterization only. 2: All parts with date codes November 2007 and later have been screened to ensure operation at VDD=6.0V. However, the other minimum and maximum specifications are measured at 1.4V and/or 5.5V. DS21314G-page 2 (c) 2007 Microchip Technology Inc. MCP601/1R/2/3/4 AC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, TA = +25C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, and RL = 100 k to VL, CL = 50 pF, and CS is tied low. (Refer to Figure 1-2 and Figure 1-3). Parameters Frequency Response Gain Bandwidth Product Phase Margin Step Response Slew Rate Settling Time (0.01%) Noise Input Noise Voltage Input Noise Voltage Density Input Noise Current Density Eni eni eni ini -- -- -- -- 7 29 21 0.6 -- -- -- -- VP-P f = 0.1 Hz to 10 Hz nV/Hz f = 1 kHz nV/Hz f = 10 kHz fA/Hz f = 1 kHz SR tsettle -- -- 2.3 4.5 -- -- V/s s G = +1 V/V G = +1 V/V, 3.8V step GBWP PM -- -- 2.8 50 -- -- MHz G = +1 V/V Sym Min Typ Max Units Conditions MCP603 CHIP SELECT (CS) CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, TA = +25C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, and RL = 100 k to VL, CL = 50 pF, and CS is tied low. (Refer to Figure 1-2 and Figure 1-3). Parameters CS Low Specifications CS Logic Threshold, Low CS Input Current, Low CS High Specifications CS Logic Threshold, High CS Input Current, High Shutdown VSS current Amplifier Output Leakage in Shutdown Timing CS Low to Amplifier Output Turn-on Time CS High to Amplifier Output High-Z Time Hysteresis tON tOFF VHYST -- -- -- 3.1 100 0.4 10 -- -- s ns V CS 0.2VDD, G = +1 V/V CS 0.8VDD, G = +1 V/V, No load. VDD = 5.0V VIH ICSH IQ_SHDN IO_SHDN 0.8 VDD -- -2.0 -- -- 0.7 -0.7 1 VDD 2.0 -- -- V A A nA CS = VDD CS = VDD VIL ICSL VSS -1.0 -- -- 0.2 VDD -- V A CS = 0.2VDD Sym Min Typ Max Units Conditions CS tON VOUT IDD Hi-Z 2 nA (typical) tOFF Output Active Hi-Z 230 A (typical) -230 A (typical) 2 nA (typical) ISS -700 nA (typical) 700 nA (typical) CS Current FIGURE 1-1: Timing Diagram. MCP603 Chip Select (CS) (c) 2007 Microchip Technology Inc. DS21314G-page 3 MCP601/1R/2/3/4 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = +2.7V to +5.5V and VSS = GND. Parameters Temperature Ranges Specified Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 5L-SOT23 Thermal Resistance, 6L-SOT23 Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Thermal Resistance, 8L-TSSOP Thermal Resistance, 14L-PDIP Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP Note: JA JA JA JA JA JA JA JA -- -- -- -- -- -- -- -- 256 230 85 163 124 70 120 100 -- -- -- -- -- -- -- -- C/W C/W C/W C/W C/W C/W C/W C/W TA TA TA TA -40 -40 -40 -65 -- -- -- -- +85 +125 +125 +150 C C C C Industrial temperature parts Extended temperature parts Note Sym Min Typ Max Units Conditions The Industrial temperature parts operate over this extended range, but with reduced performance. The Extended temperature specs do not apply to Industrial temperature parts. In any case, the internal Junction temperature (TJ) must not exceed the absolute maximum specification of 150C. 1.1 Test Circuits The test circuits used for the DC and AC tests are shown in Figure 1-2 and Figure 1-2. The bypass capacitors are laid out according to the rules discussed in Section 4.5 "Supply Bypass". VDD RN 0.1 F 1 F VOUT CL VDD/2 RG RF VL RL VIN MCP60X FIGURE 1-2: AC and DC Test Circuit for Most Non-Inverting Gain Conditions. VDD RN 0.1 F 1 F VOUT CL VIN RG RF VL RL VDD/2 MCP60X FIGURE 1-3: AC and DC Test Circuit for Most Inverting Gain Conditions. DS21314G-page 4 (c) 2007 Microchip Technology Inc. MCP601/1R/2/3/4 2.0 Note: TYPICAL PERFORMANCE CURVES The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL, CL = 50 pF and CS is tied low. 120 Open-Loop Gain (dB) 100 80 60 40 20 0 -20 Gain Phase 0 Open-Loop Phase () -30 -60 -90 -120 -150 -180 -210 Quiescent Current per Amplifier (A) 300 250 200 150 100 50 0 IO = 0 TA = -40C TA = +25C TA = +85C TA = +125C -40 -240 0.1 1 10 100 1k 10k 1.E+ 1M 1.E+ 1.E- 1.E+ 1.E+ 1.E+ 1.E+ 1.E+ 100k 1.E+ 10M 01 00 01 Frequency (Hz) 05 06 07 02 03 04 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Supply Voltage (V) FIGURE 2-1: Frequency. 3.5 3.0 Open-Loop Gain, Phase vs. FIGURE 2-4: Supply Voltage. 300 Quiescent Current per Amplifier (A) 250 200 150 100 50 0 Quiescent Current vs. VDD = 5.0V Falling Edge IO = 0 VDD = 5.5V Slew Rate (V/s) 2.5 2.0 1.5 1.0 0.5 0.0 -50 -25 Rising Edge VDD = 2.7V 0 25 50 75 Ambient Temperature (C) 100 125 -50 -25 0 25 50 75 100 Ambient Temperature (C) 125 FIGURE 2-2: Slew Rate vs. Temperature. FIGURE 2-5: Temperature. 1.E+04 10 Quiescent Current vs. 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -50 GBWP PM, G = +1 -25 0 25 50 75 100 Ambient Temperature (C) 110 100 90 80 70 60 50 40 30 20 10 0 125 FIGURE 2-3: Gain Bandwidth Product, Phase Margin vs. Temperature. FIGURE 2-6: vs. Frequency. Input Noise Voltage Density (V/Hz) Gain Bandwidth Product (MHz) Phase Margin, G = +1 () 1 1.E+03 100n 1.E+02 10n 1.E+01 0.1 1 10 100 1k 10k 100k 1M 1.E- 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 01 0 1 Frequency (Hz) 4 2 3 5 6 Input Noise Voltage Density (c) 2007 Microchip Technology Inc. DS21314G-page 5 MCP601/1R/2/3/4 Note: Unless otherwise indicated, TA = +25C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL, CL = 50 pF and CS is tied low. 16% Percentage of Occurrences 14% 12% 10% 8% 6% 4% 2% 0% -2.0 -1.6 -1.2 -0.8 -0.4 0.0 0.4 0.8 1.2 1.6 2.0 Input Offset Voltage (mV) 18% Percentage of Occurrences 16% 14% 12% 10% 8% 6% 4% 2% 0% -10 -8 -6 -4 -2 0 2 4 6 8 Input Offset Voltage Drift (V/C) 10 1200 Samples 1200 Samples TA = -40 to +125C FIGURE 2-7: 0.5 0.4 0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4 -0.5 -50 -25 Input Offset Voltage. FIGURE 2-10: 100 CMRR, PSRR (dB) Input Offset Voltage Drift. Input Offset Voltage (mV) VDD = 5.5V VDD = 2.7V 95 90 85 80 75 PSRR CMRR 0 25 50 75 Ambient Temperature (C) 100 125 -50 -25 0 25 50 75 Ambient Temperature (C) 100 125 FIGURE 2-8: Temperature. 800 700 600 500 400 300 200 100 0 -100 -200 Input Offset Voltage vs. FIGURE 2-11: Temperature. 800 700 600 500 400 300 200 100 0 -100 -200 CMRR, PSRR vs. Input Offset Voltage (V) Input Offset Voltage (V) VDD = 2.7V TA = -40C TA = +25C TA = +85C VDD = 5.5V TA = -40C TA = +25C TA = +85C TA = +125C TA = +125C -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Common Mode Input Voltage (V) Common Mode Input Voltage (V) FIGURE 2-9: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 2.7V. FIGURE 2-12: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 5.5V. DS21314G-page 6 (c) 2007 Microchip Technology Inc. 5.0 MCP601/1R/2/3/4 Note: Unless otherwise indicated, TA = +25C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL, CL = 50 pF and CS is tied low. 150 Channel-to-Channel Separation (dB) 140 130 120 110 100 90 1k 1.E+03 10k 100k 1.E+04 1.E+05 Frequency (Hz) 1M 1.E+06 100 90 CMRR, PSRR (dB) 80 70 60 50 40 30 20 VDD = 5.0V 10 1 100 10k 1M 10 1k 100k 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 Frequency (Hz) CMRR No Load Input Referred PSRR+ PSRR- FIGURE 2-13: Channel-to-Channel Separation vs. Frequency. 1000 Input Bias and Offset Currents (pA) FIGURE 2-16: Frequency. 1000 Input Bias and Offset Currents (pA) CMRR, PSRR vs. VDD = 5.5V VCM = 4.3V IB, +125C 100 VDD = 5.5V max. VCMR 4.3V 100 IB 10 IOS IB, +85C IOS, +125C IOS, +85C 10 1 25 35 45 55 65 75 85 95 105 115 125 Ambient Temperature (C) 1 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common Mode Input Voltage (V) FIGURE 2-14: Input Bias Current, Input Offset Current vs. Ambient Temperature. 120 DC Open-Loop Gain (dB) 110 100 90 80 100 1.E+02 VDD = 2.7V VDD = 5.5V FIGURE 2-17: Input Bias Current, Input Offset Current vs. Common Mode Input Voltage. 120 DC Open-Loop Gain (dB) 110 100 90 80 2.0 2.5 3.0 3.5 4.0 4.5 Power Supply Voltage (V) 5.0 5.5 RL = 25 k 1.E+03 1k 1.E+04 10k 1.E+05 100k Load Resistance () FIGURE 2-15: Load Resistance. DC Open-Loop Gain vs. FIGURE 2-18: Supply Voltage. DC Open-Loop Gain vs. (c) 2007 Microchip Technology Inc. DS21314G-page 7 MCP601/1R/2/3/4 Note: Unless otherwise indicated, TA = +25C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL, CL = 50 pF and CS is tied low. 3.5 Gain Bandwidth Product (MHz) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 100 1.E+02 1k 10k 1.E+03 1.E+04 Load Resistance () PM, G = +1 GBWP VDD = 5.0V 100 Phase Margin, G = +1 () 90 80 70 60 50 40 30 100k 1.E+05 130 DC Open-Loop Gain (dB) RL = 25 k 120 VDD = 5.5V 110 100 90 VDD = 2.7V 80 -50 -25 0 25 50 75 Ambient Temperature (C) 100 125 RL = 5 k FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Load Resistance. 1,000 Output Headroom (mV); VDD - V OH and V OL - V SS FIGURE 2-22: Temperature. 1000 Output Headroom (mV); VDD - V OH and V OL - V SS DC Open-Loop Gain vs. VDD = 5.5V RL tied to VDD/2 VDD - VOH RL = 5 k 100 VDD - VOH VOL - VSS 10 100 10 VOL - VSS 1 -50 -25 RL = 25 k 1 0.01 0.1 1 Output Current Magnitude (mA) 10 0 25 50 75 100 Ambient Temperature (C) 125 FIGURE 2-20: Output Voltage Headroom vs. Output Current. 10 Maximum Output Voltage Swing (V P-P ) FIGURE 2-23: vs. Temperature. 30 25 20 15 10 5 0 Output Voltage Headroom Output Short Circuit Current Magnitude (mA) VDD = 5.5V VDD = 2.7V 1 TA = -40C TA = +25C TA = +85C TA = +125C 0.1 10k 1.E+04 100k 1.E+05 Frequency (Hz) 1M 1.E+06 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Supply Voltage (V) FIGURE 2-21: Maximum Output Voltage Swing vs. Frequency. FIGURE 2-24: Output Short-Circuit Current vs. Supply Voltage. DS21314G-page 8 (c) 2007 Microchip Technology Inc. MCP601/1R/2/3/4 Note: Unless otherwise indicated, TA = +25C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL, CL = 50 pF and CS is tied low. 5.0 4.5 Output Voltage (V) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 Time (1 s/div) 5.0 4.5 Output Voltage (V) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 Time (1 s/div) VDD = 5.0V G = +1 VDD = 5.0V G = -1 FIGURE 2-25: Pulse Response. Large Signal Non-Inverting FIGURE 2-28: Response. Large Signal Inverting Pulse Output Voltage (20 mV/div) Time (1 s/div) Output Voltage (20 mV/div) VDD = 5.0V G = +1 VDD = 5.0V G = -1 Time (1 s/div) FIGURE 2-26: Pulse Response. 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 Small Signal Non-Inverting FIGURE 2-29: Response. 0 Small Signal Inverting Pulse CS Quiescent Current through V SS (A) VDD = 5.0V G = +1 VIN = 2.5V RL = 100 k to GND VOUT Active -100 -200 -300 -400 -500 -600 -700 VOUT High-Z Time (5 s/div) -800 VDD = 5.5V Output Voltage, Chip Select Voltage (V) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Chip Select Voltage (V) FIGURE 2-27: (MCP603). Chip Select Timing FIGURE 2-30: Quiescent Current Through VSS vs. Chip Select Voltage (MCP603). (c) 2007 Microchip Technology Inc. DS21314G-page 9 MCP601/1R/2/3/4 Note: Unless otherwise indicated, TA = +25C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL, CL = 50 pF and CS is tied low. 0.8 Chip Select Pin Current (A) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Chip Select Voltage (V) 6 Input and Output Voltages (V) VDD = +5.0V G = +2 VDD = 5.5V 5 4 3 2 1 0 -1 VIN VOUT Time (5 s/div) FIGURE 2-31: Chip Select Pin Input Current vs. Chip Select Voltage. FIGURE 2-33: The MCP601/1R/2/3/4 family of op amps shows no phase reversal under input overdrive. 1.E-02 10m 1m 1.E-03 100 1.E-04 10 1.E-05 1 1.E-06 100n 1.E-07 10n 1.E-08 1n 1.E-09 100p 1.E-10 10p 1.E-11 1p 1.E-12 3.0 Internal Chip Select Switch Output Voltage (V) 2.5 2.0 1.5 1.0 0.5 CS Hi to Low Amplifier On CS Low to Hi Input Current Magnitude (A) VDD = 5.0V Amplifier Hi-Z 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Chip Select Voltage (V) +125C +85C +25C -40C -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 Input Voltage (V) FIGURE 2-32: Internal Switch. Hysteresis of Chip Select's FIGURE 2-34: Measured Input Current vs. Input Voltage (below VSS). DS21314G-page 10 (c) 2007 Microchip Technology Inc. MCP601/1R/2/3/4 3.0 PIN DESCRIPTIONS PIN FUNCTION TABLE FOR SINGLE OP AMPS MCP601R SOT-23-5 (Note 1) 1 4 3 2 5 -- -- MCP603 SOT-23-6 6 2 3 7 4 8 1, 5 PDIP, SOIC, TSSOP 6 2 3 7 4 8 1 Symbol VOUT VIN- VIN+ VDD VSS CS NC Description Analog Output Inverting Input Non-inverting Input Positive Power Supply Negative Power Supply Chip Select No Internal Connection Descriptions of the pins are listed in Table 3-1 (single op amps) and Table 3-2 (dual and quad op amps). TABLE 3-1: MCP601 PDIP, SOIC, TSSOP 6 2 3 7 4 -- 1, 5, 8 Note 1: SOT-23-5 1 4 3 5 2 -- -- The MCP601R is only available in the 5-pin SOT-23 package. TABLE 3-2: MCP602 PDIP, SOIC, TSSOP 1 2 3 8 5 6 7 -- -- -- 4 -- -- -- PIN FUNCTION TABLE FOR DUAL AND QUAD OP AMPS MCP604 PDIP, SOIC, TSSOP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Symbol VOUTA VINA- VINA+ VDD VINB+ VINB- VOUTB VOUTC VINC- VINC+ VSS VIND+ VIND- VOUTD Description Analog Output (op amp A) Inverting Input (op amp A) Non-inverting Input (op amp A) Positive Power Supply Non-inverting Input (op amp B) Inverting Input (op amp B) Analog Output (op amp B) Analog Output (op amp C) Inverting Input (op amp C) Non-inverting Input (op amp C) Negative Power Supply Non-inverting Input (op amp D) Inverting Input (op amp D) Analog Output (op amp D) 3.1 Analog Outputs 3.4 Power Supply Pins The op amp output pins are low-impedance voltage sources. 3.2 Analog Inputs The positive power supply pin (VDD) is 2.5V to 6.0V higher than the negative power supply pin (VSS). For normal operation, the other pins are at voltages between VSS and VDD. Typically, these parts are used in a single (positive) supply configuration. In this case, VSS is connected to ground and VDD is connected to the supply. VDD will need bypass capacitors. The op amp non-inverting and inverting inputs are highimpedance CMOS inputs with low bias currents. 3.3 Chip Select Digital Input This is a CMOS, Schmitt-triggered input that places the part into a low power mode of operation. (c) 2007 Microchip Technology Inc. DS21314G-page 11 MCP601/1R/2/3/4 4.0 APPLICATIONS INFORMATION VDD D1 V1 R1 V2 R2 R3 VSS - (minimum expected V1) 2 mA VSS - (minimum expected V2) R2 > 2 mA R1 > MCP60X D2 The MCP601/1R/2/3/4 family of op amps are fabricated on Microchip's state-of-the-art CMOS process. They are unity-gain stable and suitable for a wide range of general purpose applications. 4.1 4.1.1 Inputs PHASE REVERSAL The MCP601/1R/2/3/4 op amp is designed to prevent phase reversal when the input pins exceed the supply voltages. Figure 2-34 shows the input voltage exceeding the supply voltage without any phase reversal. 4.1.2 INPUT VOLTAGE AND CURRENT LIMITS The ESD protection on the inputs can be depicted as shown in Figure 4-1. This structure was chosen to protect the input transistors, and to minimize input bias current (IB). The input ESD diodes clamp the inputs when they try to go more than one diode drop below VSS. They also clamp any voltages that go too far above VDD; their breakdown voltage is high enough to allow normal operation, and low enough to bypass quick ESD events within the specified limits. FIGURE 4-2: Inputs. Protecting the Analog It is also possible to connect the diodes to the left of resistors R1 and R2. In this case, current through the diodes D1 and D2 needs to be limited by some other mechanism. The resistors then serve as in-rush current limiters; the DC current into the input pins (VIN+ and VIN-) should be very small. A significant amount of current can flow out of the inputs when the common mode voltage (VCM) is below ground (VSS); see Figure 2-34. Applications that are high impedance may need to limit the useable voltage range. VDD Bond Pad 4.1.3 VIN+ Bond Pad Input Stage Bond VIN- Pad NORMAL OPERATION VSS Bond Pad The Common Mode Input Voltage Range (VCMR) includes ground in single-supply systems (VSS), but does not include VDD. This means that the amplifier input behaves linearly as long as the Common Mode Input Voltage (VCM) is kept within the specified VCMR limits (VSS-0.3V to VDD-1.2V at +25C). Figure 4-3 shows a unity gain buffer. Since VOUT is the same voltage as the inverting input, VOUT must be kept below VDD-1.2V for correct operation. FIGURE 4-1: Structures. Simplified Analog Input ESD In order to prevent damage and/or improper operation of these op amps, the circuit they are in must limit the currents and voltages at the VIN+ and VIN- pins (see Absolute Maximum Ratings at the beginning of Section 1.0 "Electrical Characteristics"). Figure 4-2 shows the recommended approach to protecting these inputs. The internal ESD diodes prevent the input pins (VIN+ and VIN-) from going too far below ground, and the resistors R1 and R2 limit the possible current drawn out of the input pins. Diodes D1 and D2 prevent the input pins (VIN+ and VIN-) from going too far above VDD, and dump any currents onto VDD. When implemented as shown, resistors R1 and R2 also limit the current through D1 and D2. VIN + MCP60X - VOUT FIGURE 4-3: Unity Gain Buffer has a Limited VOUT Range. DS21314G-page 12 (c) 2007 Microchip Technology Inc. MCP601/1R/2/3/4 4.2 Rail-to-Rail Output + MCP60X - RG RF RISO VOUT CL There are two specifications that describe the output swing capability of the MCP601/1R/2/3/4 family of op amps. The first specification (Maximum Output Voltage Swing) defines the absolute maximum swing that can be achieved under the specified load conditions. For instance, the output voltage swings to within 15 mV of the negative rail with a 25 k load to VDD/2. Figure 2-33 shows how the output voltage is limited when the input goes beyond the linear region of operation. The second specification that describes the output swing capability of these amplifiers is the Linear Output Voltage Swing. This specification defines the maximum output swing that can be achieved while the amplifier is still operating in its linear region. To verify linear operation in this range, the large signal (DC Open-Loop Gain (AOL)) is measured at points 100 mV inside the supply rails. The measurement must exceed the specified gains in the specification table. FIGURE 4-4: Output resistor RISO stabilizes large capacitive loads. Figure 4-5 gives recommended RISO values for different capacitive loads and gains. The x-axis is the normalized load capacitance (CL/GN) in order to make it easier to interpret the plot for arbitrary gains. GN is the circuit's noise gain. For non-inverting gains, GN and the gain are equal. For inverting gains, GN = 1 + |Gain| (e.g., -1 V/V gives GN = +2 V/V). 1k Recommended RISO () 4.3 MCP603 Chip Select The MCP603 is a single amplifier with Chip Select (CS). When CS is pulled high, the supply current drops to -0.7 A (typ.), which is pulled through the CS pin to VSS. When this happens, the amplifier output is put into a high-impedance state. Pulling CS low enables the amplifier. The CS pin has an internal 5 M (typical) pull-down resistor connected to VSS, so it will go low if the CS pin is left floating. Figure 1-1 is the Chip Select timing diagram and shows the output voltage, supply currents, and CS current in response to a CS pulse. Figure 2-27 shows the measured output voltage response to a CS pulse. 100 GN = +1 GN +2 10 10p 100p 1n Normalized Load Capacitance; CL / GN (F) 10n FIGURE 4-5: Recommended RISO values for capacitive loads. Once you have selected RISO for your circuit, doublecheck the resulting frequency response peaking and step response overshoot in your circuit. Evaluation on the bench and simulations with the MCP601/1R/2/3/4 SPICE macro model are very helpful. Modify RISO's value until the response is reasonable. 4.4 Capacitive Loads Driving large capacitive loads can cause stability problems for voltage feedback op amps. As the load capacitance increases, the feedback loop's phase margin decreases and the closed-loop bandwidth is reduced. This produces gain peaking in the frequency response with overshoot and ringing in the step response. When driving large capacitive loads with these op amps (e.g., > 40 pF when G = +1), a small series resistor at the output (RISO in Figure 4-4) improves the feedback loop's phase margin (stability) by making the output load resistive at higher frequencies. The bandwidth will be generally lower than the bandwidth with no capacitive load. 4.5 Supply Bypass With this family of op amps, the power supply pin (VDD for single-supply) should have a local bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm for good highfrequency performance. It also needs a bulk capacitor (i.e., 1 F or larger) within 100 mm to provide large, slow currents. This bulk capacitor can be shared with nearby analog parts. (c) 2007 Microchip Technology Inc. DS21314G-page 13 MCP601/1R/2/3/4 4.6 Unused Op Amps 2. An unused op amp in a quad package (MCP604) should be configured as shown in Figure 4-6. These circuits prevent the output from toggling and causing crosstalk. Circuits A sets the op amp at its minimum noise gain. The resistor divider produces any desired reference voltage within the output voltage range of the op amp; the op amp buffers that reference voltage. Circuit B uses the minimum number of components and operates as a comparator, but it may draw more current. 1/4 MCP604 (A) VDD R1 R2 VDD VREF C1 47 nF R2 R1 382 k 641 k VIN C2 22 nF 1/4 MCP604 (B) VDD Connect the guard ring to the non-inverting input pin (VIN+) for inverting gain amplifiers and transimpedance amplifiers (converts current to voltage, such as photo detectors). This biases the guard ring to the same reference voltage as the op amp (e.g., VDD/2 or ground). 4.8 4.8.1 Typical Applications ANALOG FILTERS Figure 4-8 and Figure 4-9 show low-pass, secondorder, Butterworth filters with a cutoff frequency of 10 Hz. The filter in Figure 4-8 has a non-inverting gain of +1 V/V, and the filter in Figure 4-9 has an inverting gain of -1 V/V. G = +1 V/V fP = 10 Hz R2 V REF = V DD -----------------R1 + R2 + MCP60X VOUT FIGURE 4-6: Unused Op Amps. FIGURE 4-8: Sallen-Key Filter. - 4.7 PCB Surface Leakage Second-Order, Low-Pass In applications where low input bias current is critical, printed circuit board (PCB) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012. A 5V difference would cause 5 pA of current to flow. This is greater than the MCP601/1R/2/3/4 family's bias current at +25C (1 pA, typical). The easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 4-7. Guard Ring VIN- VIN+ R2 618 k R3 R1 618 k 1.00 M VIN C2 47 nF VDD/2 C1 8.2 nF G = -1 V/V fP = 10 Hz VOUT - MCP60X + FIGURE 4-9: Second-Order, Low-Pass Multiple-Feedback Filter. The MCP601/1R/2/3/4 family of op amps have low input bias current, which allows the designer to select larger resistor values and smaller capacitor values for these filters. This helps produce a compact PCB layout. These filters, and others, can be designed using Microchip's Design Aids; see Section 5.2 "FilterLab(R) Software" and Section 5.3 "MindiTM Simulatior Tool". FIGURE 4-7: 1. Example Guard Ring layout. Connect the guard ring to the inverting input pin (VIN-) for non-inverting gain amplifiers, including unity-gain buffers. This biases the guard ring to the common mode input voltage. DS21314G-page 14 (c) 2007 Microchip Technology Inc. MCP601/1R/2/3/4 4.8.2 INSTRUMENTATION AMPLIFIER CIRCUITS 4.8.3 PHOTO DETECTION Instrumentation amplifiers have a differential input that subtracts one input voltage from another and rejects common mode signals. These amplifiers also provide a single-ended output voltage. The three-op amp instrumentation amplifier is illustrated in Figure 4-10. One advantage of this approach is unitygain operation, while one disadvantage is that the common mode input range is reduced as R2/RG gets larger. V1 + The MCP601/1R/2/3/4 op amps can be used to easily convert the signal from a sensor that produces an output current (such as a photo diode) into a voltage (a transimpedance amplifier). This is implemented with a single resistor (R2) in the feedback loop of the amplifiers shown in Figure 4-12 and Figure 4-13. The optional capacitor (C2) sometimes provides stability for these circuits. A photodiode configured in the Photovoltaic mode has zero voltage potential placed across it (Figure 4-12). In this mode, the light sensitivity and linearity is maximized, making it best suited for precision applications. The key amplifier specifications for this application are: low input bias current, low noise, common mode input voltage range (including ground), and rail-to-rail output. C2 R2 MCP60X - R3 - R4 MCP60X RG - VOUT R2 R2 R3 + R4 MCP60X V2 + VREF Light ID1 D1 - VOUT VDD 2R 2 R 4 V OUT = ( V 1 - V 2 ) 1 + -------- ----- + V REF R G R 3 MCP60X + VOUT = ID1 R2 FIGURE 4-10: Three-Op Amp Instrumentation Amplifier. The two-op amp instrumentation amplifier is shown in Figure 4-11. While its power consumption is lower than the three-op amp version, its main drawbacks are that the common mode range is reduced with higher gains and it must be configured in gains of two or higher. RG R1 VREF V2 V1 V OUT R 1 2R 1 = ( V 1 - V 2 ) 1 + ----- + -------- + V REF R R 2 G FIGURE 4-12: Photovoltaic Mode Detector. VOUT R2 MCP60X + R1 R2 In contrast, a photodiode that is configured in the Photoconductive mode has a reverse bias voltage across the photo-sensing element (Figure 4-13). This decreases the diode capacitance, which facilitates high-speed operation (e.g., high-speed digital communications). The design trade-off is increased diode leakage current and linearity errors. The op amp needs to have a wide Gain Bandwidth Product (GBWP). C2 R2 ID1 D1 VBIAS - VDD VOUT MCP60X + Light MCP60X + VOUT = ID1 R2 VBIAS < 0V FIGURE 4-11: Two-Op Amp Instrumentation Amplifier. Both instrumentation amplifiers should use a bulk bypass capacitor of at least 1 F. The CMRR of these amplifiers will be set by both the op amp CMRR and resistor matching. FIGURE 4-13: Detector. Photoconductive Mode (c) 2007 Microchip Technology Inc. DS21314G-page 15 MCP601/1R/2/3/4 5.0 DESIGN AIDS 5.5 Microchip provides the basic design tools needed for the MCP601/1R/2/3/4 family of op amps. Analog Demonstration and Evaluation Boards 5.1 SPICE Macro Model The latest SPICE macro model for the MCP601/1R/2/ 3/4 op amps is available on the Microchip web site at www.microchip.com. This model is intended to be an initial design tool that works well in the op amp's linear region of operation over the temperature range. See the model file for information on its capabilities. Bench testing is a very important part of any design and cannot be replaced with simulations. Also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. Microchip offers a broad spectrum of Analog Demonstration and Evaluation Boards that are designed to help you achieve faster time to market. For a complete listing of these boards and their corresponding user's guides and technical information, visit the Microchip web site at www.microchip.com/ analogtools. Two of our boards that are especially useful are: * P/N SOIC8EV: 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board * P/N SOIC14EV: 14-Pin SOIC/TSSOP/DIP Evaluation Board 5.6 Application Notes 5.2 FilterLab(R) Software Microchip's FilterLab(R) software is an innovative software tool that simplifies analog active filter (using op amps) design. Available at no cost from the Microchip web site at www.microchip.com/filterlab, the FilterLab design tool provides full schematic diagrams of the filter circuit with component values. It also outputs the filter circuit in SPICE format, which can be used with the macro model to simulate actual filter performance. The following Microchip Application Notes are available on the Microchip web site at www.microchip. com/ appnotes and are recommended as supplemental reference resources. ADN003: "Select the Right Operational Amplifier for your Filtering Circuits", DS21821 AN722: "Operational Amplifier Topologies and DC Specifications", DS00722 AN723: "Operational Amplifier AC Specifications and Applications", DS00723 AN884: "Driving Capacitive Loads With Op Amps", DS00884 AN990: "Analog Sensor Conditioning Circuits - An Overview", DS00990 These application notes and others are listed in the design guide: "Signal Chain Design Guide", DS21825 5.3 MindiTM Simulatior Tool Microchip's MindiTM simulator tool aids in the design of various circuits useful for active filter, amplifier and power-management applications. It is a free online simulation tool available from the Microchip web site at www.microchip.com/mindi. This interactive simulator enables designers to quickly generate circuit diagrams, simulate circuits. Circuits developed using the Mindi simulation tool can be downloaded to a personal computer or workstation. 5.4 MAPS (Microchip Advanced Part Selector) MAPS is a software tool that helps semiconductor professionals efficiently identify Microchip devices that fit a particular design requirement. Available at no cost from the Microchip website at www.microchip.com/ maps, the MAPS is an overall selection tool for Microchip's product portfolio that includes Analog, Memory, MCUs and DSCs. Using this tool you can define a filter to sort features for a parametric search of devices and export side-by-side technical comparasion reports. Helpful links are also provided for Datasheets, Purchase, and Sampling of Microchip parts. DS21314G-page 16 (c) 2007 Microchip Technology Inc. MCP601/1R/2/3/4 6.0 6.1 PACKAGING INFORMATION Package Marking Information 5-Lead SOT-23 (MCP601 and MCP601R only) I-Temp Code E-Temp Code Example: Device XXNN MCP601 MCP601R SANN SJNN SLNN SMNN SJ25 6-Lead SOT-23 (MCP603 only) I-Temp Code AENN E-Temp Code AUNN Example: Device XXNN MCP603 AU25 Legend: XX...X Y YY WW NNN e3 * Note: Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. (c) 2007 Microchip Technology Inc. DS21314G-page 17 MCP601/1R/2/3/4 Package Marking Information (Continued) 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Example: MCP601 I/P256 0722 MCP601 E/P e3 256 0722 OR 8-Lead SOIC (150 mil) Example: MCP601 I/SN0722 256 MCP601E SN e3 0722 256 XXXXXXXX XXXXYYWW NNN OR 8-Lead TSSOP Example: XXXX XYWW NNN 601 I722 256 DS21314G-page 18 (c) 2007 Microchip Technology Inc. MCP601/1R/2/3/4 Package Marking Information (Continued) 14-Lead PDIP (300 mil) (MCP604) Example: XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN MCP604-I/P 0722256 OR MCP604 E/P e3 0722256 14-Lead SOIC (150 mil) (MCP604) Example: XXXXXXXXXX XXXXXXXXXX YYWWNNN MCP604ISL 0722256 OR MCP604 e3 E/SL^^ 0722256 14-Lead TSSOP (MCP604) Example: XXXXXXXX YYWW NNN 604E 0722 256 (c) 2007 Microchip Technology Inc. DS21314G-page 19 MCP601/1R/2/3/4 /HDG 3ODVWLF 6PDOO 2XWOLQH 7UDQVLVWRU 27 >627@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWSZZZPLFURFKLSFRPSDFNDJLQJ b N E E1 1 e 2 3 e1 D A A2 c A1 L L1 8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV /HDG 3LWFK 2XWVLGH /HDG 3LWFK 2YHUDOO +HLJKW 0ROGHG 3DFNDJH 7KLFNQHVV 6WDQGRII 2YHUDOO :LGWK 0ROGHG 3DFNDJH :LGWK 2YHUDOO /HQJWK )RRW /HQJWK )RRWSULQW )RRW $QJOH /HDG 7KLFNQHVV 1 H H $ $ $ ( ( ' / / I F 0,1 0,//,0(7(56 120 %6& %6& 0$; /HDG :LGWK E 1RWHV 'LPHQVLRQV ' DQG ( GR QRW LQFOXGH PROG IODVK RU SURWUXVLRQV 0ROG IODVK RU SURWUXVLRQV VKDOO QRW H[FHHG PP SHU VLGH 'LPHQVLRQLQJ DQG WROHUDQFLQJ SHU $60( <0 %6& %DVLF 'LPHQVLRQ 7KHRUHWLFDOO\ H[DFW YDOXH VKRZQ ZLWKRXW WROHUDQFHV 0LFURFKLS 7HFKQRORJ\ 'UDZLQJ &% DS21314G-page 20 (c) 2007 Microchip Technology Inc. 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DS21314G-page 21 MCP601/1R/2/3/4 /HDG 3ODVWLF 'XDO ,Q/LQH 3 PLO %RG\ >3',3@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWSZZZPLFURFKLSFRPSDFNDJLQJ N NOTE 1 E1 1 2 D 3 E A2 A A1 e b1 b L c eB 8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV 3LWFK 7RS WR 6HDWLQJ 3ODQH 0ROGHG 3DFNDJH 7KLFNQHVV %DVH WR 6HDWLQJ 3ODQH 6KRXOGHU WR 6KRXOGHU :LGWK 0ROGHG 3DFNDJH :LGWK 2YHUDOO /HQJWK 7LS WR 6HDWLQJ 3ODQH /HDG 7KLFNQHVV 8SSHU /HDG :LGWK /RZHU /HDG :LGWK 2YHUDOO 5RZ 6SDFLQJ 1 H $ $ $ ( ( ' / F E E H% 0,1 ,1&+(6 120 %6& 0$; 1RWHV 3LQ YLVXDO LQGH[ IHDWXUH PD\ YDU\ EXW PXVW EH ORFDWHG ZLWK WKH KDWFKHG DUHD 6LJQLILFDQW &KDUDFWHULVWLF 'LPHQVLRQV ' DQG ( GR QRW LQFOXGH PROG IODVK RU SURWUXVLRQV 0ROG IODVK RU SURWUXVLRQV VKDOO QRW H[FHHG SHU VLGH 'LPHQVLRQLQJ DQG WROHUDQFLQJ SHU $60( <0 %6& %DVLF 'LPHQVLRQ 7KHRUHWLFDOO\ H[DFW YDOXH VKRZQ ZLWKRXW WROHUDQFHV 0LFURFKLS 7HFKQRORJ\ 'UDZLQJ &% DS21314G-page 22 (c) 2007 Microchip Technology Inc. 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DS21314G-page 23 MCP601/1R/2/3/4 /HDG 3ODVWLF 7KLQ 6KULQN 6PDOO 2XWOLQH 67 PP %RG\ >76623@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWSZZZPLFURFKLSFRPSDFNDJLQJ D N E E1 NOTE 1 1 b 2 e c A A2 A1 L1 L 8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV 3LWFK 2YHUDOO +HLJKW 0ROGHG 3DFNDJH 7KLFNQHVV 6WDQGRII 2YHUDOO :LGWK 0ROGHG 3DFNDJH :LGWK 0ROGHG 3DFNDJH /HQJWK )RRW /HQJWK )RRWSULQW )RRW $QJOH /HDG 7KLFNQHVV 1 H $ $ $ ( ( ' / / I F 0,1 0,//,0(7(56 120 %6& %6& 5() 0$; /HDG :LGWK E 1RWHV 3LQ YLVXDO LQGH[ IHDWXUH PD\ YDU\ EXW PXVW EH ORFDWHG ZLWKLQ WKH KDWFKHG DUHD 'LPHQVLRQV ' DQG ( GR QRW LQFOXGH PROG IODVK RU SURWUXVLRQV 0ROG IODVK RU SURWUXVLRQV VKDOO QRW H[FHHG PP SHU VLGH 'LPHQVLRQLQJ DQG WROHUDQFLQJ SHU $60( <0 %6& %DVLF 'LPHQVLRQ 7KHRUHWLFDOO\ H[DFW YDOXH VKRZQ ZLWKRXW WROHUDQFHV 5() 5HIHUHQFH 'LPHQVLRQ XVXDOO\ ZLWKRXW WROHUDQFH IRU LQIRUPDWLRQ SXUSRVHV RQO\ 0LFURFKLS 7HFKQRORJ\ 'UDZLQJ &% DS21314G-page 24 (c) 2007 Microchip Technology Inc. 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DS21314G-page 25 MCP601/1R/2/3/4 /HDG 3ODVWLF 6PDOO 2XWOLQH 6/ 1DUURZ PP %RG\ >62,&@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWSZZZPLFURFKLSFRPSDFNDJLQJ D N E E1 NOTE 1 1 2 b 3 e h h A2 c A A1 L L1 8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV 3LWFK 2YHUDOO +HLJKW 0ROGHG 3DFNDJH 7KLFNQHVV 6WDQGRII 2YHUDOO :LGWK 0ROGHG 3DFNDJH :LGWK 2YHUDOO /HQJWK &KDPIHU RSWLRQDO )RRW /HQJWK )RRWSULQW )RRW $QJOH /HDG 7KLFNQHVV /HDG :LGWK 0ROG 'UDIW $QJOH 7RS 0ROG 'UDIW $QJOH %RWWRP 1 H $ $ $ ( ( ' K / / I F E D E 0,1 0,//,0(7(56 120 %6& %6& %6& %6& 5() 0$; 1RWHV 3LQ YLVXDO LQGH[ IHDWXUH PD\ YDU\ EXW PXVW EH ORFDWHG ZLWKLQ WKH KDWFKHG DUHD 6LJQLILFDQW &KDUDFWHULVWLF 'LPHQVLRQV ' DQG ( GR QRW LQFOXGH PROG IODVK RU SURWUXVLRQV 0ROG IODVK RU SURWUXVLRQV VKDOO QRW H[FHHG PP SHU VLGH 'LPHQVLRQLQJ DQG WROHUDQFLQJ SHU $60( <0 %6& %DVLF 'LPHQVLRQ 7KHRUHWLFDOO\ H[DFW YDOXH VKRZQ ZLWKRXW WROHUDQFHV 5() 5HIHUHQFH 'LPHQVLRQ XVXDOO\ ZLWKRXW WROHUDQFH IRU LQIRUPDWLRQ SXUSRVHV RQO\ 0LFURFKLS 7HFKQRORJ\ 'UDZLQJ &% DS21314G-page 26 (c) 2007 Microchip Technology Inc. MCP601/1R/2/3/4 /HDG 3ODVWLF 7KLQ 6KULQN 6PDOO 2XWOLQH 67 PP %RG\ >76623@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWSZZZPLFURFKLSFRPSDFNDJLQJ D N E E1 NOTE 1 12 e b A A2 c A1 8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV 3LWFK 2YHUDOO +HLJKW 0ROGHG 3DFNDJH 7KLFNQHVV 6WDQGRII 2YHUDOO :LGWK 0ROGHG 3DFNDJH :LGWK 0ROGHG 3DFNDJH /HQJWK )RRW /HQJWK )RRWSULQW )RRW $QJOH /HDG 7KLFNQHVV 1 H $ $ $ ( ( ' / / I F L1 0,//,0(7(56 0,1 120 %6& %6& 5() 0$; L /HDG :LGWK E 1RWHV 3LQ YLVXDO LQGH[ IHDWXUH PD\ YDU\ EXW PXVW EH ORFDWHG ZLWKLQ WKH KDWFKHG DUHD 'LPHQVLRQV ' DQG ( GR QRW LQFOXGH PROG IODVK RU SURWUXVLRQV 0ROG IODVK RU SURWUXVLRQV VKDOO QRW H[FHHG PP SHU VLGH 'LPHQVLRQLQJ DQG WROHUDQFLQJ SHU $60( <0 %6& %DVLF 'LPHQVLRQ 7KHRUHWLFDOO\ H[DFW YDOXH VKRZQ ZLWKRXW WROHUDQFHV 5() 5HIHUHQFH 'LPHQVLRQ XVXDOO\ ZLWKRXW WROHUDQFH IRU LQIRUPDWLRQ SXUSRVHV RQO\ 0LFURFKLS 7HFKQRORJ\ 'UDZLQJ &% (c) 2007 Microchip Technology Inc. DS21314G-page 27 MCP601/1R/2/3/4 NOTES: DS21314G-page 28 (c) 2007 Microchip Technology Inc. MCP601/1R/2/3/4 APPENDIX A: REVISION HISTORY Revision G (December 2007) * Updated Figure 2-15 and Figure 2-19. * Updated Table 3-1 and Table 3-2. * Updated notes to Section 1.0 "Electrical Characteristics". * Expanded Analog Input Absolute Maximum Voltage Range (applies retroactively). * Expanded operating VDD to a maximum of 6.0V. * Added Figure 2-34. * Added Section 4.1.1 "Phase Reversal", Section 4.1.2 "Input Voltage and Current Limits", and Section 4.1.3 "Normal Operation". * Corrected Section 6.0 "Packaging Information". Revision F (February 2004) * Undocumented changes. Revision E (September 2003) * Undocumented changes. Revision D (April 2000) * Undocumented changes. Revision C (July 1999) * Undocumented changes. Revision B (June 1999) * Undocumented changes. Revision A (March 1999) * Original Release of this Document. (c) 2007 Microchip Technology Inc. DS21314G-page 29 MCP601/1R/2/3/4 NOTES: DS21314G-page 30 (c) 2007 Microchip Technology Inc. MCP601/1R/2/3/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device -X Temperature Range /XX Package b) Examples: a) MCP601-I/P: Single Op Amp, Industrial Temperature, 8 lead PDIP package. MCP601-E/SN: Single Op Amp, Extended Temperature, 8 lead SOIC package. MCP601T-E/ST: Tape and Reel, Extended Temperature, Single Op Amp, 8 lead TSSOP package MCP601RT-I/OT: Tape and Reel, Industrial Temperature, Single Op Amp, Rotated 5 lead SOT-23 package. MCP601RT-E/OT:Tape and Reel, Extended Temperature, Single Op Amp, Rotated, 5 lead SOT-23 package. MCP602-I/SN: Dual Op Amp, Industrial Temperature, 8 lead SOIC package. MCP602-E/P: Dual Op Amp, Extended Temperature, 8 lead PDIP package. MCP602T-E/ST: Tape and Reel, Extended Temperature, Dual Op Amp, 8 lead TSSOP package. Industrial Temperature, Single Op Amp with Chip Select, 8 lead SOIC package. MCP603-E/P: Extended Temperature, Single Op Amp with Chip Select, 8 lead PDIP package. MCP603T-E/ST: Tape and Reel, Extended Temperature, Single Op Amp with Chip Select 8 lead TSSOP package. MCP603T-I/SN: Tape and Reel, Industrial Temperature, Single Op Amp with Chip Select, 8 lead SOIC package. MCP604-I/P: Industrial Temperature, Quad Op Amp, 14 lead PDIP package. MCP604-E/SL: Extended Temperature, Quad Op Amp, 14 lead SOIC package. MCP604T-E/ST: Tape and Reel, Extended Temperature, Quad Op Amp, 14 lead TSSOP package. MCP603-I/SN: Device MCP601 MCP601T Single Op Amp Single Op Amp (Tape and Reel for SOT-23, SOIC and TSSOP) MCP601RT Single Op Amp (Tape and Reel for SOT-23-5) MCP602 Dual Op Amp MCP602T Dual Op Amp (Tape and Reel for SOIC and TSSOP) MCP603 Single Op Amp with Chip Select MCP603T Single Op Amp with Chip Select (Tape and Reel for SOT-23, SOIC and TSSOP) MCP604 Quad Op Amp MCP604T Quad Op Amp (Tape and Reel for SOIC and TSSOP) I E = -40 C to +85 C = -40 C to +125 C c) d) e) a) Temperature Range b) Package OT CH P SN SL ST = = = = = = Plastic SOT-23, 5-lead (MCP601 only) Plastic SOT-23, 6-lead (MCP603 only) Plastic DIP (300 mil body), 8, 14 lead Plastic SOIC (3.90 mm body), 8 lead Plastic SOIC (3.90 mm body), 14 lead Plastic TSSOP (4.4 mm body), 8, 14 lead c) a) b) c) d) a) b) c) (c) 2007 Microchip Technology Inc. DS21314G-page 31 MCP601/1R/2/3/4 NOTES: DS21314G-page 32 (c) 2007 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." * * * Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, rfPIC and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. (c) 2007 Microchip Technology Inc. DS21314G-page 33 WORLDWIDE SALES AND SERVICE AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509 ASIA/PACIFIC Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Fuzhou Tel: 86-591-8750-3506 Fax: 86-591-8750-3521 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 China - Shunde Tel: 86-757-2839-5507 Fax: 86-757-2839-5571 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 ASIA/PACIFIC India - Bangalore Tel: 91-80-4182-8400 Fax: 91-80-4182-8422 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 10/05/07 DS21314G-page 34 (c) 2007 Microchip Technology Inc. |
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