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FDMJ1023PZ Dual P-Channel PowerTrench(R) MOSFET August 2007 FDMJ1023PZ Dual P-Channel PowerTrench(R) MOSFET -20V, -2.9A, 112m Features Max rDS(on) = 112m at VGS = -4.5V, ID = -2.9A Max rDS(on) = 160m at VGS = -2.5V, ID = -2.4A Max rDS(on) = 210m at VGS = -1.8V, ID = -2.1A Max rDS(on) = 300m at VGS = -1.5V, ID = -1.0A Low gate charge, high power and current handling capability HBM ESD protection level > 1.5kV typical (Note 3) RoHS Compliant tm General Description This dual P-Channel MOSFET uses Fairchild's advanced low voltage PowerTrench(R) process. This device is designed specifically as a single package solution for the battery charge switch in cellular handset and other ultra-portable applications. It features two independent P-Channel MOSFETs with low on-state resistance for minimum conduction losses. When connected in the typical common source configuration, bi-directional current flow is possible. The SC-75 MicroFET package offers exceptional thermal performance for its physical size and is well suited to linear mode applications. Applications Battery management/charger application Pin 1 S1 S2 G2 Bottom Drain Contact Q2 S2 D1 D2 S1 4 5 3 2 G2 S2 G1 G1 S1 S2 Q1 6 Bottom Drain Contact 1 S1 SC-75 MicroFET MOSFET Maximum Ratings TA = 25C unless otherwise noted Symbol VDS VGS ID PD TJ, TSTG Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous -Pulsed Power Dissipation Power Dissipation Operating and Storage Junction Temperature Range (Note 1a) (Note 1b) (Note 1a) Ratings -20 8 -2.9 -12 1.4 0.7 -55 to +150 Units V V A W C Thermal Characteristics RJA RJA Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Ambient (Note 1a) (Note 1b) 89 182 C/W Package Marking and Ordering Information Device Marking 023 Device FDMJ1023PZ Package SC-75 MicroFET Reel Size 7'' Tape Width 8mm Quantity 3000 units (c)2007 Fairchild Semiconductor Corporation FDMJ1023PZ Rev.B 1 www.fairchildsemi.com FDMJ1023PZ Dual P-Channel PowerTrench(R) MOSFET Electrical Characteristics TJ = 25C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = -250A, VGS = 0V ID = -250A, referenced to 25C VDS = -16V, VGS = 0V VGS = 8V, VDS = 0V -20 -13 -1 10 V mV/C A A On Characteristics VGS(th) VGS(th) TJ Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient VGS = VDS, ID = -250A ID = -250A, referenced to 25C VGS = -4.5V, ID = -2.9A VGS = -2.5V, ID = -2.4A rDS(on) Static Drain to Source On Resistance VGS = -1.8V, ID = -2.1A VGS = -1.5V, ID = -1.0A VGS = -4.5V, ID = -2.9A ,TJ = 125C gFS Forward Transconductance VDD = -5V, ID = -2.9A -0.4 -0.7 2.3 93 128 173 217 130 7 112 160 210 300 160 S m -1.0 V mV/C Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = -10V, VGS = 0V, f = 1MHz 300 55 45 400 75 70 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain "Miller" Charge VDD = -5V, ID = -2.9A VGS = -4.5V VDD = -10V, ID = -2.9A VGS = -4.5V, RGEN = 6 5 4 23 12 4.6 0.6 1.0 10 10 37 22 6.5 ns ns ns ns nC nC nC Drain-Source Diode Characteristics IS VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = -1.1A IF = -2.9A, di/dt = 100A/s -0.9 28 15 -1.1 -1.2 45 27 A V ns nC Notes: 1. RJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RJC is guaranteed by design while RJA is determined by the user's board design. a. 89C/W when mounted on a 1 in2 pad of 2 oz copper b.182C/W when mounted on a minimum pad of 2 oz copper 2. Pulse Test: Pulse Width < 300s, Duty cycle < 2.0%. 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. (c)2007 Fairchild Semiconductor Corporation FDMJ1023PZ Rev.B 2 www.fairchildsemi.com FDMJ1023PZ Dual P-Channel PowerTrench(R) MOSFET Typical Characteristics TJ = 25C unless otherwise noted 12 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = -4.5V -ID, DRAIN CURRENT (A) 2.5 VGS = -1.8V 9 VGS = -3V VGS = -2.5V 2.0 VGS = -1.5V VGS = -2V VGS = -2.5V 6 VGS = -2V VGS = -1.8V 1.5 3 PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX VGS = -1.5V 1.0 PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX VGS = -3V VGS = -4.5V 0 0 1 2 3 4 5 -VDS, DRAIN TO SOURCE VOLTAGE (V) 0.5 0 3 6 9 12 -ID, DRAIN CURRENT(A) Figure 1. On-Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 500 SOURCE ON-RESISTANCE (m) 1.6 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.4 1.2 1.0 0.8 0.6 -75 ID = -2.9A VGS = -4.5V rDS(on), DRAIN TO PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX 400 ID = -2.9A 300 200 100 TJ = 25oC TJ = 125oC -50 -25 0 25 50 75 100 125 150 0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 TJ, JUNCTION TEMPERATURE (oC) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On- Resistance vs Junction Temperature 12 PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX Figure 4. On-Resistance vs Gate to Source Voltage 10 -IS, REVERSE DRAIN CURRENT (A) VGS = 0V -ID, DRAIN CURRENT (A) 9 VDD = -3V 1 TJ = 125oC 6 TJ = -55oC TJ = 25oC TJ = 125oC 0.1 TJ = 25oC 3 0.01 TJ = -55oC 0 0 1 2 3 1E-3 0.2 0.4 0.6 0.8 1.0 1.2 -VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current (c)2007 Fairchild Semiconductor Corporation FDMJ1023PZ Rev.B 3 www.fairchildsemi.com FDMJ1023PZ Dual P-Channel PowerTrench(R) MOSFET Typical Characteristics TJ = 25C unless otherwise noted 4.5 -VGS, GATE TO SOURCE VOLTAGE(V) 1000 ID = -2.9A 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 Ciss VDD = -3V VDD = -5V VDD = -7V CAPACITANCE (pF) 100 Coss Crss f = 1MHz VGS = 0V 1 2 3 4 5 10 0.1 1 -VDS, DRAIN TO SOURCE VOLTAGE (V) 10 20 Qg, GATE CHARGE(nC) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 30 10 -Ig, GATE LEAKAGE CURRENT(A) -1 -2 -3 -4 -5 -6 -7 -8 -9 10 10 10 10 10 10 10 10 10 VDS = 0V -ID, DRAIN CURRENT (A) 10 100us TJ = 150oC 1 THIS AREA IS LIMITED BY rDS(on) 1ms 10ms 100ms 1s 10s DC TJ = 25oC 0.1 SINGLE PULSE TJ = MAX RATED RJA = 182oC/W TA = 25oC -10 0 3 6 9 12 15 0.01 0.1 1 10 60 -VGS, GATE TO SOURCE VOLTAGE (V) -VDS, DRAIN to SOURCE VOLTAGE (V) Figure 9. Gate Leakage Current vs Gate to Source Voltage 100 P(PK), PEAK TRANSIENT POWER (W) Figure 10. Forward Bias Safe Operating Area SINGLE PULSE RJA = 182oC/W TA = 25oC 10 VGS = -4.5V 1 0.5 -4 10 -3 -2 -1 0 1 2 3 10 10 10 10 10 10 10 t, PULSE WIDTH (s) Figure 11. Single Pulse Maximum Power Dissipation (c)2007 Fairchild Semiconductor Corporation FDMJ1023PZ Rev.B 4 www.fairchildsemi.com FDMJ1023PZ Dual P-Channel PowerTrench(R) MOSFET Typical Characteristics TJ = 25C unless otherwise noted 2 DUTY CYCLE-DESCENDING ORDER 1 NORMALIZED THERMAL IMPEDANCE, ZJA 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 SINGLE PULSE 0.01 0.005 -4 10 RJA = 182 C/W o NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA 10 -3 10 -2 10 -1 10 0 10 1 10 2 10 3 t, RECTANGULAR PULSE DURATION (s) Figure 12. Transient Thermal Response Curve (c)2007 Fairchild Semiconductor Corporation FDMJ1023PZ Rev.B 5 www.fairchildsemi.com FDMJ1023PZ Dual P-Channel PowerTrench(R) MOSFET Dimensional Outline and Pad Layout (c)2007 Fairchild Semiconductor Corporation FDMJ1023PZ Rev.B 6 www.fairchildsemi.com FDMJ1023PZ Dual P-Channel PowerTrench(R) MOSFET TRADEMARKS The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx(R) Build it NowTM CorePLUSTM CROSSVOLTTM CTLTM Current Transfer LogicTM EcoSPARK(R) (R) Fairchild(R) Fairchild Semiconductor(R) FACT Quiet SeriesTM FACT(R) FAST(R) FastvCoreTM FPSTM FRFET(R) Global Power ResourceSM Green FPSTM Green FPSTM e-SeriesTM GTOTM i-LoTM IntelliMAXTM ISOPLANARTM MegaBuckTM MICROCOUPLERTM MicroFETTM MicroPakTM MillerDriveTM Motion-SPMTM OPTOLOGIC(R) OPTOPLANAR(R) (R) PDP-SPMTM Power220(R) Power247(R) POWEREDGE(R) Power-SPMTM PowerTrench(R) Programmable Active DroopTM QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM SMART STARTTM SPM(R) STEALTHTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM The Power Franchise(R) TinyBoostTM TinyBuckTM TinyLogic(R) TINYOPTOTM TinyPowerTM TinyPWMTM TinyWireTM SerDesTM UHC(R) UniFETTM VCXTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. tm Rev. I31 Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. No Identification Needed Full Production Obsolete Not In Production (c)2007 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com |
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