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| TECHNICAL DATA KK4013B Dual D Flip-Flop The KK4013B consists of two identical, independent data-type flipflops. Each flip-flop has independent data, set, reset, and clock inputs and Q and Q outputs. These devices can be used for shift register applications, and, by connecting Q output to the data input, for counter and toggle applications. The logic level present at the D input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line, respectively. * Operating Voltage Range: 3.0 to 18 V * Maximum input current of 1 A at 18 V over full package-temperature range; 100 nA at 18 V and 25C * Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply N SUFFIX PLASTIC 14 1 14 1 D SUFFIX SOIC ORDERING INFORMATION KK4013BN Plastic KK4013BD SOIC TA = -55 to 125 C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs Clock Data Reset Set L H X X PIN 14 =VCC PIN 7 = GND X X X X X L L L H L H L L L L H H Outputs Q L H Q L H H Q H L Q H L H X = don't care 1 KK4013B MAXIMUM RATINGS* Symbol VCC VIN IIN PD Ptot Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP, SOIC Package Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +20 -0.5 to VCC +0.5 10 500** 100 -65 to +150 260 Unit V V mA mW mW C C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. **Derating: - Plastic DIP from -55 to +100C - SOIC Package from -55 to +65C - Plastic DIP: - 12 mW/C from +100 to +125C - SOIC Package: : - 7 mW/C from +65 to +125C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) Operating Temperature, All Package Types Min 3.0 0 -55 Max 18 VCC +125 Unit V V C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation VIN should be constrained to the range GNDVIN VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 KK4013B DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) VCC Symbol VIH Parameter Minimum High-Level Input Voltage Maximum Low Level Input Voltage Minimum High-Level Output Voltage Test Conditions VOUT=0.5 V or VCC - 0.5 V VOUT=1.0 V or VCC - 1.0 V VOUT=1.5 V or VCC - 1.5 V VOUT=0.5 V or VCC - 0.5 V VOUT=1.0 V or VCC - 1.0 V VOUT=1.5 V or VCC - 1.5 V VIN=GND or VCC V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 18 5.0 10 15 20 5.0 10 15 5.0 5.0 10 15 Guaranteed Limit -55C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 4.5 9.0 13.5 0.05 0.05 0.05 0.5 1.0 1.5 0.1 1 2 4 20 0.64 1.6 4.2 -2.0 -0.64 -1.6 -4.2 25C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 4.5 9.0 13.5 0.05 0.05 0.05 0.5 1.0 1.5 0.1 1 2 4 20 0.51 1.3 3.4 -1.6 -0.51 -1.3 -3.4 125 C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 4.5 9.0 13.5 0.05 0.05 0.05 0.5 1.0 1.5 1.0 30 60 120 600 0.36 0.9 2.4 mA -1.15 -0.36 -0.9 -2.4 Unit V VIL V VOH V VIL=1.5V, VIH=3.5V, IO=-1A VIL=3.0V, VIH=7.0V, IO=-1A VIL=4.0V, VIH=11V, IO=-1A VOL Maximum Low-Level Output Voltage VIN=GND or VCC V VIL=1.5V, VIH=3.5V, IO=1A VIL=3.0V, VIH=7.0V, IO=1A VIL=4.0V, VIH=11V, IO=1A IIN ICC Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) Minimum Output Low (Sink) Current VIN= GND or VCC VIN= GND or VCC A A IOL VIN= GND or VCC UOL=0.4 V UOL=0.5 V UOL=1.5 V mA IOH Minimum Output VIN= GND or VCC High (Source) Current UOH=2.5 V UOH=4.6 V UOH=9.5 V UOH=13.5 V 3 KK4013B AC ELECTRICAL CHARACTERISTICS (CL=50pF, RL=200 k, Input tr=tf=20 ns) VCC Symbol fmax Parameter Maximum Clock Frequency (Figure 1) V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 3.5 8 12 300 130 90 300 130 90 400 170 120 200 100 80 Guaranteed Limit -55C 25C 3.5 8 12 300 130 90 300 130 90 400 170 120 200 100 80 7.5 125C 3.0 6 10 450 200 150 450 200 150 600 250 150 250 150 100 Unit MHz tPLH, tPHL Maximum Propagation Delay, Clock to Q or Q (Figure 1) Maximum Propagation Delay, Set to Q or Reset to Q (Figure 2) Maximum Propagation Delay, Set to Q or Reset to Q (Figure 2) Maximum Output Transition Time, Any Output (Figure 1) Maximum Input Capacitance ns tPLH ns tPHL ns tTLH, tTHL ns CIN pF TIMING REQUIREMENTS(CL=50pF, RL=200 k, Input tr=tf=20 ns) VCC Symbol tw Parameter Minimum Pulse Width, Clock (Figure 1) V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 140 60 40 180 80 50 40 20 15 5 5 5 500 30 6 Guaranteed Limit -55C 25C 140 60 40 180 80 50 40 20 15 5 5 5 500 30 6 125C 200 80 50 250 120 80 40 20 15 8 5 5 500 30 6 Unit ns tw Minimum Pulse Width, Set or Reset (Figure 2) ns tsu Minimum Setup Time, Data to Clock (Figure 3) Minimum Hold Time, Clock to Data (Figure 3) Maximum Input Rise or Fall Time, Clock (Figure 1) ns th ns tr, tf s 4 KK4013B tr CLOCK 90% 50% 10% tf VCC 0V SET OR RESET t PHL 1/fmax tPLH t PHL VCC t TLH 0V t THL Q OR Q Q OR Q t PLH 50% tw VCC 0V VCC 0V VCC 50% tw 50% Q OR Q 50% 10% 90% 0V Figure 1. Switching Waveforms Figure 2. Switching Waveforms DATA VCC 50% 0V t su th VCC 50% CLOCK 0V Figure 3. Switching Waveforms EXPANDED LOGIC DIAGRAM (1/2 of the Device) 5 KK4013B N SUFFIX PLASTIC DIP (MS - 001AA) A 14 8 B 1 7 Dimensions, mm Symbol A B MIN 18.67 6.10 0.36 1.14 2.54 7.62 0 2.92 7.62 0.20 0.38 10 3.81 8.26 0.36 MAX 19.69 7.11 5.33 0.56 1.78 F L C D F G J C -T- SEATING N G D 0.25 (0.010) M T K PLANE M H H J K L M N NOTES: 1. Dimensions "A", "B" do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. D SUFFIX SOIC (MS - 012AB) A 14 8 Dimensions, mm Symbol. A MIN 8.55 3.80 1.35 0.33 0.40 1.27 5.72 0 0.10 0.19 5.80 0.25 8 0.25 0.25 6.20 0.50 MAX 8.75 4.00 1.75 0.51 1.27 H B P B C D C R x 45 1 G 7 F G H -TD 0.25 (0.010) M T C M K SEATING PLANE J F M J K M P R NOTES: 1.Dimensions A and B do not include mold flash or protrusion. 2.Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B - 0.25 mm (0.010) per side. 6 |
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