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| EMIF08-VID01F2 8 line low capacitance EMI filter and ESD protection Main product characteristics Where EMI filtering in ESD sensitive equipment is required : LCD & camera for mobile phones Computers and printers Communication systems MCU Boards Description The EMIF08-VID01F2 is an 8 line highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interference. The flip chip packaging means the package size is equal to the die size. This filter includes ESD protection circuitry, which prevents damage to the application when it is subjected to ESD surges up to 15kV. Lead free flip chip package Pin configuration (Bumps side) Benefits 12 11 10 I8 GND G ND 987 I6 GND G ND 654 I4 GND G ND 321 I2 GND G ND High efficiency EMI filter (-33 dB @ 900 Mhz) Low line capacitance suitable for high speed data bus Low serial resistance for camera impedance adaptation Optimized PCB space consuming: 1.29 mm x 3.92 mm Very thin package: 0.65 mm Lead free pacakge High efficiency in ESD suppression on inputs pins (IEC61000-4-2 level 4). High reliability offered by monolithic integration High reducing of parasitic elements through integration & wafer level packaging. I7 I5 I3 I1 A B C O8 O7 O6 O5 O4 O3 O2 O1 Complies with following standards: IEC61000-4-2 level 4 input pins level 1 output pins 15 kV 8 kV 2 kV 2 kV (air discharge) (contact discharge (air discharge) (contact discharge MIL STD 883E - Method 3015-6 Class 3 August 2005 Rev 2 1/6 www.st.com 6 1 Electrical characteristics (Tamb = 25C) EMIF08-VID01F2 Figure 1. Basic cell configuration Input R Output R = 100 Cline = 16 pF typ. @ 3 V Table 1. Symbol Vpp Tj Top Tstg Absolute ratings (limiting values) Parameter ESD discharge IEC61000-4-2 air discharge ESD discharge IEC61000-4-2 contact discharge Maximum junction temperature Operating temperature range Storage temperature range Value 15 8 125 -40 to +85 -55 to +150 Unit kV KV C C C 1 Electrical characteristics (Tamb = 25C) Symbol VBR IRM VRM R Cline Parameters Breakdown voltage Leakage current @ VRM Stand-off voltage Series resistance between Input & Output Input capacitance per line IM R VRM VBR V I Symbol VBR IRM RI/O Cline IR = 1mA Test conditions Min 6 Typ 8 Max 10 500 Unit V nA pF VRM = 3V per line I=10mA VR = 3V DC, 1 MHz 80 100 16 120 19 2/6 EMIF08-VID01F2 Figure 2. dB 0 -5 -10 -15 1 Electrical characteristics (Tamb = 25C) S21 (dB) attenuation measurement Figure 3. dB 0 -10 -20 -30 -40 Analog crosstalk measurement -20 -50 -25 -30 -35 -40 -60 -70 -80 -90 f (Hz) -45 100k 1M 10M 100M 1G f (Hz) 100k 1M 10M 100M 1G -100 Figure 4. ESD response to IEC61000-4-2 (+15 kV air discharge) on one input Vin and one output Vout Figure 5. ESD response to IEC61000-4-2 (- 15 kV air discharge) on one input Vin and one output Vout Input 10V/d Input 10V/d Output 10V/d Output 10V/d 200ns/d 200ns/d Figure 6. Line capacitance versus applied voltage CLINE (pF) 28 26 24 22 20 18 16 14 12 10 0 1 2 VLINE (V) 3 4 5 3/6 2 Ordering information scheme EMIF08-VID01F2 2 Ordering information scheme EMIF EMI Filter Number of lines X: resistance (Ohms) Z: capacitance value / 10 pF or Application (3 letters) and Version (2 digits) F: Flip chip 1: Pitch = 500 m, Bump = 315 m 2: Lead free Pitch = 500 m, Bump = 315 m vv - xxx zz F y 3 Package mechanical data flip chip 500m +/-50 250m +/-50 315 m +/- 50 435 m +/-50 650m +/- 65 50 1 m 3.92 mm +/-50m Figure 7. Marking 365 240 Figure 8. Foot print recommendation Dot, ST Logo xx = marking z = packaging location yww = date code Dimensions in m Copper pad Diameter : 250m recommended , 300m max (R) E Solder stencil opening : 330m xxz yww ww Solder mask opening recommendation : 340m min for 300m copper pad diameter 4/6 1.29 mm +/-50m +/ 50 365 40 220 EMIF08-VID01F2 Figure 9. Flip chip tape and reel specification Dot identifying Pin A1 location 4 +/- 0.1 4 Ordering information f 1.5 +/- 0.1 1.75 +/- 0.1 5.5 +/- 0.5 0.73 +/- 0.05 12 +/- 0.3 12 +/- 0.3 ST E ST ST ST E ST E yww yww yww yww yww xxz User direction of unreeling xxz xxz xxz xxz 4 +/- 0.1 4 Ordering information Ordering code EMIF08-VID01F2 Marking GS Package Flip Chip Weight 6.8 mg Base qty 5000 Delivery mode 7" Tape and reel 5 Revision history Date 13-Jul-2005 11-Aug-2005 Revision 1 2 Initial release. Fonts changed in Figures 7, 8, and 9 Changes 5/6 5 Revision history EMIF08-VID01F2 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 6/6 |
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