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PD - 97315 IRF6720S2TRPbF IRF6720S2TR1PBF l l l l l l l l l RoHS Compliant Containing No Lead and Bromide Low Profile (<0.7 mm) Dual Sided Cooling Compatible Ultra Low Package Inductance Optimized for High Frequency Switching Ideal for CPU Core DC-DC Converters Optimized for Control FET Application Compatible with existing Surface Mount Techniques 100% Rg tested Typical values (unless otherwise specified) DirectFET Power MOSFET RDS(on) Qgs2 0.9nC VDSS Qg tot VGS Qgd 2.8nC RDS(on) Qoss 5.1nC 30V max 20V max 6.0m@ 10V 9.8m@ 4.5V Qrr 14nC Vgs(th) 2.0V 7.9nC Applicable DirectFET Outline and Substrate Outline S1 M4 L4 L6 DirectFET ISOMETRIC S1 S2 SB M2 L8 Description The IRF6720S2PbF combines the latest HEXFET(R) Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve improved performance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6720S2PbF has low gate resistance and low charge along with ultra low package inductance providing significant reduction in switching losses. The reduced losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors operating at higher frequencies. The IRF6720S2PbF has been optimized for the control FET socket of synchronous buck operating from 12 volt bus converters. Absolute Maximum Ratings Parameter VDS VGS ID @ TA = 25C ID @ TA = 70C ID @ TC = 25C IDM EAS IAR 20 Typical RDS(on) (m) Max. 30 20 11 9.2 35 92 12 8.8 VGS , Gate-to-Source Voltage (V) Units V Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS Continuous Drain Current, VGS Pulsed Drain Current g e @ 10V e @ 10V f h 12.0 10.0 8.0 6.0 4.0 2.0 0.0 0 2 4 6 ID= 8.8A A Single Pulse Avalanche Energy Avalanche CurrentAg ID = 11A 16 12 T J = 125C 8 T J = 25C 4 0 5 10 15 mJ A VDS= 24V VDS= 15V 20 8 10 12 14 16 18 20 VGS, Gate -to -Source Voltage (V) Fig 1. Typical On-Resistance vs. Gate Voltage Notes: Q G Total Gate Charge (nC) Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFET Website. Surface mounted on 1 in. square Cu board, steady state. TC measured with thermocouple mounted to top (Drain) of part. Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25C, L = 0.31mH, RG = 25, IAS = 8.8A. www.irf.com 1 04/07/08 IRF6720S2TR/TR1PbF Static @ TJ = 25C (unless otherwise specified) Parameter BVDSS VDSS/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr td(off) tf Ciss Coss Crss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. 30 --- --- --- 1.35 --- --- --- --- --- 21 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. Max. Units --- 19 6.0 9.8 2.0 -6.9 --- --- --- --- --- 7.9 2.2 0.9 2.8 2.0 3.7 5.1 0.30 13 35 11 11 1140 240 100 --- --- 8.0 12.8 2.35 --- 1.0 150 100 -100 --- 12 --- --- --- --- --- --- --- --- --- --- --- --- --- --- pF VGS = 0V VDS = 15V = 1.0MHz ns nC Conditions VGS = 0V, ID = 250A V mV/C Reference to 25C, ID = 1mA m VGS = 10V, ID = 11A i VGS = 4.5V, ID = 8.8A i V mV/C A nA S VDS = 20V, VGS = 0V VDS = 20V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VDS = 15V, ID =8.8A VDS = 15V nC VGS = 4.5V ID = 8.8A See Fig. 2 VDS = 16V, VGS = 0V VDD = 15V, VGS = 4.5V i ID = 8.8A RG= 6.2 VDS = VGS, ID = 25A Diode Characteristics Parameter IS ISM VSD trr Qrr Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) g --- --- --- --- 16 14 1.0 24 21 V ns nC Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge --- --- 92 Min. --- Typ. Max. Units --- 22 A Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 8.8A, VGS = 0V i TJ = 25C, IF =8.8A di/dt = 200A/s i Notes: Repetitive rating; pulse width limited by max. junction temperature. Pulse width 400s; duty cycle 2%. 2 www.irf.com IRF6720S2TR/TR1PbF Absolute Maximum Ratings PD @TA = 25C PD @TA = 70C PD @TC = 25C TP TJ TSTG e Power Dissipation e Power Dissipation f Power Dissipation Operating Junction and Parameter Max. 1.7 1.2 17 270 -55 to + 175 Units W Peak Soldering Temperature Storage Temperature Range C Thermal Resistance RJA RJA RJA RJC RJ-PCB el Junction-to-Ambient jl Junction-to-Ambient kl Junction-to-Case fl Junction-to-Ambient Linear Derating Factor 100 D = 0.50 Thermal Response ( Z thJA ) Parameter Typ. --- 12.5 20 --- 1.0 0.012 Max. 86 --- --- 8.6 --- Units C/W Junction-to-PCB Mounted eA W/C 10 0.20 0.10 0.05 0.02 0.01 J R1 R1 J 1 2 R2 R2 R3 R3 3 R4 R4 4 R5 R5 A 1 2 3 4 5 5 A Ri (C/W) 2.676 9.578 34.880 22.105 16.766 i (sec) 0.00017 0.007941 0.52375 4.978 84 1 Ci= i/Ri Ci= i/Ri 0.1 SINGLE PULSE ( THERMAL RESPONSE ) 0.01 1E-006 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + Tc 0.01 0.1 1 10 100 1000 1E-005 0.0001 0.001 t1 , Rectangular Pulse Duration (sec) Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient Mounted on minimum footprint full size board with metalized Surface mounted on 1 in. square Cu board, steady state. TC measured with thermocouple incontact with top (Drain) of part. back and with small clip heatsink. R is measured at TJ of approximately 90C. Used double sided cooling, mounting pad with large heatsink. Notes: Surface mounted on 1 in. square Cu board (still air). Mounted on minimum footprint full size board with metalized back and with small clip heatsink. (still air) www.irf.com 3 IRF6720S2TR/TR1PbF 100 TOP VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V 100 TOP VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V ID, Drain-to-Source Current (A) 10 BOTTOM ID, Drain-to-Source Current (A) BOTTOM 1 10 0.1 2.5V 0.01 0.1 1 60s PULSE WIDTH Tj = 25C 60s PULSE WIDTH Tj = 175C 2.5V 1 10 100 0.1 1 10 100 VDS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) Fig 4. Typical Output Characteristics 100 VDS = 15V 60s PULSE WIDTH Fig 5. Typical Output Characteristics 2.0 ID = 11A Typical R DS(on) (Normalized) ID, Drain-to-Source Current (A) V GS = 10V V GS = 4.5V 1.5 10 T J = 175C T J = 25C T J = -40C 1 1.0 0.1 1 2 3 4 5 0.5 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Junction Temperature (C) VGS , Gate-to-Source Voltage (V) Fig 6. Typical Transfer Characteristics 10000 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd Fig 7. Normalized On-Resistance vs. Temperature 16 14 Typical R DS(on) ( m) Coss = Cds + Cgd 12 10 8 6 4 2 T J = 25C Vgs = 4.0V Vgs = 4.5V Vgs = 5.0V Vgs = 10V 40 60 80 100 C, Capacitance(pF) 1000 Ciss Coss Crss 100 10 1 10 VDS, Drain-to-Source Voltage (V) 100 0 0 20 ID, Drain Current (A) Fig 8. Typical Capacitance vs.Drain-to-Source Voltage Fig 9. Typical On-Resistance vs. Drain Current and Gate Voltage 4 www.irf.com IRF6720S2TR/TR1PbF 100 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 100 100sec 10 1msec 1 DC 0.1 T A = 25C T J = 150C Single Pulse 10msec 10 T J = 175C T J = 25C 1 T J = -40C VGS = 0V 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VSD, Source-to-Drain Voltage (V) 0.01 0.01 0.10 1.00 10.00 100.00 VDS, Drain-to-Source Voltage (V) Fig 10. Typical Source-Drain Diode Forward Voltage Typical V GS(th) Gate threshold Voltage (V) Fig 11. Maximum Safe Operating Area 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -75 -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( C ) ID = 25A ID = 250A ID = 1.0mA ID = 1.0A 35 30 ID, Drain Current (A) 25 20 15 10 5 0 25 50 75 100 125 150 175 T C , Case Temperature (C) Fig 12. Maximum Drain Current vs. Case Temperature 50 T J = 25C G fs , Forward Transconductance (S) Fig 13. Typical Threshold Voltage vs. Junction Temperature 320 EAS , Single Pulse Avalanche Energy (mJ) 280 240 200 160 120 80 40 0 40 ID 1.5A 2.4A BOTTOM 8.8A TOP 30 T J = 175C 20 10 V DS = 15V 380s PULSE WIDTH 2 0 20 0 40 60 80 100 ID,Drain-to-Source Current (A) 25 50 75 100 125 150 175 Starting T J , Junction Temperature (C) Fig 14. Typ. Forward Transconductance vs. Drain Current Fig 15. Maximum Avalanche Energy vs. Drain Current www.irf.com 5 IRF6720S2TR/TR1PbF 100 Duty Cycle = Single Pulse 10 Avalanche Current (A) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming DTj = 150C and Tstart =25C (Single Pulse) 1 0.01 0.05 0.10 0.1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 25C and Tstart = 150C. 0.01 1.0E-06 1.0E-05 1.0E-04 tav (sec) 1.0E-03 1.0E-02 1.0E-01 Fig 16. Typical Avalanche Current vs.Pulsewidth 80 70 EAR , Avalanche Energy (mJ) TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 8.8A 60 50 40 30 20 10 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (C) Notes on Repetitive Avalanche Curves , Figures 16, 17: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 19a, 19b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 16, 17). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav Fig 17. Maximum Avalanche Energy vs. Temperature 6 www.irf.com IRF6720S2TR/TR1PbF Id Vds Vgs L VCC 0 DUT Vgs(th) 20K 1K S Qgodr Qgd Qgs2 Qgs1 Fig 18a. Gate Charge Test Circuit Fig 18b. Gate Charge Waveform V(BR)DSS 15V tp VDS L DRIVER RG 20V D.U.T IAS tp + V - DD A 0.01 I AS Fig 19b. Unclamped Inductive Waveforms Fig 19a. Unclamped Inductive Test Circuit VDS VGS RG RD VGS 90% D.U.T. + - VDD 10% V10V GS Pulse Width 1 s Duty Factor 0.1 % VDS td(off) tf td(on) tr Fig 20a. Switching Time Test Circuit Fig 20b. Switching Time Waveforms www.irf.com 7 IRF6720S2TR/TR1PbF D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt - + RG * * * * di/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD VDD + - Re-Applied Voltage Body Diode Forward Drop Inductor Curent Inductor Current Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 19. Diode Reverse Recovery Test Circuit for N-Channel HEXFET(R) Power MOSFETs DirectFET Board Footprint, S1 (Small Size Can). Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations CL G = GATE D = DRAIN S = SOURCE D G D S S D D Optional additional pad to allow interchangeability with S2 outline devices. Mandatory pads to fit S1 outline. Note: For the most current drawing please refer to IR website at http://www.irf.com/package 8 www.irf.com IRF6720S2TR/TR1PbF DirectFET Outline Dimension, S1 Outline (Small Size Can). Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations DIMENSIONS METRIC MAX CODE MIN 4.85 A 4.75 3.95 B 3.70 2.85 C 2.75 0.45 D 0.35 0.52 E 0.48 0.62 F 0.58 0.52 G 0.48 1.12 H 1.08 N/A J N/A 0.90 K 0.80 1.80 L 1.70 0.740 M 0.68 R 0.020 0.080 0.17 P 0.08 IMPERIAL MIN 0.187 0.146 0.108 0.014 0.019 0.023 0.019 0.042 N/A 0.031 0.066 0.027 0.001 0.003 MAX 0.191 0.156 0.112 0.018 0.020 0.024 0.020 0.044 N/A 0.035 0.070 0.029 0.003 0.007 DirectFET Part Marking GATE MARKING LOGO PART NUMBER BATCH NUMBER DATE CODE Line above the last character of the date code indicates "Lead-Free" Note: For the most current drawing please refer to IR website at http://www.irf.com/package www.irf.com 9 IRF6720S2TR/TR1PbF DirectFET Tape & Reel Dimension (Showing component orientation). NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6720S2TRPBF). For 1000 parts on 7" reel, order IRF6720S2TR1PBF REEL DIMENSIONS STANDARD OPTION (QTY 4800) TR1 OPTION (QTY 1000) IMPERIAL IMPERIAL METRIC METRIC MIN MAX MIN CODE MAX MIN MIN MAX MAX 12.992 A N.C 6.9 N.C 177.77 N.C 330.0 N.C 0.795 B 0.75 N.C N.C 19.06 20.2 N.C N.C 0.504 C 0.53 0.50 13.5 12.8 0.520 13.2 12.8 0.059 D 0.059 1.5 1.5 N.C N.C N.C N.C 3.937 E 2.31 N.C 58.72 100.0 N.C N.C N.C F N.C N.C N.C N.C 0.53 0.724 18.4 13.50 G 0.488 0.47 11.9 12.4 N.C 0.567 14.4 12.01 H 0.469 0.47 11.9 11.9 N.C 0.606 15.4 12.01 LOADED TAPE FEED DIRECTION NOTE: CONTROLLING DIMENSIONS IN MM CODE A B C D E F G H DIMENSIONS IMPERIAL METRIC MIN MAX MIN MAX 0.311 0.319 7.90 8.10 0.154 0.161 3.90 4.10 0.469 0.484 11.90 12.30 0.215 0.219 5.45 5.55 0.201 0.209 5.10 5.30 0.256 0.264 6.50 6.70 0.059 N.C 1.50 N.C 0.059 1.50 0.063 1.60 Note: For the most current drawing please refer to IR website at http://www.irf.com/package Data and specifications subject to change without notice. This product has been designed and qualified to MSL1 rating for the Consumer market. Additional storage requirement details for DirectFET products can be found in application note AN1035 on IRs Web site. Qualification Standards can be found on IR's Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.04/08 10 www.irf.com |
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