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Features
General
* Single Chip Turnkey Solution * Strong Challenge-Response Authentication Using Digital Signature * Digital Signature (3DES MAC, PKCS#1 RSASSA_PSS and RSASSA_PKCS1_v1_5, * * * * * * * * * * * * * *
DSA, EC-DSA, HMAC) Encryption (3DES, PKCS#1 RSAES_OAEP and RSAES_PKCS1_v1_5) Message Digest (SHA-1, SHA-256) Public Key Pair Generation (RSA, RSA-CRT, DSA and EC-DSA) High Speed Hardware Cryptographic Engines - Hardware 3DES Crypto Accelerator (112-bits keys) - Hardware 32-bit Public Key Crypto Accelerator (RSA / DSA 2048 bits, ECC 384 bits) RSA 2048 signature in less than 360 ms, and verification in less than 60 ms 3DES encryption up to 50 KByte/s SecureAVRTM 8-/16-bit RISC CPU Internal 16K bytes EEPROM (10 years data retention, 500K cycles) with password protected file system Flexible communication interface (Serial Peripheral Interface (SPI), Two Wire Interface (TWI) or half-duplex ISO-7816 UART using T=0 or T=1 protocols) FIPS 140-2 Random Number Generator Secure Architecture Based on ATMEL secureAVR Microcontroller (AT90SC) - To meet FIPS140-2 requirements - To meet Common Criteria EAL4+ requirements Operating Range 1.62V to 5.5V Lower Power Consumption 20-QFN and 8-SOIC Packages
Secure ASSP AT98SC016CU Summary
Description
Based on ATMEL Smart Card chip design expertise and leadership, the AT98SC016CU is a fully integrated secure solution (Hardware and Firmware) designed for embedded systems (Servers/Routers, Peripherals, Set Top Boxes, PDAs, Vending/gaming machines, etc.). This secure chip has been designed to serve anti-cloning, access control and hardware protection applications. It provides an embedded crypto application allowing a strong authentication, digital signature, encryption, message digest and secure storage of user data (keys, etc.). The AT98SC016CU includes a hardware Triple DES supporting symmetric-key operations and a 32-bit crypto accelerator for public-key operations (RSA, DSA and Elliptic Curves signature algorithms). The chip comprises also a FIPS 140-2 Random Number Generator used to generate on-chip public keys and challenges during authentication process. Communication can occur through SPI or TWI using a proprietary block protocol, or through the ISO7816 UART interface using T=0 or T=1. In addition to the crypto application, the chip provides a robust communication protocol, a persistent data storage with secure memory management (access control, anti-tearing), and an administration application to manage contents and configuration of the chip. State-of-the-art security features embedded in Smart Card secure products dedicated for Banking, ID and Pay-TV are also included in the AT98SC016CU. This includes power and frequency protection logic, logical scrambling on data and address, power
6566AS-SMS-08Jun07
Note: This is a summary document. A complete document will be available under NDA. For more information, please contact your local Atmel sales office.
analysis countermeasures and EEPROM access control. The AT98SC016CU is offered to OEM manufacturers as a turnkey and easy-to-use solution, including the firmware integrated on the chip. ATMEL provides an evaluation kit, a full datasheet and an application note for customer integration support.
CRYPTO APPLICATION
ADMINISTRATION APPLICATION
Crypto services
( MAC,Signature,...)
Application management Data storage
(File System)
&
Administration services
(Key management)
Crypto Library
Memory
Management
Communication Stack
AT98SC016CU Hardware
DES Public Key Crypto Engine EEProm
secureAVR
RAM Power Management SPI / TWI / ISO7816
CRC
TWI SPI T=0 T=1
CORE
Hardware Security
Device
Figure 1. AT98SC016CU Hardware and Software Diagram
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AT98SC016CU
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AT98SC016CU
20-QFN (Quad Flat No Lead) - RoHS - All protocols
PIN# 1 2 3 4 5 6 10 11 12 13 14 15 16 20 Other Name A0 A1 A2 RST* Vcc MISO MOSI GND SS* / SCL IO / SPISEL* / SDA A3 A4 SCK CLK / GND Not Connected Description TWI Address selection line A0 TWI Address selection line A1 TWI Address selection line A2 CPU Reset Power supply SPI Master Input Slave Output SPI Master Output Slave Input Ground (reference voltage) SPI Slave Select or TWI clock ISO7816 I/O or SPI/TWI selection or TWI Data TWI Address selection line A3 TWI Address selection line A4 SPI clock ISO 7816 Clock or Ground (reference voltage) (do not connect to GND)
Figure 2. 20-QFN Package diagram, drawing and pinout.
3
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8-SOIC (207 mils body) - RoHS - (SPI / TWI only)
PIN# 1 Name MOSI GND SS* / SCL SPISEL* / SDA SCK RST* Vcc MISO Description SPI Master Output Slave Input Ground SPI Slave Select / TWI clock SPI/TWI selection / TWI Data SPI clock CPU Reset Power supply SPI Master Input Slave Output
1 2 3 4
8 7 6 5
2 3 4 5 6 7 8
Figure 3. 8-SOIC Package diagram, drawing and pinout.
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AT98SC016CU
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Literature Requests
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Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL'S TERMS AND CONDITIONS OF SALE LOCATED ON ATMEL'S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications

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