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| Tiny, Low Power JFET-Input Op Amp ADA4062-2 FEATURES Low input bias current: 50 pA maximum Offset voltage 1.5 mV maximum for ADA4062-2 B grade 2.5 mV maximum for ADA4062-2 A grade Offset voltage drift: 4 V/C typical Slew rate: 3.3 V/s typical CMRR: 90 dB typical Low supply current: 165 A typical High input impedance Unity-gain stable Packaging: SOIC, MSOP PIN CONFIGURATIONS OUT A 1 -IN A 2 +IN A 3 V- 4 ADA4062-2 TOP VIEW (Not to Scale) 8 7 6 5 V+ OUT B +IN B 07670-001 07670-002 -IN B Figure 1. 8-Lead Narrow-Body SOIC OUT A 1 -IN A 2 +IN A 3 V- 4 V+ OUT B -IN B +IN B 8 ADA4062-2 TOP VIEW (Not to Scale) 7 6 5 Figure 2. 8-Lead MSOP APPLICATIONS Power control and monitoring Active filters Industrial/process control Body probe electronics Data acquisition Integrators Input buffering GENERAL DESCRIPTION The ADA4062-2 is a dual JFET-input amplifier with industryleading performance. It offers lower power, offset voltage, drift and ultralow bias current. The ADA4062-2 B grade features typical low offset voltage of 0.5 mV, offset drift of 4 V/C, and bias current of 2 pA. The ADA4062-2 is ideal for various applications, including process control, industrial and instrumentation equipment, active filtering, data conversion, buffering, and power control and monitoring. With a low supply current of 165 A per amplifier, it is also very well suited for lower power applications. The ADA4062-2 is specified for the extended industrial temperature range of -40C to +125C and is available in lead-free SOIC and MSOP packages. Table 1. Low Power Op Amps Supply Single Dual 40 V OP97 OP297 36 V AD820 OP282 AD8682 AD822 OP482 AD8684 AD824 12 V to 16 V AD8641 AD8663 AD8642 AD8667 AD8643 AD8669 5V AD8541 AD8542 Quad OP497 AD8544 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2008 Analog Devices, Inc. All rights reserved. ADA4062-2 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Pin Configurations ........................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Characteristics ............................................................. 3 Absolute Maximum Ratings............................................................ 4 Thermal Resistance ...................................................................... 4 Power Sequencing ........................................................................ 4 ESD Caution...................................................................................4 Typical Performance Characteristics ..............................................5 Applications Information .............................................................. 14 Notch Filter ................................................................................. 14 High-Side Signal Conditioning ................................................ 14 Micropower Instrumentation Amplifier ................................. 14 Phase Reversal ............................................................................ 14 Schematic ......................................................................................... 16 Outline Dimensions ....................................................................... 17 Ordering Guide .......................................................................... 18 REVISION HISTORY 10/08--Revision 0: Initial Version Rev. 0 | Page 2 of 20 ADA4062-2 SPECIFICATIONS ELECTRICAL CHARACTERISTICS VSY = 15 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 2. Parameter INPUT CHARACTERISTICS Offset Voltage B Grade A Grade -40C TA +125C Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio B Grade A Grade Large-Signal Voltage Gain Offset Voltage Drift Input Resistance Input Capacitance, Differential Mode Input Capacitance, Common Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio B Grade A Grade Supply Current per Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product Phase Margin Channel Separation NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density ISY AVO VOS/T RIN CINDM CINCM VOH VOL ISC ZOUT PSRR VSY = 4 V to 18 V -40C TA +125C VSY = 4 V to 18 V -40C TA +125C IO = 0 mA -40C TA +125C RL = 10 k, CL = 100 pF, AV = 1 To 0.01%, VIN = 2 V step, CL = 100 pF, RL = 5 k, AV = 1 RL = 10 k, AV = 1 RL = 10 k, AV = 1 f = 10 kHz f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz Rev. 0 | Page 3 of 20 Symbol VOS Conditions Min Typ Max Unit 0.5 -40C TA +125C 0.75 IB -40C TA +125C IOS -40C TA +125C -40C TA +125C CMRR VCM = -11.5 V to +11.5 V -40C TA +125C VCM = -11.5 V to +11.5 V -40C TA +125C RL = 10 k, VO = -10 V to +10 V -40C TA +125C -40C TA +125C 80 80 74 70 76 72 90 90 83 4 10 1.5 4.8 13 12.5 13.5 -13.8 20 4 -11.5 0.5 2 1.5 3 2.5 5 50 5 25 2.5 +15 mV mV mV mV pA nA pA nA V dB dB dB dB dB dB V/C T pF pF V V V V mA RL = 10 k to VCM -40C TA +125C RL = 10 k to VCM -40C TA +125C f = 100 kHz, AV = 1 -13 -12.5 80 80 74 70 90 90 165 200 220 dB dB dB dB A A V/s s MHz Degrees dB V p-p nV/Hz fA/Hz SR tS GBP M CS en p-p en in 3.3 3.5 1.4 80 130 1.5 36 5 ADA4062-2 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Supply Voltage Input Voltage Differential Input Voltage Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec) Rating 18 V VSY VSY Indefinite -65C to +150C -40C to +125C -65C to +150C 300C THERMAL RESISTANCE JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. It was measured using a standard 2-layer board. Table 4. Thermal Resistance Package Type 8-Lead SOIC 8-Lead MSOP JA 158 210 JC 43 45 Unit C/W C/W POWER SEQUENCING Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The op amp supply voltages must be established simultaneously with, or before, any input signals are applied. If this is not possible, the input current must be limited to 10 mA. ESD CAUTION Rev. 0 | Page 4 of 20 ADA4062-2 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C, unless otherwise noted. 280 240 VSY = 15V VCM = 0V 70 60 NUMBER OF AMPLIFERS VSY = 5V VCM = 0V NUMBER OF AMPLIFERS 200 160 120 80 40 0 50 40 30 20 10 0 07670-003 -3 -2 -1 0 VOS (mV) 1 2 3 -4 -3 -2 -1 0 VOS (mV) 1 2 3 4 Figure 3. Input Offset Voltage Distribution Figure 6. Input Offset Voltage Distribution 40 VSY = 15V -40C TA +125C 40 VSY = 5V -40C TA +125C NUMBER OF AMPLIFERS 20 NUMBER OF AMPLIFERS 30 30 20 10 10 -2 0 2 4 TCVOS (V/C) 6 8 10 TCVOS (V/C) Figure 4. Input Offset Voltage Drift Distribution Figure 7. Input Offset Voltage Drift Distribution 5 4 3 2 VSY = 15V 5 4 3 2 VSY = 5V VOS (mV) 0 -1 -2 -3 -4 07670-006 VOS (mV) 1 1 0 -1 -2 -3 -4 -12 -9 -6 -3 0 VCM (V) 3 6 9 12 15 -3 -2 -1 0 1 2 3 4 5 VCM (V) Figure 5. Input Offset Voltage vs. Common-Mode Voltage Figure 8. Input Offset Voltage vs. Common-Mode Voltage Rev. 0 | Page 5 of 20 07670-056 -5 -15 -5 -4 07670-055 -2 0 2 4 6 8 10 07670-005 0 0 07670-054 ADA4062-2 10000 VSY = 15V 10000 VSY = 5V 1000 1000 100 100 IB (pA) 10 IB (pA) 10 1 1 07670-009 -25 0 25 50 75 100 125 -25 0 25 50 75 100 125 TEMPERATURE (C) TEMPERATURE (C) Figure 9. Input Bias Current vs. Temperature Figure 12. Input Bias Current vs. Temperature 5 VSY = 15V 3 VSY = 5V 4 2 3 IB (pA) IB (pA) 1 2 0 1 -1 07670-010 -8 -6 -4 -2 0 2 4 6 8 10 12 14 16 -2 -1 0 1 VCM (V) 2 3 4 5 VCM (V) Figure 10. Input Bias Current vs. Input Common-Mode Voltage Figure 13. Input Bias Current vs. Input Common-Mode Voltage 10 VSY = 15V 10 VSY = 5V OUTPUT VOLTAGE TO SUPPLY RAIL (V) VCC - VOH 1 OUTPUT VOLTAGE TO SUPPLY RAIL (V) VCC - VOH 1 VOL - VEE VOL - VEE 07670-011 0.1 1 LOAD CURRENT (mA) 10 100 0.1 1 LOAD CURRENT (mA) 10 100 Figure 11. Output Voltage to Supply Rail vs. Load Current Figure 14. Output Voltage to Supply Rail vs. Load Current Rev. 0 | Page 6 of 20 07670-014 0.1 0.01 0.1 0.01 07670-013 0 -12 -10 -2 -3 07670-012 0.1 -50 0.1 -50 ADA4062-2 2.0 OUTPUT VOTLAGE TO SUPPLY RAIL (V) VCC - VOH 1.5 OUTPUT VOTLAGE TO SUPPLY RAIL (V) VSY = 15V RL = 10k 2.0 VSY = 5V RL = 10k 1.5 VCC - VOH VOL - VEE 1.0 1.0 VOL - VEE 0.5 0.5 -25 0 25 50 75 100 125 07670-015 -25 0 25 50 75 100 125 TEMPERATURE (C) TEMPERATURE (C) Figure 15. Output Voltage to Supply Rail vs. Temperature Figure 18. Output Voltage to Supply Rail vs. Temperature 120 100 80 60 PHASE VSY = 15V 120 100 80 60 40 120 100 80 60 PHASE (Degrees) GAIN (dB) VSY = 5V PHASE 120 100 80 60 40 20 0 -20 -40 07670-019 07670-020 40 20 0 -20 -40 -60 1k 10k 100k 1M 10M GAIN 40 20 0 -20 -40 GAIN 20 0 -20 -40 07670-016 -60 100M -60 1k 10k 100k 1M 10M -60 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 16. Open-Loop Gain and Phase vs. Frequency Figure 19. Open-Loop Gain and Phase vs. Frequency 50 AV = +100 40 30 50 VSY = 15V 40 30 GAIN (dB) AV = +100 VSY = 5V AV = +10 GAIN (dB) AV = +10 20 10 0 -10 -20 10 AV = +1 20 10 0 -10 -20 10 AV = +1 07670-017 100 1k 10k 100k 1M 10M 100M 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 17. Closed-Loop Gain vs. Frequency Figure 20. Closed-Loop Gain vs. Frequency Rev. 0 | Page 7 of 20 PHASE (Degrees) GAIN (dB) 07670-018 0 -50 0 -50 ADA4062-2 1000 VSY = 15V 1000 VSY = 5V 100 AV = +100 100 ZOUT () ZOUT () 10 AV = +10 10 AV = +100 AV = +10 AV = +1 1 AV = +1 1 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 21. Output Impedance vs. Frequency Figure 24. Output Impedance vs. Frequency 100 90 80 70 CMRR (dB) VSY = 15V 100 90 80 70 VSY = 5V 50 40 30 20 10 1k 10k 100k 1M 10M 07670-022 CMRR (dB) 60 60 50 40 30 20 10 1k 10k 100k 1M 10M 07670-025 07670-026 0 100 0 100 FREQUENCY (Hz) FREQUENCY (Hz) Figure 22. CMRR vs. Frequency Figure 25. CMRR vs. Frequency 140 120 100 80 VSY = 15V 120 100 80 VSY = 5V PSRR (dB) PSRR (dB) 60 PSRR+ 40 20 0 -20 PSRR- 60 40 20 0 PSRR- PSRR+ 07670-023 -20 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 23. PSRR vs. Frequency Figure 26. PSRR vs. Frequency Rev. 0 | Page 8 of 20 07670-024 07670-021 0.1 100 0.1 100 ADA4062-2 60 VSY = 15V AV = +1 RL = 10k 60 50 50 VSY = 5V AV = +1 RL = 10k OVERSHOOT (%) OVERSHOOT (%) 40 40 30 30 20 20 10 10 07670-027 100 CL (pF) 1000 10000 100 CL (pF) 1000 10000 Figure 27. Small-Signal Overshoot vs. Load Capacitance Figure 30. Small-Signal Overshoot vs. Load Capacitance VOLTAGE (5V/DIV) VOLTAGE (1V/DIV) VSY = 15V VIN = 20V p-p AV = +1 RL = 10k CL = 100pF VSY = 5V VIN = 4V p-p AV = +1 RL = 10k CL = 100pF 07670-028 TIME (10s/DIV) TIME (4s/DIV) Figure 28. Large-Signal Transient Response Figure 31. Large-Signal Transient Response VOLTAGE (20mV/DIV) VOLTAGE (20mV/DIV) VSY = 15V VIN = 100mV p-p AV = +1 RL = 10k CL = 100pF VSY = 5V VIN = 100mV p-p AV = +1 RL = 10k CL = 100pF 07670-029 TIME (10s/DIV) TIME (10s/DIV) Figure 29. Small-Signal Transient Response Figure 32. Small-Signal Transient Response Rev. 0 | Page 9 of 20 07670-032 07670-031 07670-030 0 10 0 10 ADA4062-2 4 2 0 INPUT VOLTAGE (V) VSY = 15V INPUT 4 VSY = 5V 2 INPUT 0 OUTPUT VOLTAGE (V) OUTPUT 0 -5 -10 -15 OUTPUT 0 -2 -4 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 07670-035 07670-037 07670-036 TIME (2s/DIV) 07670-033 -20 INPUT VOLTAGE (V) TIME (2s/DIV) -6 Figure 33. Negative Overload Recovery Figure 36. Negative Overload Recovery 2 0 -2 INPUT VSY = 15V 2 0 -2 INPUT VSY = 5V OUTPUT VOLTAGE (V) INPUT VOLTAGE (V) 15 10 5 OUTPUT 0 -5 INPUT VOLTAGE (V) 4 2 OUTPUT 0 -2 TIME (2s/DIV) 07670-034 TIME (2s/DIV) Figure 34. Positive Overload Recovery Figure 37. Positive Overload Recovery INPUT VSY = 15V IDEAL STEP FUNCTION OF 10V INPUT VSY = 5V VOLTAGE (5V/DIV) VOLTAGE (1V/DIV) +10mV ERROR BAND OUTPUT 0V -10mV +2mV OUTPUT 0V ERROR BAND -2mV 07670-042 TIME (1s/DIV) TIME (2s/DIV) Figure 35. Positive Settling Time to 0.01% Figure 38. Positive Settling Time to 0.01% Rev. 0 | Page 10 of 20 ADA4062-2 VSY = 15V VSY = 5V VOLTAGE (5V/DIV) VOLTAGE (1V/DIV) INPUT INPUT +10mV ERROR BAND OUTPUT 0V -10mV +2mV ERROR BAND OUTPUT 0V -2mV 07670-038 TIME (1s/DIV) TIME (2s/DIV) Figure 39. Negative Settling Time to 0.01% Figure 42. Negative Settling Time to 0.01% 1000 VSY = 15V VOLTAGE NOISE DENSITY (nV/Hz) 1000 VSY = 5V VOLTAGE NOISE DENSITY (nV/Hz) 100 100 07670-040 1 10 100 1k 10k 100k 1 10 100 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure 40. Voltage Noise Density Figure 43. Voltage Noise Density VSY = 15V INPUT NOISE VOLTAGE (0.5V/DIV) INPUT NOISE VOLTAGE (0.5V/DIV) VSY = 5V 07670-041 TIME (1s/DIV) TIME (1s/DIV) Figure 41. 0.1 Hz to 10 Hz Noise Figure 44. 0.1 Hz to 10 Hz Noise Rev. 0 | Page 11 of 20 07670-044 07670-043 10 10 07670-039 ADA4062-2 410 410 390 125C SUPPLY CURRENT (A) 370 VSY = 15V 350 VSY = 5V 330 310 290 270 -50 390 SUPPLY CURRENT (A) 370 85C 350 25C 330 310 -40C 07670-045 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 SUPPLY VOLTAGE (V) -25 0 25 50 75 100 125 TEMPERATURE (C) Figure 45. Supply Current vs. Supply Voltage Figure 48. Supply Current vs. Temperature 0 -20 CHANNEL SEPARATION (dB) -40 -60 -80 -100 -120 -140 07670-046 VSY = 15V VIN = 10V p-p RL = 10k 0 -20 CHANNEL SEPARATION (dB) -40 -60 -80 -100 -120 -140 VSY = 5V VIN = 5V p-p RL = 10k 1k FREQUENCY (Hz) 10k 100k 100 1k FREQUENCY (Hz) 10k 100k Figure 46. Channel Separation vs. Frequency Figure 49. Channel Separation vs. Frequency 100 VSY = 15V f = 1kHz RL = 10k 100 VSY = 5V f = 1kHz RL = 10k 10 10 THD + N (%) 0.1 THD + N (%) 1 1 0.1 0.01 0.01 07670-047 0.01 0.1 AMPLITUDE (V rms) 1 10 0.01 0.1 AMPLITUDE (V rms) 1 10 Figure 47. THD + N vs. Amplitude Figure 50. THD + N vs. Amplitude Rev. 0 | Page 12 of 20 07670-050 0.001 0.001 0.001 0.001 07670-049 -160 100 -160 07670-048 290 ADA4062-2 10 VSY = 15V VIN = 0.5 V rms RL = 10k 10 VSY = 5V VIN = 0.5 V rms RL = 10k 1 1 THD + N (%) 0.01 THD + N (%) 07670-051 0.1 0.1 0.01 0.001 0.001 10 100 1k FREQUENCY (Hz) 10k 100k 10 100 1k FREQUENCY (Hz) 10k 100k Figure 51. THD + N vs. Frequency Figure 52. THD + N vs. Frequency Rev. 0 | Page 13 of 20 07670-052 0.0001 0.0001 ADA4062-2 APPLICATIONS INFORMATION NOTCH FILTER A notch filter rejects a specific interfering frequency and can be implemented using a single op amp. Figure 53 shows a 60 Hz notch filter that uses the twin T network with the ADA4062-2 configured as a voltage follower. The ADA4062-2 works as a buffer that provides high input resistance and low output impedance. The low bias current (2 pA typical) and high input resistance (10 T typical) of the ADA4062-2 enable large resistors and small capacitors to be used. Alternatively, different combinations of resistors and capacitors values can be used to achieve the desired notch frequency. However, the major drawback to this circuit topology is the need to ensure that all the resistors and capacitors be closely matched. If they are not closely matched, the notch frequency offset and drift cause the circuit to attenuate at a frequency other than the ideal notch frequency. Therefore, to achieve the desired performance, 1% or better component tolerances are usually required. In addition, a notch filter requires an op amp with a bandwidth of at least 100 to 200 times the center frequency. Hence, using the ADA4062-2 with a bandwidth of 1.4 MHz is excellent for a 60 Hz notch filter. Figure 54 shows the gain of the notch filter with respect to frequency. At 60 Hz, the notch filter has about 50 dB attenuation of signal. +VSY HIGH-SIDE SIGNAL CONDITIONING There are many applications that require the sensing of signals near the positive rail. The ADA4062-2 can be used in high-side current sensing applications. Figure 55 shows a high-side signal conditioning circuit using the ADA4062-2. The ADA4062-2 has an input common-mode range that includes the positive supply (-11.5 V VCM +15 V). In the circuit, the voltage drop across a low value resistor, such as the 0.1 shown in Figure 55, is amplified by a factor of 5 using the ADA4062-2. +15V 0.1 500k 100k 100k 500k +15V 1/2 -15V VO 07670-058 RL ADA4062-2 Figure 55. High-Side Signal Conditioning MICROPOWER INSTRUMENTATION AMPLIFIER The ADA4062-2 is a dual amplifier and is perfectly suited for applications that require lower supply currents. For supply voltages of 15 V, the supply current per amplifier is 165 A typical. The ADA4062-2 also offers a typical low offset voltage drift of 4 V/C and a very low bias current of 2 pA, which makes it well suited for instrumentation amplifiers. Figure 56 shows the classic 2-op-amp instrumentation amplifier with four resistors using the ADA4062-2. The key to high CMRR for this instrumentation amplifier are resistors that are well matched to both the resistive ratio and relative drift. For true difference amplification, matching of the resistor ratio is very important, where R3/R4 = R1/R2. Assuming perfectly matched resistors, the gain of the circuit is 1 + R2/R1, which is approximately 100. Tighter matching of two op amps in one package, as is the case with the ADA4062-2, offers a significant boost in performance over the 3-op-amp configuration. Overall, the circuit only requires about 330 A of supply current. R3 10.1k R4 1M +15V R1 10.1k R2 1M +15V IN R1 804k R2 804k C3 6.6nF R3 402k 1/2 VO ADA4062-2 -VSY C1 3.3nF C2 3.3nF fO = 2 R C 11 C1 = C2 = C3 2 07670-060 1 R1 = R2 = 2R3 Figure 53. Notch Filter Circuit 20 10 0 -10 1/2 ADA4062-2 V1 V2 -15V 1/2 VO ADA4062-2 -15V GAIN (dB) -20 -30 -40 -50 -60 -70 100 FREQUENCY (Hz) 1k 07670-057 VO = 100(V2 - V1) TYPICAL: 0.5mV < V2 - V1< 135mV TYPICAL: -13.8V < VO < +13.5V USE MATCHED RESISTORS Figure 56. Micropower Instrumentation Amplifier PHASE REVERSAL Phase reversal occurs in some amplifiers when the input commonmode voltage range is exceeded. When the voltage driving the input to these amplifiers exceeds the maximum input commonmode voltage range, the output of the amplifiers changes polarity. -80 10 Figure 54. Notch Filter: Gain vs. Frequency Rev. 0 | Page 14 of 20 07670-059 ADA4062-2 Most JFET input amplifiers have phase reversal if either input exceeds the input common-mode range. For the ADA4062-2, the output does not phase reverse if one or both of the inputs exceeds the input voltage range but stays below the positive supply rail and 0.5 V above the negative supply rail. With a supply voltage of 15 V, phase reversal occurs when the input voltage is a negative signal greater than -14.5 V. This is due to saturation of the input stage leading to forward biasing of the gate-drain diode. Phase reversal in ADA4062-2 can be prevented by using a Schottky diode to clamp the input terminals to each other. In the simple buffer circuit in Figure 57, D1 protects the op amp against phase reversal and R limits the input current that flows into the op amp. +VSY VIN VSY = 15V VOUT VOLTAGE (5V/DIV) TIME (40s/DIV) Figure 58. No Phase Reversal -VSY Figure 57. Phase Reversal Solution Circuit 07670-053 IN R D1 10k IN5711 1/2 VO ADA4062-2 Rev. 0 | Page 15 of 20 07670-038 ADA4062-2 SCHEMATIC VCC OUT A/ OUT B -IN A/ -IN B +IN A/ +IN B VEE Figure 59. Simplified Schematic Rev. 0 | Page 16 of 20 07670-062 ADA4062-2 OUTLINE DIMENSIONS 3.20 3.00 2.80 3.20 3.00 2.80 PIN 1 8 5 1 5.15 4.90 4.65 4 0.65 BSC 0.95 0.85 0.75 0.15 0.00 0.38 0.22 SEATING PLANE 1.10 MAX 8 0 0.80 0.60 0.40 0.23 0.08 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 60. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 8 1 5 4 6.20 (0.2441) 5.80 (0.2284) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 1.75 (0.0688) 1.35 (0.0532) 0.50 (0.0196) 0.25 (0.0099) 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 45 0.51 (0.0201) 0.31 (0.0122) COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 61. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) Rev. 0 | Page 17 of 20 012407-A ADA4062-2 ORDERING GUIDE Model ADA4062-2ARMZ 1 ADA4062-2ARMZ-RL1 ADA4062-2ARZ1 ADA4062-2ARZ-R71 ADA4062-2ARZ-RL1 ADA4062-2BRZ1 ADA4062-2BRZ-R71 ADA4062-2BRZ-RL1 1 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N Package Option RM-8 RM-8 R-8 R-8 R-8 R-8 R-8 R-8 Branding A25 A25 Z = RoHS Compliant Part. Rev. 0 | Page 18 of 20 ADA4062-2 NOTES Rev. 0 | Page 19 of 20 ADA4062-2 NOTES (c)2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07670-0-10/08(0) Rev. 0 | Page 20 of 20 |
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