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 HD74HCT688
8-bit Magnitude Comparator
REJ03D0673-0200 (Previous ADE-205-563) Rev.2.00 Mar 30, 2006
Description
The HD74HCT688 compares bit for bit two 8-bit words and indicates whether or not they are equal. The P=Q output indicates equality when it is low. A single active low enable is provided to facilitate cascading of several packages and enable comparison of words greater than 8-bits. This device is useful in memory block decoding applications, where memory block enable signals must be generated from computer address information.
Features
* * * * * * * LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (Data to P=Q) = 18 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 A max Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25C) Ordering Information
Part Name HD74HCT688P HD74HCT688FPEL HD74HCT688RPEL Package Type DILP-20 pin (JEDEC) SOP-20 pin (JEITA) SOP-20 pin (JEDEC) Package Code (Previous Code) PRDP0020AC-B (DP-20NEV) PRSP0020DD-B (FP-20DAV) PRSP0020DC-A (FP-20DBV) P FP RP Package Abbreviation -- EL (2,000 pcs/reel) EL (1,000 pcs/reel) Taping Abbreviation (Quantity)
Function Table
Input Data P, Q P=Q P>Q PH: L: X:
Rev.2.00, Mar 30, 2006 page 1 of 7
HD74HCT688
Pin Arrangement
G P0 Q0 P1 Q1 P2 Q2 P3 Q3 1 2 3 4 5 6 7 8 9 20 VCC 19 P=Q 18 Q7 17 P7 16 Q6 15 P6 14 Q5 13 P5 12 Q4 11 P4 (Top view)
GND 10
Rev.2.00, Mar 30, 2006 page 2 of 7
HD74HCT688
Logic Diagram
P0 Q0 P1 Q1 P2 Q2 P3 Q3 P4 P=Q Q4 P5 Q5 P6 Q6 P7 Q7 G
Absolute Maximum Ratings
Item Supply voltage range Input / Output voltage Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Symbol VCC VIN, VOUT IIK, IOK IOUT ICC or IGND PT Tstg Ratings -0.5 to 7.0 -0.5 to VCC +0.5 20 25 50 500 -65 to +150 Unit V V mA mA mA mW C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.
Rev.2.00, Mar 30, 2006 page 3 of 7
HD74HCT688
Recommended Operating Conditions
Item Supply voltage Input / Output voltage Operating temperature Input rise / fall time*1 Symbol VCC VIN, VOUT Ta tr, tf Ratings 4.5 to 5.5 0 to VCC -40 to 85 0 to 500 Unit V V C ns Conditions
VCC = 4.5 V
Notes: 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics.
Electrical Characteristics
Item Input voltage Output voltage Symbol VCC (V) Min VIH 4.5 to 5.5 2.0 4.5 to 5.5 -- VIL VOH 4.5 4.4 4.5 4.18 VOL 4.5 -- 4.5 -- Iin ICC 5.5 5.5 -- -- Ta = 25C Typ Max -- -- -- 0.8 -- -- -- -- -- 0.1 -- 0.26 -- -- 0.1 4.0 Ta = -40 to+85C Min Max 2.0 -- -- 0.8 4.4 -- 4.13 -- -- 0.1 -- 0.33 -- -- 1.0 40 Unit Test Conditions V V V Vin = VIH or VIL IOH = -20 A IOH = -4 mA V Vin = VIH or VIL IOL = 20 A IOL = 4 mA A A Vin = VCC or GND Vin = VCC or GND, Iout = 0 A
Input current Quiescent current
Switching Characteristics
(CL = 50 pF, Input tr = tf = 6 ns)
Item Propagation delay time Symbol VCC (V) tPLH tPHL tPLH tPHL Output rise/fall time Input capacitance tTLH tTHL Cin 4.5 4.5 4.5 4.5 4.5 -- Ta = 25C Ta = -40 to +85C Unit Min Typ Max Min Max Test Conditions -- 17 42 -- 53 ns Por Q to output -- 19 42 -- 53 -- 9 24 -- 30 ns Enable to output -- 12 24 -- 30 -- -- 5 5 15 10 -- -- 19 10 ns pF
Test Circuit
VCC VCC
Input Pulse Generator Zout = 50
See Function Table
G P1 P7 Q0 Q7 P=Q CL = 50 pF Output
Note : 1. CL includes probe and jig capacitance.
Rev.2.00, Mar 30, 2006 page 4 of 7
HD74HCT688
Waveforms
* Waveform - 1
tr P or Q
90% 1.3V 10%
tf
90% 1.3V 10%
VCC 0V
tw tPLH P=Q tTLH
90% 1.3V
tPHL
90% 1.3V 10%
VOH VOL
tTHL tr
90% 1.3V
* Waveform - 2
90% 1.3V
tf
VCC 0V
G
10%
10%
tPHL
90%
tPLH
90% 1.3V 10% 1.3V 10%
VOH VOL
P=Q
tTHL
tTLH
Notes : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns
Rev.2.00, Mar 30, 2006 page 5 of 7
HD74HCT688
Package Dimensions
JEITA Package Code P-DIP20-6.3x24.5-2.54 RENESAS Code PRDP0020AC-B Previous Code DP-20NEV MASS[Typ.] 1.26g
D
20
11
1 0.89 b3
10
Z
A1
A
E
Reference Symbol
Dimension in Millimeters
Min
e
bp
e1
c
( Ni/Pd/Au plating )
e1 D E A A1 bp b3 c e Z L
Nom Max 7.62 24.50 25.40 6.30 7.00 5.08
L
0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0 15 2.29 2.54 2.79 1.27 2.54
JEITA Package Code P-SOP20-7.5x12.8-1.27
RENESAS Code PRSP0020DC-A
Previous Code FP-20DBV
MASS[Typ.] 0.52g
*1
D
F 11
20
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" @ DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT @ INCLUDE TRIM OFFSET.
bp
HE E
*2
Index mark
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
c
Reference Dimension in Millimeters Symbol
10 bp x M L1
A1
y
L
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 12.80 13.2 7.50
0.10 0.20 0.30 2.65 0.34 0.40 0.46 0.20 0.25 0.30 0 8 10.00 10.40 10.65 1.27 0.12 0.15 0.935 0.40 0.70 1.27 1.45
Rev.2.00, Mar 30, 2006 page 6 of 7
A
HD74HCT688
JEITA Package Code P-SOP20-5.5x12.6-1.27 RENESAS Code PRSP0020DD-B Previous Code FP-20DAV MASS[Typ.] 0.31g
*1
D 11
F
20
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE
E
Index mark
*2
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
10 bp x M L1
c
Reference Dimension in Millimeters Symbol
y
A1
L
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 12.60 13.0 5.50
0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0 8 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15
Rev.2.00, Mar 30, 2006 page 7 of 7
A
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1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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Colophon .6.0


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