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3SK295
Silicon N-Channel Dual Gate MOS FET
REJ03G0814-0300 (Previous ADE-208-387A) Rev.3.00 Aug. 10, 2005
Application
* UHF RF amplifier
Features
* Low noise figure. NF = 2.0 dB typ. at f = 900 MHz * Capable of low voltage operation
Outline
RENESAS Package code: PLSP0004ZA-A (Package name: MPAK-4)
2
3 1 4
1. Source 2. Gate1 3. Gate2 4. Drain
Note:
Marking is "ZQ-"
Attention: This device is very sensitive to electro static discharge. It is recommended to adopt appropriate cautions when handling this transistor.
Rev.3.00, Aug 10.2005, page 1 of 6
3SK295
Absolute Maximum Ratings
(Ta = 25C)
Item Drain to source voltage Gate 1 to source voltage Gate 2 to source voltage Drain current Channel power dissipation Channel temperature Storage temperature Symbol VDS VG1S VG2S ID Pch Tch Tstg Ratings 12 8 8 25 150 150 -55 to +150 Unit V V V mA mW
C C
Electrical Characteristics
(Ta = 25C)
Item Drain to source breakdown voltage Gate 1 to source breakdown voltage Gate 2 to source breakdown voltage Gate 1 cutoff current Gate 2 cutoff current Drain current Gate 1 to source cutoff voltage Gate 2 to source cutoff voltage Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Power gain Noise figure Symbol V(BR)DSX V(BR)G1SS V(BR) G2SS IG1SS IG2SS IDS(on) VG1S(off) VG2S(off) |yfs| Ciss Coss Crss PG NF Min 12 8 8 -- -- 0.5 -0.5 0 16 1.2 0.6 -- 16 -- Typ -- -- -- -- -- -- -- -- 20.8 1.5 0.9 0.01 19.5 2.0 Max -- -- -- 100 100 10 +0.5 +1.0 -- 2.2 1.2 0.03 -- 3 Unit V V V nA nA mA V V mS pF pF pF dB dB Test conditions ID = 200 A , VG1S = -3 V, VG2S = -3 V IG1 = 10 A, VG2S = VDS = 0 IG2 = 10 A, VG1S = VDS = 0 VG1S = 6 V, VG2S = VDS = 0 VG2S = 6 V, VG1S = VDS = 0 VDS = 6 V, VG1S = 0.5 V, VG2S = 3 V VDS = 10 V, VG2S = 3 V, ID = 100 A VDS = 10 V, VG1S = 3 V, ID = 100 A VDS = 6 V, VG2S = 3 V, ID = 10 mA, f = 1 kHz VDS = 6 V, VG2S = 3 V, ID = 10 mA, f = 1 MHz VDS = 4 V, VG2S = 3 V, ID = 10 mA, f = 900 MHz
Rev.3.00, Aug 10.2005, page 2 of 6
3SK295
Main Characteristics
Maximum Channel Power Dissipation Curve
Pch (mW)
200 20 VG2S = 3 V 1.2 V
Typical Output Characteristics
Pulse test
(mA)
16 1.0 V
150
Channel Power Dissipation
ID
100
12 0.8 V 8 0.6 V 4 VG1S = 0.4 V 2 4 6 8 10
50
Drain Current
50 100 150 200
0
0
Ambient Temperature
Ta (C)
Drain to Source Voltage VDS (V)
Drain Current vs. Gate1 to Source Voltage
20 3.0 V 2.0 V VDS = 6 V
Drain Current vs. Gate2 to Source Voltage
20 2.0 V 1.5 V VDS = 6 V
Pulse test
(mA)
16
2.5 V 1.5 V
(mA)
Pulse test
16 1.0 V 12
ID
12
Drain Current
Drain Current
ID
1.0 V
8
8 VG1S = 0.5 V
4 VG2S = 0.5 V 0 1 2 3 4 5
4
0
1
2
3
4
5
Gate1 to Source Voltage VG1S (V)
Gate2 to Source Voltage VG2S (V)
Forward Transfer Admittance vs. Gate1 to Source Voltage
Forward Transfer Admittance |yfs| (mS)
30 VDS = 6 V f = 1 kHz VG2S = 3.0 V 18 2.5 V 2.0 V 1.5 V 6 0.5 V 0 0.4 0.8 1.2 1.6 2.0 0 1 1.0 V 25
Power Gain vs. Drain Current
PG (dB) Power Gain
24
20
15
12
10 VDS = 4 V VG2S = 3 V f = 900 MHz 2 5 10 20
5
Gate1 to Source Voltage VG1S (V)
Drain Current
ID
(mA)
Rev.3.00, Aug 10.2005, page 3 of 6
3SK295
Noise Figure vs. Drain Current
5 VDS = 4 V VG2S = 3 V f = 900 MHz
Power Gain vs. Drain to Source Voltage
25
4
PG (dB) Power Gain
NF (dB)
20
3
15
Noise Figure
2
10 VG2S = 3 V ID = 10 mA f = 900 MHz 2 4 6 8 10
1 0 1
5
2
5
10
20
0
Drain Current
ID
(mA)
Drain to Source Voltage
VDS (V)
Noise Figure vs. Drain to Source Voltage
5
NF (dB) Noise Figure
4
3
2 VG2S = 3 V ID = 10 mA f = 900 MHz 2 4 6 8 10
1
0
Drain to Source Voltage
VDS (V)
Rev.3.00, Aug 10.2005, page 4 of 6
3SK295
S11 Parameter vs. Frequency
.8 .6 .4 3 .2 4 5 10 0 .2 .4 .6 .8 1.0 1.5 2 3 45 10 -10 -.2 -5 -4 -3 -.4 -.6 -.8 -1.5 -2 -120 -90 -60 -1 180 0 150 30 1 1.5 2 120
S21 Parameter vs. Frequency
90
Scale: 0.5 / div.
60
-150
-30
Condition: VDS = 4 V, VG2S = 3 V ID = 10 mA, Zo = 50 100 to 1000 MHz (50 MHz step)
Condition: VDS = 4 V, VG2S = 3 V ID = 10 mA, Zo = 50 100 to 1000 MHz (50 MHz step)
S12 Parameter vs. Frequency
90 120
S22 Parameter vs. Frequency
.8 .6 .4 3 1 1.5 2
Scale: 0.002/ div.
60
150
30 .2
4 5 10
180
0
0
.2
.4
.6 .8 1.0 1.5 2
3 45
10 -10
-.2 -150 -30 -.4 -120 -90 -60 -.6 -.8 -1.5
-5 -4 -3 -2 -1
Condition: VDS = 4 V, VG2S = 3 V ID = 10 mA, Zo = 50 100 to 1000 MHz (50 MHz step)
Condition: VDS = 4 V, VG2S = 3 V ID = 10 mA, Zo = 50 100 to 1000 MHz (50 MHz step)
Rev.3.00, Aug 10.2005, page 5 of 6
3SK295
Package Dimensions
JEITA Package Code SC-61AA RENESAS Code PLSP0004ZA-A Package Name MPAK-4 / MPAK-4V MASS[Typ.] 0.013g
D e2 b1 B B e
A Q c
E
HE
Reference Symbol Dimension in Millimeters
L A A xM S A b
L1 A3 e2
LP
e
A2
A
I1
b5 yS A1 S e1
b b2 c c1 c
b1 b3 c1
I1
b4
A-A Section
B-B Section
Pattern of terminal position areas
A A1 A2 A3 b b1 b2 b3 c c1 D E e e2 HE L L1 LP x y b4 b5 e1 I1 Q
Min 1.0 0 1.0 0.35 0.55
Nom
0.1 2.7 1.35
1.1 0.25 0.42 0.62 0.4 0.6 0.13 0.11 1.5 0.95 0.85 2.8
Max 1.3 0.1 1.2 0.5 0.7
0.15 3.1 1.65
2.2 0.35 0.15 0.25
3.0 0.75 0.55 0.65 0.05 0.05 0.55 0.75 1.05
1.95 0.3
Ordering Information
Part Name 3SK295ZQ-TL-E Quantity 3000 Shipping Container 178 mm Reel, 8 mm Emboss Taping
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product.
Rev.3.00, Aug 10.2005, page 6 of 6
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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