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| SRAM Austin Semiconductor, Inc. 512K x 32 SRAM SRAM Memory Array MCM FEATURES * * * * * * * * * Fast access times: 10, 12, 15, 17 and 20ns Fast OE\ access times: 6ns Ultra-low operating power < 1W worst case Single +3.3V 0.3V power supply Fully static -- no clock or timing strobes necessary All inputs and outputs are TTL-compatible Easy memory expansion with CE\ and OE\ options Automatic CE\ power down High-performance, low-power consumption, CMOS I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 GND I/O 8 I/O 9 I/O 10 I/O 11 I/O 12 I/O 13 I/O 14 I/O 15 AS8SLC512K32 PIN ASSIGNMENT (Top View) 68 Lead CQFP (Q & Q1) 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 60 10 59 11 12 58 57 13 14 56 55 15 54 16 53 17 52 18 51 19 50 20 49 21 48 22 47 23 46 24 45 25 44 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 NC A0 A1 A2 A3 A4 A5 CE\3 GND CE\4 WE\1 A6 A7 A8 A9 A10 Vcc I/O 16 I/O 17 I/O 18 I/O 19 I/O 20 I/O 21 I/O 22 I/O 23 GND I/O 24 I/O 25 I/O 26 I/O 27 I/O 28 I/O 29 I/O 30 I/O 31 * Timing 10ns 12ns 15ns 17ns 20ns -10 -12 -15 -17 -20 CS Vcc A11 A12 A13 A14 A15 A16 CE\1 OE CE\2 A17 WE\2 WE\3 WE\4 A18 NC NC OPTIONS MARKINGS 66 Lead PGA (P) CS * Package Ceramic Quad Flatpack Q Ceramic Quad Flatpak(.054min SO) Q1 Pin Grid Array P Operating Temperature Ranges Military (-55oC to +125oC) Industrial (-40oC to +85oC) 2V data retention/low power No. 702 No.904 CS \ * CS XT IT L * GENERAL DESCRIPTION The Austin Semiconductor, Inc. AS8SLC512K32 is a 3.3V 16 Megabit CMOS SRAM Module organized as 512Kx32 bits. The AS8SLC512K32 achieves very high speed access, low power consumption and high reliability by employing advanced CMOS memory technology. This military temperature grade product is ideally suited for commercial, industrial, and military applications when asynchronous high speed switching and low ACTIVE opening power & ultra Fast Asynchronous Access is mandated. M4 M3 M2 M1 For more products and information please visit our web site at www.austinsemiconductor.com BLOCK DIAGRAM AS8SLC512K32 Rev. 2.5 5/09 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 1 SRAM Austin Semiconductor, Inc. ABSOLUTE MAXIMUM RATINGS* Voltage of Vcc Supply Relative to Vss...........-0.5V to +4.6V Storage Temperature.....................................-65C to +150C Short Circuit Output Current(per I/O)............................20mA Voltage on Any Pin Relative to Vss............-.5V to Vcc+4.6V Maximum Junction Temperature**.............................+150C *Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. AS8SLC512K32 This is a stress rating only and functional operation on the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. **Junction temperature depends upon package type, cycle time, loading, ambient temperature and airflow. See the Application Information section at the end of this datasheet for more information. ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS (-55oC < TA < 125oC and -40oC to +85oC; Vcc = 3.3V 0.3V) DESCRIPTION Input High (logic 1) Voltage Input Low (logic 1) Voltage Input Leakage CurrentADD,OE Input Leakage CurrentWE,CE Output Leakage CurrentI/O Output High Voltage Output Low Voltage DESCRIPTION CONDITIONS CS\ AS8SLC512K32 Rev. 2.5 5/09 CONDITIONS SYMBOL VIH VIL ILI1 ILI2 ILO VOH VOL -12 320 MAX -15 280 MIN 2.2 -0.3 -10 -10 -10 2.4 MAX VCC+0.3 0.8 10 10 10 UNITS NOTES V V A A A V 1 1 1 1 0V 0.5 -17 260 -20 240 V UNITS NOTES ICC1 mA 2, 3,13 280 ICC2 --120 --80 240 --80 --40 200 --80 --40 180 --80 --40 160 --80 --40 mA 2 ICC3 mA 2 ISBT1 100 80 80 50 80 60 60 36 80 60 60 36 80 60 60 36 80 60 60 36 mA 3, 13 CMOS Standby ISBT2 mA Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 2 SRAM Austin Semiconductor, Inc. CAPACITANCE (VIN = 0V, f = 1MHz, TA = 25oC)* SYMBOL CADD COE CWE, CCS CIO PARAMETER A0 - A18 Capacitance OE\ Capacitance WE\ and CS\ Capacitance I/O 0- I/O 31 Capacitance MAX 40 40 12 15 UNITS pF pF pF pF AS8SLC512K32 NOTE: *This parameter is sampled. AC TEST CONDITIONS TEST SPECIFICATIONS Input pulse levels...........................................VSS to 3V Input rise and fall times...........................................1ns/V Input timing reference levels...............................1.5V Output reference levels........................................1.5V Output load..........................................See Figure 1, 2 3.3V RL = 50 Q ZO = 50 30 pF VL = 1.5V Q 333 5 pF 319 FIGURE 1 FIGURE 2 AS8SLC512K32 Rev. 2.5 5/09 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 3 SRAM Austin Semiconductor, Inc. AS8SLC512K32 ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (NOTE 5) (-55oC READ CYCLE READ cycle time Address access time Chip select access time Output hold from address change Chip select to output in Low-Z Chip select to output in High-Z Output enable access time Output enable to output in Low-Z Output disable to output in High-Z WRITE CYCLE WRITE cycle time Chip select to end of write Address valid to end of write Address setup time Address hold from end of write WRITE pulse width, CS\ controlled WRITE pulse width, WE\ controlled Data setup time Data hold time Write disable to output in Low-z Write enable to output in High-Z SYMBOL RC AA t ACS t OH t LZCS t HZCS t AOE t LZOE t HZOE t t -10 MIN MAX 10 10 10 1 1 0 0 5 5 5 10 7 7 0 0 9 9 5 1 2 5 -12 MIN MAX 12 12 12 2 2 0 0 6 6 6 12 8 8 0 0 10 10 6 1 2 5 -15 MIN MAX 15 15 15 2 2 0 0 7 7 -17 MIN MAX 17 17 17 2 2 7.5 7.5 0 7.5 17 11 11 0 0 14 14 7.5 1 2 6.5 -20 UNITS NOTES MIN MAX 20 20 20 2 2 0 0 8 8 8 20 12 12 0 0 15 15 8 1 2 7 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 4,6,7 4,6,7 4,6 4,6 7 15 10 10 0 0 12 12 7 1 2 6 WC CW t AW t AS t AH t WP1 t WP2 t DS t DH t LZWE t HZWE t t 4,6,7 4,6,7 AS8SLC512K32 Rev. 2.5 5/09 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 4 SRAM Austin Semiconductor, Inc. LOW POWER CHARACTERISTICS (L Version Only) DESCRIPTION VCC for Retention Data Data Retention Current Chip Deselect to Data Retention Time Operation Recovery Time CONDITIONS All Inputs @ Vcc + 0.2V or Vss + 0.2V, CS\ = Vcc + 0.2V VCC = 2V VCC = 3V SYMBOL VDR ICCDR ICCDR tCDR tR 0 20 MIN 2 MAX 24 32 UNITS V mA mA ns ms 4 4, 11 NOTES AS8SLC512K32 LOW VCC DATA RETENTION WAVEFORM DATA RETENTION MODE VCC 4.5V VDR > 2V t 4.5V CDR t R CS\ 1-4 VDR NOTES 1. All voltages referenced to VSS (GND). 2. Worst case address switching. 3. ICC is dependent on output loading and cycle rates. unloaded, and f= 1 t RC(MIN) HZ. 7. At any given temperature and voltage condition, tHZCS, is less than tLZCS, and tHZWE is less than tLZWE. 8. WE\ is HIGH for READ cycle. 9. Device is continuously selected. Chip selects and output enable are held in their active state. 10. Address valid prior to or coincident with latest occurring chip enable. 11. tRC= READ cycle time. 12. Chip enable (CS\) and write enable (WE\) can initiate and terminate a WRITE cycle. 13. ICC is for full 32 bit mode. The specified value applies with the outputs 4. This parameter guaranteed but not tested. 5. Test conditions as specified with output loading as shown in Fig. 1 & 2 unless otherwise noted. 6. tHZCS, tHZOE and tHZWE are specified with CL= 5pF as in Fig. 2. Transition is measured +/- 200 mV typical from steady state voltage, allowing for actual tester RC time constant. AS8SLC512K32 Rev. 2.5 5/09 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 5 8432 5 576243210987654321 4351 8435132 876543210987654321 576243210987654321 87654 87651 54351 1 8 4 84351321 576243210987654321 84324321 576243210987654321 7654 87654 876543210987654321 576243210987654321 84351 2 576213210987654321 843513 1 543213210987654321 87654 876543210987654321 54321 876543210987654321 8765432 5432 876543210987654321 876543210987654321 87654321 54321 54321 876543210987654321 87654321 876543210987654321 87654321 54321 1 1 876543210987654321 876543210987654321 876543210987654321 ADDRESS Austin Semiconductor, Inc. READ CYCLE NO. 1 tOH 21 54376 321 7 23 43 1 543215454121 21 2215432121 1 76 523 543215432121 4 276 521 16 543 543215432121 543215432121 76 543 ADDRESS DATA I/O PREVIOUS DATA VALID READ CYCLE NO. 2 tAA tAA 66547654321 78 7654325 6543211 836 7 75432214321 65432114321 654325 876 75432114321 65432114321 876 6 7654315 6654325 872 9876543211 5432 432 9876544321 5321 9876543211 5432 9876554321 43211 5432 9876543211 CS\ t tLZCS ACS 665439 7 10 7543228 65432117654321 654328 109 76543117654321 65432117654321 102 9 7654328 65432117654321 1098 tHZCS 5321 432 432 32109876543211 54321 32109876544321 53211 432 32109876554321 44321 32109876543211 OE\ tAOE tLZOE 5432343 1543 45 6 543212121 1321 412121 6 4321 543212121 1543 6 543212121 1321 4543 6 AS8SLC512K32 Rev. 2.5 5/09 DATA I/O HIGH IMPEDANCE 6 tRC tRC Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. NEW DATA VALID DATA VALID tHZOE AS8SLC512K32 SRAM 54321 54321 54321 54321 ADDRESS Austin Semiconductor, Inc. CS\ WRITE CYCLE NO. 1 tAS (Chip Select Controlled) tAW tCW tWP21 6654 7 7543220987654321 6543211987654321 654320 331 2 7543211987654321 6543211987654321 6654311 7654320 20 987654321 987654321 987654321 987654321 654321 654321 654321 654321 654321 DATA I/O ADDRESS WE\ WRITE CYCLE NO. 2 (Write Enable Controlled) t AW tCW 665431 7 32 7543220 6543211987654321 654320 321 7654320987654321 6543211987654321 7543211987654321 6543211987654321 321 1 6654311 7654320 3220 tAH 9876544321 5321 432 432 54321 9876554321 43211 9876543211 9876544321 53211 43211 432 432 9876554321 WE\ CS\ tAS tHZWE t WP1 1 tWC tWC DATA VALID tDS tDS tLZWE tDH 32111 4322 43 4322 32111 43 32111 4322 43 43213210987654321 1 4 1 43213210987654321 1 4 1 43213210987654321 1 4 1 1. All voltages referenced to VSS (GND). NOTES AS8SLC512K32 Rev. 2.5 5/09 DATA I/O 7 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. DATA VALID tDH tAH AS8SLC512K32 SRAM SRAM Austin Semiconductor, Inc. AS8SLC512K32 MECHANICAL DEFINITIONS* ASI Case #702 (Package Designator Q) 4 x D2 4 x D1 D DETAIL A R b 1o - 7o L1 B e SEE DETAIL A A1 A2 E A SYMBOL A A1 A2 B b D D1 D2 E e R L1 SMD SPECIFICATIONS MIN MAX 0.123 0.196 0.118 0.186 0.000 0.020 0.010 REF 0.013 0.017 0.800 BSC 0.870 0.890 0.980 1.000 0.936 0.956 0.050 BSC 0.005 --0.035 0.045 *All measurements are in inches. AS8SLC512K32 Rev. 2.5 5/09 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 8 SRAM Austin Semiconductor, Inc. AS8SLC512K32 MECHANICAL DEFINITIONS* ASI Case #904 (Package Designator P) 4xD D1 Pin 56 D2 Pin 1 (identified by 0.060 square pad) A A1 b1 E1 e b Pin 66 e Pin 11 L SMD SPECIFICATIONS SYMBOL A A1 b b1 D D1/E1 D2 e L MIN 0.144 0.025 0.016 0.045 1.065 1.000 TYP 0.600 TYP 0.100 TYP 0.145 0.155 MAX 0.181 0.035 0.020 0.055 1.085 *All measurements are in inches. AS8SLC512K32 Rev. 2.5 5/09 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 9 SRAM Austin Semiconductor, Inc. AS8SLC512K32 MECHANICAL DEFINITIONS* ASI Case (Package Designator Q1) Case Outline A SYMBOL A A1 b B c D/E D1/E1 D2/E2 e L R *All measurements are in inches. SMD SPECIFICATIONS MIN MAX --0.196 0.054 --0.013 0.017 0.010 TYP 0.009 0.012 0.980 1.000 0.870 0.890 0.800 BSC 0.050 BSC 0.035 0.045 0.010 TYP AS8SLC512K32 Rev. 2.5 5/09 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 10 SRAM Austin Semiconductor, Inc. AS8SLC512K32 ORDERING INFORMATION EXAMPLE: AS8SLC512K32Q-17L/XT Device Number AS8SLC512K32 AS8SLC512K32 AS8SLC512K32 AS8SLC512K32 AS8SLC512K32 Package Type Q Q Q Q Q Speed ns -10 -12 -15 -17 -20 Options Process L L L L L /* /* /* /* /* EXAMPLE: AS8SLC512K32P-12/IT Device Number AS8SLC512K32 AS8SLC512K32 AS8SLC512K32 AS8SLC512K32 AS8SLC512K32 Package Type P P P P P Speed ns -10 -12 -15 -17 -20 Options Process L L L L L /* /* /* /* /* EXAMPLE: AS8SLC512K32Q1-12/XT Device Number AS8SLC512K32 AS8SLC512K32 AS8SLC512K32 AS8SLC512K32 AS8SLC512K32 Package Type Q1 Q1 Q1 Q1 Q1 Speed ns -10 -12 -15 -17 -20 Options Process L L L L L /* /* /* /* /* *AVAILABLE PROCESSES XT = Extended Temperature Rang IT = Industrial Temperature Range 883C = Military Processing -55oC to +125oC -40oC to +85oC -55oC to +125oC OPTION DEFINITIONS L = 2V data retention/low power AS8SLC512K32 Rev. 2.5 5/09 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 11 SRAM Austin Semiconductor, Inc. DOCUMENT TITLE AS8SLC512K32 512K x 32 SRAM SRAM Memory Array MCM REVISION HISTORY Rev # 2.5 History Updated Q & Q1 Package Specs Page 8 & 10 Release Date May 2009 Status Release AS8SLC512K32 Rev. 2.5 5/09 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 12 |
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