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 TS924
Rail-to-rail high output current quad operational amplifier
Features

Rail-to-rail input and output Low noise: 9 nV/Hz Low distortion High output current: 80 mA (able to drive 32 loads) High-speed: 4 MHz, 1.3 V/s Operating range from 2.7 V to 12 V Low input offset voltage: 900 V max (TS924A) ESD internal protection: 3 kV Latch-up immunity Macromodel included in this specification P TSSOP14 (Thin shrink small outline package) D SO-14 (Plastic micropackage) N DIP14 (Plastic package)
Applications

Headphone amplifier Piezoelectric speaker driver Sound cards MPEG boards, multimedia systems Line driver, buffer Cordless telephones and portable communication equipment Instrumentation with low noise as key factor
Pin connections (top view)
Output 1 1 Inverting Input 1 2 Non-inverting Input 1 3 VCC + 4 Non-inverting Input 2 5 Inverting Input 2 6 Output 2 7 + + + +
14 Output 4 13 Inverting Input 4 12 Non-inverting Input 4 11 VCC 10 Non-inverting Input 3 9 8 Inverting Input 3 Output 3
Description
The TS924 is a rail-to-rail quad BiCMOS operational amplifier optimized and fully specified for 3 V and 5 V operation. High output current allows low load impedances to be driven. The TS924 exhibits a very low noise, low distortion, low offset and high output current capability making this device an excellent choice for high quality, low voltage or battery operated audio systems.
The device is stable for capacitive loads up to 500 pF.
March 2008
Rev 5
1/14
www.st.com 14
Absolute maximum ratings and operating conditions
TS924
1
Absolute maximum ratings and operating conditions
Table 1.
Symbol VCC Vid Vin Tstg Tj Supply voltage (1) Differential input voltage Input voltage
(3) (2)
Absolute maximum ratings
Parameter Value 14 1 VDD -0.3 to VCC+0.3 -65 to +150 150 103 66 100 3 100
(7)
Unit V V V C C
Storage temperature Maximum junction temperature Thermal resistance junction to DIP14 SO-14 TSSOP14 HBM: human body model(5) ambient(4)
Rthja
C/W
kV V kV
(8)
ESD
MM: machine
model(6)
CDM: charged device model Output short-circuit duration Latch-up immunity
1 see note 200 250 260
mA C C
Soldering temperature (10 sec), leaded version Soldering temperature (10 sec), unleaded version
1. All voltage values, except differential voltage are with respect to network ground terminal. 2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. If Vid > 1 V, the maximum input current must not exceed 1 mA. In this case (Vid > 1 V), an input series resistor must be added to limit input current. 3. Do not exceed 14 V. 4. Short-circuits can cause excessive heating and destructive dissipation. Rth are typical values. 5. Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 k resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 6. Machine model: A 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ). This is done for all couples of connected pin combinations while the other pins are floating. 7. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins. 8. There is no short-circuit protection inside the device: short-circuits from the output to VCC can cause excessive heating. The maximum output current is approximately 80 mA, independent of the magnitude of VCC. Destructive dissipation can result from simultaneous short-circuits on all amplifiers.
Table 2.
Symbol VCC Vicm Toper
Operating conditions
Parameter Supply voltage Common mode input voltage range Operating free air temperature range Value 2.7 to 12 VDD -0.2 to VCC +0.2 -40 to +125 Unit V V C
2/14
TS924
Electrical characteristics
2
Electrical characteristics
Table 3. Electrical characteristics at VCC = +3V with VDD = 0V, Vicm = VCC/2, Tamb = 25C, and RL connected to VCC/2 (unless otherwise specified)
Parameter Input offset voltage TS924 TS924A Tmin Tamb Tmax TS924 TS924A Input offset voltage drift Input offset current - Vout = VCC/2 Input bias current - Vout = VCC/2 High level output voltage RL= 10k RL = 600 RL = 32 Low level output voltage RL= 10k RL = 600 RL = 32 Large signal voltage gain (Vout = 2Vpk-pk) RL= 10k RL = 600 RL = 32 Total supply current - no load, Vout = VCC/2 Gain bandwidth product - RL = 600 Common mode rejection ratio Supply voltage rejection ratio - VCC = 2.7 to 3.3V Output short-circuit current Slew rate Phase margin at unit gain - RL = 600, CL =100pF Gain margin - RL = 600, CL =100pF Equivalent input noise voltage - f = 1kHz Total harmonic distortion Vout = 2Vpk-pk, F = 1kHz, Av = 1, RL =600 Channel separation 60 60 50 0.7 2.90 2.87 2.63 50 100 180 200 35 16 4.5 4 80 85 80 1.3 68 12 9 0.005 120 7 2 1 15 30 100 Min. Typ. Max. Unit
Symbol
Vio
3 0.9 5 1.8
mV
DVio Iio Iib
V/C nA nA
VOH
V
VOL
mV
Avd
V/mV
ICC GBP CMR SVR Io SR m Gm en THD Cs
mA MHz dB dB mA V/s Degrees dB
nV ----------Hz
% dB
3/14
Electrical characteristics Table 4.
Symbol Input offset voltage TS924 TS924A Tmin Tamb Tmax TS924 TS924A Input offset voltage drift Input offset current - Vout = VCC/2 Input bias current - Vout = VCC/2 High level output voltage RL= 10k RL = 600 RL = 32 Low level output voltage RL= 10k RL = 600 RL = 32 Large signal voltage gain (Vout = 2Vpk-pk) RL= 10k RL = 600 RL = 32 Total supply current - no load, Vout = VCC/2 Gain bandwidth product - RL = 600 Common mode rejection ratio Supply voltage rejection ratio - VCC = 3V to 5V Output short-circuit current Slew rate Phase margin at unit gain - RL = 600, CL =100pF Gain margin -RL = 600, CL =100pF Equivalent input noise voltage - f = 1kHz Total harmonic distortion Vout = 2Vpk-pk, F = 1kHz, Av = 1, RL =600 Channel separation 60 60 50 0.7 4.90 4.85 4.4 50 120 300 200 40 17 4.5 4 80 85 80 1.3 68 12 9 0.005 120 7 2 1 15 30 100
TS924
VCC = +5V, VDD = 0V, Vicm = VCC/2, Tamb = 25C, RL connected to VCC/2 (unless otherwise specified)
Parameter Min. Typ. Max. Unit
Vio
3 0.9 5 1.8
mV
DVio Iio Iib
V/C nA nA
VOH
V
VOL
mV
Avd
V/mV
ICC GBP CMR SVR Io SR m Gm en THD Cs
mA MHz dB dB mA V/s Degrees dB
nV ----------Hz
% dB
4/14
TS924
Electrical characteristics
Figure 1.
100
Output short circuit current vs. output voltage
Figure 2.
Output short circuit current vs. output voltage
100
80
80
Output Short-Circuit Current (mA)
60
Output Short-Circuit Current (mA)
Sink
40
60 40 20 0 -20 -40 -60 -80
Sink
Vcc=0/12V
20 0 -20 -40 -60 -80 -100 0 2 4 6 8 10 12
Vcc=0/3V
Source
Source
-100
0
0,5
1
1,5
2
2,5
3
Output Voltage (V)
Output Voltage (V)
Figure 3.
Voltage gain and phase vs. frequency
Figure 4.
100 80
Output short circuit current vs. output voltage
Output Short-Circuit Current (mA)
CL=500pF VCC=1.5V
60 40 20 0 -20 -40 -60 -80 -100 0 1
Sink
Phase
Vcc=0/5V
Gain
Source
2
3
4
5
Output Voltage (V)
Figure 5.
Voltage gain and phase vs. frequency
RL=10 CL=100pF VCC=1.5V
Figure 6.
THD + noise vs. frequency
RL=2k Vo=10Vpp VCC=6V Av= -1
Phase
Gain
5/14
Electrical characteristics
TS924
Figure 7.
THD + noise vs. frequency
Figure 8.
THD + noise vs. frequency
RL=2k Vo=10Vpp VCC=6V Av= 1
RL=32 Vo=2Vpp VCC=1.5V Av= 10
Figure 9.
THD + noise vs. Vout
Figure 10. THD + noise vs. frequency
RL=32 f=1kHz VCC=1.5V Av= -1
RL=32 Vo=4Vpp VCC=2.5V Av= 1
Figure 11. THD + noise vs. Vout
Figure 12. THD + noise vs. Vout
RL=2k f=1kHz VCC=1.5V Av= -1
6/14
TS924
Macromodel
3
3.1
Macromodel
Important note concerning this macromodel
Please consider the following remarks before using this macromodel.

All models are a trade-off between accuracy and complexity (i.e. simulation time). Macromodels are not a substitute to breadboarding; rather, they confirm the validity of a design approach and help to select surrounding component values. A macromodel emulates the nominal performance of a typical device within specified operating conditions (temperature, supply voltage, for example). Thus the macromodel is often not as exhaustive as the datasheet, its purpose is to illustrate the main parameters of the product.
Data derived from macromodels used outside of the specified conditions (VCC, temperature, for example) or even worse, outside of the device operating conditions (VCC, Vicm, for example), is not reliable in any way. Section 3.2 presents the electrical characteristics resulting from the use of these macromodels.
3.2
Electrical characteristics from macromodelization
Table 5.
Symbol Vio Avd ICC Vicm VOH VOL Isink Isource GBP SR m RL = 10k RL = 10k VO = 3V VO = 0V RL = 600k , RL = 10k CL = 100pF RL = 600k RL = 10k No load, per operator
Macromodel simulation at VCC = 3V, VDD = 0V, RL, CL connected to VCC/2, and Tamb = 25C (unless otherwise specified)
Conditions Value 0 200 1.2 -0.2 to 3.2 2.95 25 80 80 4 1 68 Unit mV V/mV mA V V mV mA mA MHz V/s Degrees
7/14
Macromodel
TS924
3.3
Macromodel code
** Standard Linear Ics Macromodels, 1996. ** CONNECTIONS: * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT * 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY .SUBCKT TS92X 1 2 3 4 5 * .MODEL MDTH D IS=1E-8 KF=2.664234E-16 CJO=10F * * INPUT STAGE CIP 2 5 1.000000E-12 CIN 1 5 1.000000E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 8.125000E+00 RIN 15 16 8.125000E+00 RIS 11 15 2.238465E+02 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC 153.5u VOFN 13 14 DC 0 IPOL 13 5 3.200000E-05 CPS 11 15 1e-9 DINN 17 13 MDTH 400E-12 VIN 17 5 -0.100000e+00 DINR 15 18 MDTH 400E-12 VIP 4 18 0.400000E+00 FCP 4 5 VOFP 1.865000E+02 FCN 5 4 VOFN 1.865000E+02 FIBP 2 5 VOFP 6.250000E-03 FIBN 5 1 VOFN 6.250000E-03 * GM1 STAGE *************** FGM1P 119 5 VOFP 1.1 FGM1N 119 5 VOFN 1.1 RAP 119 4 2.6E+06 RAN 119 5 2.6E+06 * GM2 STAGE *************** G2P 19 5 119 5 1.92E-02 G2N 19 5 119 4 1.92E-02 R2P 19 4 1E+07 R2N 19 5 1E+07 ************************** VINT1 500 0 5 GCONVP 500 501 119 4 19.38 VP 501 0 0 GCONVN 500 502 119 5 19.38 VN 502 0 0
8/14
TS924 ********* orientation isink isource VINT2 503 0 5 FCOPY 503 504 VOUT 1 DCOPYP 504 505 MDTH 400E-9 VCOPYP 505 0 0 DCOPYN 506 504 MDTH 400E-9 VCOPYN 0 506 0 *************************** F2PP 19 5 poly(2) VCOPYP VP 0 0 0 0 F2PN 19 5 poly(2) VCOPYP VN 0 0 0 0 F2NP 19 5 poly(2) VCOPYN VP 0 0 0 0 F2NN 19 5 poly(2) VCOPYN VN 0 0 0 0 * COMPENSATION ************ CC 19 119 25p * OUTPUT *********** DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 6.250000E+02 VIPM 28 4 5.000000E+01 HONM 21 27 VOUT 6.250000E+02 VINM 5 27 5.000000E+01 VOUT 3 23 0 ROUT 23 19 6 COUT 3 5 1.300000E-10 DOP 19 25 MDTH 400E-12 VOP 4 25 1.052 DON 24 19 MDTH 400E-12 VON 24 5 1.052 .ENDS ;TS92X *******
Macromodel
0.5 0.5 1.75 1.75
9/14
Package information
TS924
4
Package information
In order to meet environmental requirements, STMicroelectronics offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics trademark. ECOPACK specifications are available at: www.st.com.
4.1
DIP14 package information
Figure 13. DIP14 package mechanical drawing
Table 6.
Ref.
DIP14 package mechanical data
Millimeters Min. Typ. Max. Min. 0.020 1.65 0.5 0.25 20 8.5 2.54 15.24 7.1 5.1 3.3 1.27 2.54 0.050 0.130 0.100 0.335 0.100 0.600 0.280 0.201 0.055 0.020 0.010 0.787 0.065 Inches Typ. Max.
a1 B b b1 D E e e3 F I L Z
0.51 1.39
10/14
TS924
Package information
4.2
SO-14 package information
Figure 14. SO-14 package mechanical drawing
Table 7.
SO-14 package mechanical data
Dimensions
Ref. Min. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 8.55 5.8 0.35 0.19 0.1
Millimeters Typ. Max. 1.75 0.2 1.65 0.46 0.25 0.5 45 (typ.) 8.75 6.2 1.27 7.62 4.0 5.3 1.27 0.68 8 (max.) 0.149 0.181 0.019 0.336 0.228 0.013 0.007 0.003 Min.
Inches Typ. Max. 0.068 0.007 0.064 0.018 0.010 0.019
0.344 0.244 0.050 0.300 0.157 0.208 0.050 0.026
11/14
Package information
TS924
4.3
TSSOP14 package information
Figure 15. TSSOP14 package mechanical drawing
A A2 A1 b e K c L E
D
E1
PIN 1 IDENTIFICATION
1
Figure 16. TSSOP14 package mechanical data
Dimensions Ref. Min. A A1 A2 b c D E E1 e K L1 0 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8 0.75 0 0.018 0.024 1 Millimeters Typ. Max. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8 0.030 0.004 0.039 Min. Inches Typ. Max. 0.047 0.006 0.041 0.012 0.0089 0.201 0.260 0.176
12/14
TS924
Ordering information
5
Ordering information
Table 8. Order codes
Temperature range Package Packaging Marking TS924IN DIP14 TS924AIN TS924ID TS924IDT SO-14 TS924AID TS924AIDT TS924IYD (1) TS924IYDT (1) TS924AIYD (1) TS924AIYDT (1) TS924IPT (2) TS924AIPT
(2)
Order code TS924IN
Tube TS924AIN 924I Tube or Tape and reel 924AI 924IY
-40C, +125C
SO-14 (Automotive grade)
Tube or Tape and reel 924AIY 924I
TSSOP14 TSSOP14 (Automotive grade)
Tape and reel 924AI 924IY Tape and reel 924AIY
TS924IYPT (2) TS924AIYPT
(2)
1. Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q 002 or equivalent. 2. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q 002 or equivalent are on-going.
6
Revision history
Table 9.
Date 28-May-2001 12-May-2005 31-Jul-2005
Document revision history
Revision 1 2 3 First release. Modifications on AMR Table on page 2 (explanation of Vid and Vin limits, ESD MM and CDM values added, Rthja added). PPAP references inserted in the datasheet see Table 1 on page 3. Package mechanical data modified. TS924IYPT/TS924AYIPT PPAP reference inserted in order code table. Macromodel modified. Added footnotes for automotive grade order codes in order code table. Updated document format. Changes
30-Nov-2005
4
11-Mar-2008
5
13/14
TS924
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