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FDMC8200 Dual N-Channel PowerTrench(R) MOSFET
June 2009
FDMC8200
Dual N-Channel PowerTrench(R) MOSFET
30 V, 9.5 m and 20 m Features
Q1: N-Channel Max rDS(on) = 20 m at VGS = 10 V, ID = 6 A Max rDS(on) = 32 m at VGS = 4.5 V, ID = 5 A Q2: N-Channel Max rDS(on) = 9.5 m at VGS = 10 V, ID = 9 A Max rDS(on) = 13.5 m at VGS = 4.5 V, ID = 7 A RoHS Compliant
General Description
This device includes two specialized N-Channel MOSFETs in a dual Power33 (3mm x 3mm MLP) package. The switch node has been internally connected to enable easy placement and routing of synchronous buck converters. designed to provide optimal power efficiency. The control MOSFET (Q1) and synchronous MOSFET (Q2) have been
Applications
Mobile Computing Mobile Internet Devices General Purpose Point of Load
Pin 1
G1
D1
D1
D1
G HS V IN V IN
V IN
S2
DE NO
5 6 7 8
Q2
4 D1 3 D1 2 D1
Q1
D1 D2/S1 S2
V IN
H ITC SW
S2
ND DG GN
S2 G2
G2 BOTTOM
S2
S2
G LS
D GN
1 G1
BOTTOM
Power 33
MOSFET Maximum Ratings TC = 25 C unless otherwise noted
Symbol VDS VGS Parameter Drain to Source Voltage Gate to Source Voltage Drain Current - Continuous (Package limited) ID - Continuous (Silicon limited) - Continuous - Pulsed PD TJ, TSTG Power Dissipation Power Dissipation Operating and Storage Junction Temperature Range TA = 25 C TA = 25 C (Note 3) TC = 25 C TC = 25 C TA = 25 C Q1 30 20 18 23 8 1a 40 1.9 1a 0.7 1c Q2 30 20 18 45 12 1b 40 2.2 1b 0.9 1d W C A Units V V
-55 to +150
Thermal Characteristics
RJA RJA RJC Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Case 65 1a 180
1c
55 1b 145 1d 4 C/W
7.5
Package Marking and Ordering Information
Device Marking FDMC8200 Device FDMC8200 Package Power 33
1
Reel Size 13 "
Tape Width 12 mm
Quantity 3000 units
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(c)2009 Fairchild Semiconductor Corporation FDMC8200 Rev.A1
FDMC8200 Dual N-Channel PowerTrench(R) MOSFET
Electrical Characteristics TJ = 25 C unless otherwise noted
Symbol Parameter Test Conditions Type Min Typ Max Units
Off Characteristics
BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250 A, VGS = 0 V ID = 250 A, VGS = 0 V ID = 250 A, referenced to 25 C ID = 250 A, referenced to 25 C VDS = 24 V, VGS = 0 V VDS = 24 V, VGS = 0 V VDS = 20 V, VGS = 0 V Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 30 30 14 14 1 1 100 100 V mV/C A nA nA
On Characteristics
VGS(th) VGS(th) TJ Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient VGS = VDS, ID = 250 A VGS = VDS, ID = 250 A ID = 250 A, referenced to 25 C ID = 250 A, referenced to 25 C VGS = 10 V, ID = 6 A VGS = 4.5 V, ID = 5 A VGS = 10 V, ID = 6 A, TJ = 125 C VGS = 10 V, ID = 9 A VGS = 4.5 V, ID = 7 A VGS = 10 V, ID = 9 A, TJ = 125 C VDD = 5 V, ID = 6 A VDD = 5 V, ID = 9 A Q1 Q2 Q1 Q2 Q1 1.0 1.0 2.3 2.3 -5 -6 16 24 22 7.3 9.5 10 29 56 20 32 28 9.5 13.5 13 3.0 3.0 V mV/C
rDS(on)
Static Drain to Source On Resistance
m
Q2 Q1 Q2
gFS
Forward Transconductance
S
Dynamic Characteristics
Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = 15 V, VGS = 0 V, f = 1 MHZ Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 495 1180 145 330 20 30 1.4 1.4 660 1570 195 440 30 45 pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg(TOT) Qg(TOT) Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Total Gate Charge Gate to Source Charge Gate to Drain "Miller" Charge Q1 VDD = 15 V, ID = 1 A, VGS = 10 V, RGEN = 6 Q2 VDD = 15 V, ID = 1 A, VGS = 10 V, RGEN = 6 VGS = 0 V to 10 V Q1: VDD = 15 V, VGS = 0 V to 4.5 V ID = 6 A, Q2: VDD = 15 V, ID = 9 A, Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 11 13 3.1 4 35 38 1.3 6 7.3 16 3.1 7 1.8 4.1 1 1.5 20 23 10 10 56 60 10 12 10 22 4.3 10 ns ns ns ns nC nC nC nC
(c)2009 Fairchild Semiconductor Corporation FDMC8200 Rev.A1
2
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FDMC8200 Dual N-Channel PowerTrench(R) MOSFET
Electrical Characteristics TJ = 25 C unless otherwise noted
Symbol Parameter Test Conditions Type Min Typ Max Units
Drain-Source Diode Characteristics
VSD trr Qrr
Notes: 1. RJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RJC is guaranteed by design while RCA is determined by the user's board design.
Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
VGS = 0 V, IS = 6 A VGS = 0 V, IS = 9 A Q1 IF = 6 A, di/dt = 100 A/s Q2 IF = 9 A, di/dt = 100 A/s
(Note 2) (Note 2)
Q1 Q2 Q1 Q2 Q1 Q2
0.8 0.8 13 21 2.3 5.6
1.2 1.2 24 34 10 12
V ns nC
a.65 C/W when mounted on a 1 in2 pad of 2 oz copper
b.55 C/W when mounted on a 1 in2 pad of 2 oz copper
c. 180 C/W when mounted on a minimum pad of 2 oz copper
d. 145 C/W when mounted on a minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0%. 3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.
(c)2009 Fairchild Semiconductor Corporation FDMC8200 Rev.A1
3
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FDMC8200 Dual N-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25 C unless otherwise noted
40
VGS = 6 V ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10 V
4
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
30
VGS = 4.5 V
3
VGS = 3.5 V VGS = 4 V VGS = 4.5 V
20
VGS = 4 V
2
10
VGS = 3.5 V PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
1
VGS = 6 V VGS = 10 V
0 0.0
0 0 10 20 30 40
ID, DRAIN CURRENT (A)
0.5
1.0
1.5
2.0
2.5
3.0
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On Region Characteristics
Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage
1.6
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID = 6 A VGS = 10 V
100
SOURCE ON-RESISTANCE (m) PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
1.4
rDS(on), DRAIN TO
80
ID = 6 A
60
TJ = 125 oC
1.2
40 20
TJ = 25 oC
1.0
0.8 -75
-50
-25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC)
0 2 4 6 8 10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance vs Junction Temperature
40
IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
Figure 4. On-Resistance vs Gate to Source Voltage
40
VGS = 0 V
10
ID, DRAIN CURRENT (A)
30
VDS = 5 V
1
TJ = 150 oC
20
TJ = 150 oC TJ = 25 oC
0.1
TJ = 25 oC
10
0.01
TJ = -55 oC
TJ = -55 oC
0 2.0
2.5
3.0
3.5
4.0
4.5
0.001 0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage vs Source Current
(c)2009 Fairchild Semiconductor Corporation FDMC8200 Rev.A1
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FDMC8200 Dual N-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25 C unless otherwise noted
10
VGS, GATE TO SOURCE VOLTAGE (V) ID = 6 A
1000
Ciss
8
VDD = 15 V VDD = 20 V CAPACITANCE (pF)
Coss
6
VDD = 10 V
100
4 2
Crss
f = 1 MHz VGS = 0 V
0 0 2 4
Qg, GATE CHARGE (nC)
6
8
10 0.1
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain to Source Voltage
25
RJC = 7.5 C/W
o
100 10 1 0.1 0.01
THIS AREA IS LIMITED BY rDS(on)
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
100 us 1 ms 10 ms 100 ms 1s 10 s DC
20
VGS = 10 V
15
Limited by Package
10
VGS = 4.5 V
SINGLE PULSE TJ = MAX RATED RJA = 180 oC/W TC = 25 C
o
5 0 25
0.001 0.01
0.1
1
10
100200
50
75
100
o
125
150
VDS, DRAIN to SOURCE VOLTAGE (V)
Tc, CASE TEMPERATURE ( C)
Figure 9. Forward Bias Safe Operating Area
Figure 10. Maximum Continuous Drain Current vs Case Temperature
300
P(PK), PEAK TRANSIENT POWER (W)
100
VGS = 10 V
SINGLE PULSE RJA = 180 C/W TA = 25 C
o o
10
1
0.5 -4 10
10
-3
10
-2
10
-1
1
10
100
1000
t, PULSE WIDTH (s)
Figure 11. Single Pulse Maximum Power Dissipation
(c)2009 Fairchild Semiconductor Corporation FDMC8200 Rev.A1 5 www.fairchildsemi.com
FDMC8200 Dual N-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25 C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
NORMALIZED THERMAL IMPEDANCE, ZJA
0.1
D = 0.5 0.2 0.1 0.05 0.02 0.01
PDM
t1 t2
0.01 0.003 -4 10
SINGLE PULSE RJA = 180 C/W
-3 -2 -1
o
NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA
10
10
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 12. Junction-to-Ambient Transient Thermal Response Curve
(c)2009 Fairchild Semiconductor Corporation FDMC8200 Rev.A1
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FDMC8200 Dual N-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q2 N-Channel) TJ = 25 C unless otherwise noted
40
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
6
VGS = 10 V
5
VGS = 3 V
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)
30
VGS = 4.5 V VGS = 4 V VGS = 3.5 V
4 3 2 1
VGS = 10 V VGS = 3.5 V VGS = 4 V VGS = 4.5 V
20
10
VGS = 3 V PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
0 0.0
0 0 10 20 30 40
ID, DRAIN CURRENT (A)
0.5
1.0
1.5
2.0
2.5
3.0
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 13. On-Region Characteristics
Figure 14. Normalized on-Resistance vs Drain Current and Gate Voltage
60
SOURCE ON-RESISTANCE (m)
1.6
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
1.4 1.2 1.0 0.8 0.6 -75
ID = 9 A VGS = 10 V
50 40 30 20
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
rDS(on), DRAIN TO
ID = 9 A
TJ = 125 oC
10
TJ = 25 oC
-50
-25
0
25
50
75
100 125 150
0 2 4 6 8 10
VGS, GATE TO SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (oC)
Figure 15. Normalized On-Resistance vs Junction Temperature
Figure 16. On-Resistance vs Gate to Source Voltage
40
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX IS, REVERSE DRAIN CURRENT (A)
40
VGS = 0 V
10
ID, DRAIN CURRENT (A)
30
VDS = 5 V
1
TJ = 150 oC TJ = 25 oC
20
TJ = 150 oC TJ = 25 oC
0.1
10
0.01
TJ = -55 oC
TJ = -55 oC
0 1.5
2.0
2.5
3.0
3.5
4.0
0.001 0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 17. Transfer Characteristics
Figure 18. Source to Drain Diode Forward Voltage vs Source Current
(c)2009 Fairchild Semiconductor Corporation FDMC8200 Rev.A1
7
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FDMC8200 Dual N-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q2 N-Channel) TJ = 25 C unless otherwise noted
10
VGS, GATE TO SOURCE VOLTAGE (V) ID = 9 A
2000
Ciss
1000 8 6
VDD = 10 V VDD = 20 V CAPACITANCE (pF) VDD = 15 V
Coss
4 2
100
Crss
f = 1 MHz VGS = 0 V
0 0 3 6 9 12 15 18
Qg, GATE CHARGE (nC)
10 0.1
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 19. Gate Charge Characteristics
Figure 20. Capacitance vs Drain to Source Voltage
50
VGS = 10 V RJC = 4 C/W
o
100
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
10
100 us 1 ms
40 30
VGS = 4.5 V
1
THIS AREA IS LIMITED BY rDS(on)
10 ms 100 ms 1s 10 s DC
20 10 0 25
Limited by Package
0.1
SINGLE PULSE TJ = MAX RATED RJA = 145 oC/W TC = 25 C
o
0.01 0.01
0.1
1
10
100200
50
75
100
o
125
150
VDS, DRAIN to SOURCE VOLTAGE (V)
Tc, CASE TEMPERATURE ( C)
Figure 21. Forward Bias Safe Operating Area
1000
P(PK), PEAK TRANSIENT POWER (W)
Figure 22. Maximum Continuous Drain Current vs Case Temperature
VGS = 10 V
SINGLE PULSE RJA = 145 C/W TA = 25 C
o o
100
10
1
0.5 -4 10
10
-3
10
-2
10
-1
1
10
100
1000
t, PULSE WIDTH (s)
Figure 22. Single Pulse Maximum Power Dissipation
(c)2009 Fairchild Semiconductor Corporation FDMC8200 Rev.A1
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FDMC8200 Dual N-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q2 N-Channel) TJ = 25 C unless otherwise noted
2
1
NORMALIZED THERMAL IMPEDANCE, ZJA
DUTY CYCLE-DESCENDING ORDER
0.1
D = 0.5 0.2 0.1 0.05 0.02 0.01
PDM
t1
0.01
SINGLE PULSE RJA = 145 C/W
o
t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA
0.001 -4 10
10
-3
10
-2
10
-1
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 23. Junction-to-Ambient Transient Thermal Response Curve
(c)2009 Fairchild Semiconductor Corporation FDMC8200 Rev.A1
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FDMC8200 Dual N-Channel PowerTrench(R) MOSFET
Dimensional Outline and Pad Layout
(c)2009 Fairchild Semiconductor Corporation FDMC8200 Rev.A1
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FDMC8200 Dual N-Channel PowerTrench(R) MOSFET
TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. PowerTrench(R) Auto-SPMTM F-PFSTM The Power Franchise(R) PowerXSTM Build it NowTM FRFET(R) (R) Global Power ResourceSM Programmable Active DroopTM CorePLUSTM Green FPSTM QFET(R) CorePOWERTM TinyBoostTM QSTM Green FPSTM e-SeriesTM CROSSVOLTTM TinyBuckTM Quiet SeriesTM CTLTM GmaxTM TinyLogic(R) RapidConfigureTM Current Transfer LogicTM GTOTM TINYOPTOTM EcoSPARK(R) IntelliMAXTM TinyPowerTM EfficentMaxTM ISOPLANARTM TM TinyPWMTM Saving our world, 1mW /W /kW at a timeTM EZSWITCHTM * MegaBuckTM TinyWireTM TM* SmartMaxTM MICROCOUPLERTM TriFault DetectTM SMART STARTTM MicroFETTM TRUECURRENTTM* SPM(R) MicroPakTM (R) SerDesTM STEALTHTM MillerDriveTM (R) Fairchild SuperFETTM MotionMaxTM (R) Fairchild Semiconductor SuperSOTTM-3 Motion-SPMTM FACT Quiet SeriesTM SuperSOTTM-6 UHC(R) OPTOLOGIC(R) (R) FACT OPTOPLANAR(R) Ultra FRFETTM SuperSOTTM-8 (R) (R) FAST UniFETTM SupreMOSTM FastvCoreTM VCXTM SyncFETTM FETBenchTM VisualMaxTM Sync-LockTM PDP SPMTM (R) FlashWriter * XSTM (R)* Power-SPMTM FPSTM
tm
tm
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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative / In Design Definition Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.
Rev. I40
Preliminary
First Production
No Identification Needed Obsolete
Full Production Not In Production
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