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FDW2511NZ Dual N-Channel 2.5V Specified PowerTrench(R) MOSFET
D
May 2008
FDW2511NZ Dual N-Channel 2.5V Specified PowerTrench(R) MOSFET
Features
! 7.1A, 20V rDS(ON) =0.020, VGS = 4.5V rDS(ON) =0.025, VGS = 2.5V ! Extended VGS range (12 V) for battery applications ! HBM ESD Protection Level of 3.5kV Typical (note 3) ! High performance trench technology for extremely low rDS(ON) ! Low profile TSSOP-8 package
tmM
General Description
This N-Channel MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance. These devices are well suited for portable electronics applications.
Applications
! Load switch ! Battery charge ! Battery disconnect circuits
G2 S2 S2 D2 G1 S1 S1 D1
D1
D2
G1
G2
TSSOP-8
Pin 1
S1
S2
(c)2008 Fairchild Semiconductor Corporation
FDW2511NZ Rev. A1
1
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FDW2511NZ Dual N-Channel 2.5V Specified PowerTrench(R) MOSFET
Absolute Maximum Ratings TA=25C unless otherwise noted
Symbol VDSS VGS Parameter Drain to Source Voltage Gate to Source Voltage Drain Current Continuous (TC = 25oC, VGS = 4.5V, RJA = 77oC/W) Continuous (TC = 100oC, VGS = 2.5V, RJA = 77oC/W) Pulsed PD TJ, TSTG Power dissipation Derate above 25C Operating and Storage Temperature Ratings 20 12 7.1 4.0 Figure 4 1.6 13 -55 to 150 Units V V A A A W mW/oC
o
ID
C
Thermal Characteristics
RJA RJA Thermal Resistance Junction to Ambient (Note 1) Thermal Resistance Junction to Ambient (Note 2) 77 114
o
C/W
oC/W
Package Marking and Ordering Information
Device Marking 2511NZ 2 Device FDW2511NZ Package TSSOP-8 Reel Size 13" Tape Width 12 mm Quantity 2500 units
Electrical Characteristics TA = 25C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS IDSS IGSS Drain to Source Breakdown Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250A, VGS = 0V VDS = 16V VGS = 0V VGS = 12V VGS = 4.5V TA=100oC 20 1 5 10 250 V A A nA
On Characteristics
VGS(TH) rDS(ON) Gate to Source Threshold Voltage VGS = VDS, ID = 250A ID = 7.1A, VGS = 4.5V Drain to Source On Resistance ID = 6.9A, VGS = 4.0V ID = 6.5A, VGS = 3.1V ID = 6.3A, VGS = 2.5V 0.6 0.8 0.015 0.015 0.016 0.017 1.5 0.020 0.021 0.024 0.025 V
Dynamic Characteristics
CISS COSS CRSS RG Qg(TOT) Qg(2.5) Qgs Qgd Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance Total Gate Charge at 4.5V Total Gate Charge at 2.5V Gate to Source Gate Charge Gate to Drain "Miller" Charge VDS = 10V, VGS = 0V, f = 1MHz VGS = 0.5V, f = 1MHz VGS = 0V to 4.5V VGS = 0V to 2.5V VDD = 10V ID = 7.1A Ig = 1.0mA 1000 250 175 2.8 11.5 7.6 1.7 3.5 17.3 11.4 pF pF pF nC nC nC nC
FDW2511NZ Rev. A1
2
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FDW2511NZ Dual N-Channel 2.5V Specified PowerTrench(R) MOSFET
Switching Characteristics
tON td(ON) tr td(OFF) tf tOFF Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time
(VGS = 4.5V) VDD = 10V, ID = 7.1A VGS = 4.5V, RGS = 6.8 13 84 41 55 146 144 ns ns ns ns ns ns
Drain-Source Diode Characteristics
VSD trr QRR
Notes: 1. RJA is 77 oC/W (steady state) when mounted on a 1 inch2 copper pad on FR-4. 2. RJA is 114 oC/W (steady state) when mounted on a mininum copper pad on FR-4. 3 The diode connected to the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. 4
Source to Drain Diode Voltage Reverse Recovery Time Reverse Recovered Charge
ISD = 1.3A ISD = 7.1A, dISD/dt = 100A/s ISD = 7.1A, dISD/dt = 100A/s
-
0.7 -
1.2 27 16
V ns nC
FDW2511NZ Rev. A1
3
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FDW2511NZ Dual N-Channel 2.5V Specified PowerTrench(R) MOSFET
Typical Characteristic
1.2
TA = 25C unless otherwise noted
8
POWER DISSIPATION MULTIPLIER
1.0 ID, DRAIN CURRENT (A) 6 VGS = 4.5V
0.8
0.6
4
VGS = 2.5V
0.4
2
0.2 0 0 25 50 75 100 125 150 25 50 75 100 125 150 TA , AMBIENT TEMPERATURE (oC) TA, AMBIENT TEMPERATURE (oC)
0
Figure 1. Normalized Power Dissipation vs Ambient Temperature
2 1 THERMAL IMPEDANCE DUTY CYCLE - DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01
Figure 2. Maximum Continuous Drain Current vs Ambient Temperature
ZJA, NORMALIZED
0.1
PDM
t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA 0.01 10-5 10-4 10-3 10-2 10-1 100 101 102 103 t, RECTANGULAR PULSE DURATION (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
400 TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION IDM, PEAK CURRENT (A) 100 TA = 25oC FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: I = I25 150 - TA 125 VGS = 2.5V
10 5 10-5 10-4 10-3 10-2 10-1 t, PULSE WIDTH (s) 100 101 102 103
Figure 4. Peak Current Capability
FDW2511NZ Rev. A1
4
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FDW2511NZ Dual N-Channel 2.5V Specified PowerTrench(R) MOSFET
Typical Characteristic (Continued) TA = 25C unless otherwise noted
400 100 ID, DRAIN CURRENT (A) 100s ID, DRAIN CURRENT (A) 30 TJ = 150oC 20 TJ = 25oC 40 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDD = 10V
1ms 10 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 1 0.5 0.1 1.0 VDS, DRAIN TO SOURCE VOLTAGE (V) 10 30 SINGLE PULSE TJ = MAX RATED TA = 25oC
10ms
10
TJ = -55oC
0 1.0 1.5 2.0 2.5 VGS , GATE TO SOURCE VOLTAGE (V)
Figure 5. Forward Bias Safe Operating Area
40 VGS = 10V
ID, DRAIN CURRENT (A)
Figure 6. Transfer Characteristics
40
VGS = 2.5V
rDS(ON), DRAIN TO SOURCE ON RESISTANCE (m)
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX ID = 7.1A 30
30 VGS = 4.5V VGS = 1.8V 20 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 10 TA = 25oC 0 0 0.5 1.0 1.5
20 ID = 1A
10 1 2 3 4 5 VDS , DRAIN TO SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V)
Figure 7. Saturation Characteristics
Figure 8. Drain to Source On Resistance vs Gate Voltage and Drain Current
1.25
1.50
NORMALIZED DRAIN TO SOURCE ON RESISTANCE
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX NORMALIZED GATE THRESHOLD VOLTAGE
VGS = VDS, ID = 250A
1.25
1.00
1.00
0.75
VGS = 4.5V, ID = 7.1A 0.75 -80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC) 0.50 -80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC)
Figure 9. Normalized Drain to Source On Resistance vs Junction Temperature
Figure 10. Normalized Gate Threshold Voltage vs Junction Temperature
FDW2511NZ Rev. A1
5
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FDW2511NZ Dual N-Channel 2.5V Specified PowerTrench(R) MOSFET
Typical Characteristic (Continued) TA = 25C unless otherwise noted
1.10 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250A 1000 1.05 C, CAPACITANCE (pF) 2000 CISS = CGS + CGD
COSS CDS + CGD
1.00
CRSS = CGD
VGS = 0V, f = 1MHz 0.95 -80 -40 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) 100 0.1 1 VDS , DRAIN TO SOURCE VOLTAGE (V) 10 20
Figure 11. Normalized Drain to Source Breakdown Voltage vs Junction Temperature
4.5 VGS , GATE TO SOURCE VOLTAGE (V) VDD = 10V
Figure 12. Capacitance vs Drain to Source Voltage
3.0
1.5 WAVEFORMS IN DESCENDING ORDER: ID = 1A ID = 7.1A 0 0 3 6 Qg, GATE CHARGE (nC) 9 12
Figure 13. Gate Charge Waveforms for Constant Gate Currents
FDW2511NZ Rev. A1
6
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FDW2511NZ Dual N-Channel 2.5V Specified PowerTrench(R) MOSFET
Test Circuits and Waveforms
VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP 0V RG IAS VDD VDD tP VDS
+
IAS 0.01 0 tAV
Figure 14. Unclamped Energy Test Circuit
Figure 15. Unclamped Energy Waveforms
VDS VDD L VGS Qg(TOT) VDS
+
VGS
VGS = 4.5V
VDD DUT Ig(REF) VGS = 1V 0
Qgs2
Qg(TH) Qgs Ig(REF) 0 Qgd
Figure 16. Gate Charge Test Circuit
Figure 17. Gate Charge Waveforms
VDS
tON td(ON) RL VDS 90% tr
tOFF td(OFF) tf 90%
VGS
+
VDD DUT 0
10%
10%
RGS VGS VGS 0 10% 50% PULSE WIDTH
90% 50%
Figure 18. Switching Time Test Circuit
Figure 19. Switching Time Waveforms
FDW2511NZ Rev. A1
7
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FDW2511NZ Dual N-Channel 2.5V Specified PowerTrench(R) MOSFET
PSPICE Electrical Model
.SUBCKT FDW2511NZ 2 1 3 ; Ca 12 8 1.1e-9 Cb 15 14 1.1e-9 Cin 6 8 0.8e-9 Dbody 7 5 DbodyMOD Dbreak 5 11 DbreakMOD DESD2 91 9 DESD2MOD DESD1 91 7 DESD1MOD Dplcap 10 5 DplcapMOD
-
rev July 2004
LDRAIN DPLCAP 10 RSLC1 51 ESLC 50 RLDRAIN DBREAK 11 + 17 EBREAK 18 MWEAK MMED MSTRO CIN LSOURCE 8 RSOURCE RLSOURCE S1A 12 S1B CA 13 + 6 8 13 8 S2A 14 13 S2B CB + EDS 5 8 8 RVTHRES 14 IT VBAT + 22 15 17 RBREAK 18 RVTEMP 19 7 SOURCE 3 5 DRAIN 2
RSLC2
5 51 ESG + LGATE GATE 1 RLGATE EVTEMP RGATE + 18 22 9 20 6 6 8 EVTHRES + 19 8 EGS
Ebreak 11 7 17 18 24 Eds 14 8 5 8 1 Egs 13 8 6 8 1 Esg 6 10 6 8 1 Evthres 6 21 19 8 1 Evtemp 20 6 18 22 1 It 8 17 1 Lgate 1 9 9.1e-10 Ldrain 2 5 1e-9 Lsource 3 7 2.1e-10 RLgate 1 9 9.1 RLdrain 2 5 10 RLsource 3 7 2.1
Mmed 16 6 8 8 MmedMOD Mstro 16 6 8 8 MstroMOD Mweak 16 21 8 8 MweakMOD
Rbreak 17 18 RbreakMOD 1 Rdrain 50 16 RdrainMOD 1.0e-2 Rgate 9 20 2.75 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 Rsource 8 7 RsourceMOD 1.7e-3 Rvthres 22 8 Rvthresmod 1 Rvtemp 18 19 RvtempMOD 1 S1a 6 12 13 8 S1AMOD S1b 13 12 13 8 S1BMOD S2a 6 15 14 13 S2AMOD S2b 13 15 14 13 S2BMOD Vbat 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*120),2.5))} MODEL DbodyMOD D (IS=3.5E-11 RS=1.08e-2 IKF=.5 N= TRS1=8e-4 TRS2=6e-6 XTI=.1 +CJO=3.2e-10 TT=1.07e-8 M=0.68 TIKF=0.001) .MODEL DbreakMOD D (RS=1e-1 TRS1=9e-3 TRS2=-2.0e-5) .MODEL DESD1MOD D (BV=15.0 RS=1) .MODEL DESD2MOD D (BV=14.3 RS=1) .MODEL DplcapMOD D (CJO=0.70e-9 IS=1e-30 N=10 M=0.3) MODEL MstroMOD NMOS (VTO=1.21 KP=147 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL MmedMOD NMOS (VTO=0.93 KP=1.7 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=2.75) .MODEL MweakMOD NMOS (VTO=0.752 KP=0.05 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=27.5 RS=.1) MODEL RbreakMOD RES (TC1=5.0e-4 TC2=8e-7) .MODEL RdrainMOD RES (TC1=2.1e-3 TC2=3.4e-6) .MODEL RSLCMOD RES (TC1=1e-3 TC2=1e-5) .MODEL RsourceMOD RES (TC1=5e-3 TC2=1e-6) .MODEL RvtempMOD RES (TC1=-.9e-3 TC2=1e-7) .MODEL RvthresMOD RES (TC1=-1.1e-3 TC2=-4.0e-6) MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-6 VOFF=-1.5) .MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-1.5 VOFF=-6) .MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-0.5 VOFF=0.3) .MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=0.3 VOFF=-0.5) ENDS *$ Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
FDW2511NZ Rev. A1
8
+
RDRAIN 21 16
DBODY
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FDW2511NZ Dual N-Channel 2.5V Specified PowerTrench(R) MOSFET
SABER Electrical Model
REV July 2004 template fdw2511nz n2,n1,n3 electrical n2,n1,n3 { var i iscl dp..model dbodymod = (isl=3.5e-11,rs=1.08e-2,ikf=.5,trs1=8e-4,trs2=6e-6,xti=.1,cjo=3.2e-10,tt=1.07e-8,m=0.68,tikf=0.001) dp..model dbreakmod = (rs=1e-1,trs1=9e-3,trs2=-2.0e-5) dp..model dplcapmod = (cjo=0.70e-9,isl=10e-30,nl=10,m=0.3) m..model mstrongmod = (type=_n,vto=1.21,kp=147,is=1e-30, tox=1) m..model mmedmod = (type=_n,vto=0.93,kp=1.7,is=1e-30, tox=1) m..model mweakmod = (type=_n,vto=0.752,kp=0.05,is=1e-30, tox=1,rs=0.1) sw_vcsp..model s1amod = (ron=1e-5,roff=0.1,von=-6,voff=-1.5) sw_vcsp..model s1bmod = (ron=1e-5,roff=0.1,von=-1.5,voff=-6) sw_vcsp..model s2amod = (ron=1e-5,roff=0.1,von=-0.5,voff=0.3) LDRAIN DPLCAP 5 sw_vcsp..model s2bmod = (ron=1e-5,roff=0.1,von=0.3,voff=-0.5) c.ca n12 n8 = 1.1e-9 10 c.cb n15 n14 = 1.1e-9 RLDRAIN RSLC1 c.cin n6 n8 = 0.8e-9 51
RSLC2
DRAIN 2
dp.dbody n7 n5 = model=dbodymod dp.dbreak n5 n11 = model=dbreakmod desd2 91 9 desd2mod desd1 91 7 desd1mod dp.dplcap n10 n5 = model=dplcapmod spe.ebreak n11 n7 n17 n18 = 24 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evthres n6 n21 n19 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 i.it n8 n17 = 1 l.lgate n1 n9 = 9.1e-10 l.ldrain n2 n5 = 1e-9 l.lsource n3 n7 = 2.1e-10 res.rlgate n1 n9 = 9.1 res.rldrain n2 n5 = 10 res.rlsource n3 n7 = 2.1 m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u
LGATE GATE 1 RLGATE
ISCL ESG + EVTEMP RGATE + 18 22 9 20 6 8 EVTHRES + 19 8 6 MSTRO CIN 8 50 RDRAIN 21 16 MWEAK MMED EBREAK + 17 18 DBREAK 11 DBODY
LSOURCE 7 RLSOURCE SOURCE 3
RSOURCE S1A 12 S1B CA 13 + EGS 6 8 EDS 13 8 S2A 14 13 S2B CB + 5 8 8 22 RVTHRES 14 IT VBAT + 15 17 RBREAK 18 RVTEMP 19
res.rbreak n17 n18 = 1, tc1=5.0e-4,tc2=8e-7 m.desd1mod bv=15.0 rs=1) m.desd2mod bv=14.3 rs=1) res.rdrain n50 n16 = 1.0e-2, tc1=2.1e-3,tc2=3.4e-6 res.rgate n9 n20 = 2.75 res.rslc1 n5 n51 = 1e-6, tc1=1e-3,tc2=1e-5 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 1.7e-3, tc1=5e-3,tc2=1e-6 res.rvthres n22 n8 = 1, tc1=-1.1e-3,tc2=-4.0e-6 res.rvtemp n18 n19 = 1, tc1=-.9e-3,tc2=1e-7 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1 equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/120))** 2.5)) } }
FDW2511NZ Rev. A1
9
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FDW2511NZ Dual N-Channel 2.5V Specified PowerTrench(R) MOSFET
SPICE Thermal Model
REV July 2004 FDW2511NZ_JA Junction Ambient Minimum copper pad area CTHERM1 Junction c2 5.7e-4 CTHERM2 c2 c3 5.72e-4 CTHERM3 c3 c4 5.8e-4 CTHERM4 c4 c5 4.7e-3 CTHERM5 c5 c6 5.1e-3 CTHERM6 c6 c7 0.02 CTHERM7 c7 c8 0.2 CTHERM8 c8 Ambient 6 RTHERM1 Junction c2 0.003 RTHERM2 c2 c3 0.25 RTHERM3 c3 c4 1.0 RTHERM4 c4 c5 1.1 RTHERM5 c5 c6 7.5 RTHERM6 c6 c7 33.6 RTHERM7 c7 c8 33.7 RTHERM8 c8 Ambient 33.8
th JUNCTION
RTHERM1 2
CTHERM1
RTHERM2 3
CTHERM2
RTHERM3 4
CTHERM3
RTHERM4 5
CTHERM4
SABER Thermal Model
SABER thermal model FDW2511NZ Minimum copper pad area template thermal_model th tl thermal_c th, tl { ctherm.ctherm1 th c2 = 5.7e-4 ctherm.ctherm2 c2 c3 = 5.72e-4 ctherm.ctherm3 c3 c4 = 5.8e-4 ctherm.ctherm4 c4 c5 = 4.7e-3 ctherm.ctherm5 c5 c6 = 5.1e-3 ctherm.ctherm6 c6 c7 = 0.02 ctherm.ctherm7 c7 c8 = 0.2 ctherm.ctherm8 c8 tl = 6 rtherm.rtherm1 th c2 = 0.003 rtherm.rtherm2 c2 c3 = 0.25 rtherm.rtherm3 c3 c4 = 1.0 rtherm.rtherm4 c4 c5 = 1.1 rtherm.rtherm5 c5 c6 = 7.5 rtherm.rtherm6 c6 c7 = 33.6 rtherm.rtherm7 c7 c8 = 33.7 rtherm.rtherm8 c8 tl = 33.8 }
RTHERM5
CTHERM5 6
RTHERM6 7
CTHERM6
RTHERM7 8
CTHERM7
RTHERM8
CTHERM8
tl
AMBIENT
FDW2511NZ Rev. A1
10
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TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidianries, and is not intended to be an exhaustive list of all such trademarks. ACEx(R) Build it NowTM CorePLUSTM CorePOWERTM CROSSVOLTTM CTLTM Current Transfer LogicTM EcoSPARK(R) EfficentMaxTM EZSWITCHTM *
TM
(R)
Fairchild(R) Fairchild Semiconductor(R) FACT Quiet SeriesTM FACT(R) FAST(R) FastvCoreTM FlashWriter(R) *
FPSTM F-PFSTM FRFET(R) Global Power ResourceSM Green FPSTM Green FPSTM e-SeriesTM GTOTM IntelliMAXTM ISOPLANARTM MegaBuckTM MICROCOUPLERTM MicroFETTM MicroPakTM MillerDriveTM MotionMaxTM Motion-SPMTM OPTOLOGIC(R) OPTOPLANAR(R)
(R)
tm
PDP-SPMTM Power-SPMTM PowerTrench(R) Programmable Active DroopTM QFET(R) QSTM Quiet SeriesTM RapidConfigureTM Saving our world 1mW at a timeTM SmartMaxTM SMART STARTTM SPM(R) STEALTHTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SuperMOSTM (R)
The Power Franchise(R)
tm
TinyBoostTM TinyBuckTM TinyLogic(R) TINYOPTOTM TinyPowerTM TinyPWMTM TinyWireTM SerDesTM UHC(R) Ultra FRFETTM UniFETTM VCXTM VisualMaxTM
* EZSWITCHTM and FlashWriter(R) are trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. This datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.
Rev. I34
Preliminary
First Production
No Identification Needed Obsolete
Full Production Not In Production
FDW2511NZ Rev.A1
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