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SSM9926GM
Dual N-channel Enhancement-mode Power MOSFETs
PRODUCT SUMMARY
BVDSS R DS(ON) ID
DESCRIPTION
The SSM9926GM acheives fast switching performance with low gate charge without a complex drive circuit. It is suitable for low voltage applications such as DC/DC converters and general load-switching circuits. The SSM9926GM is supplied in an RoHS-compliant SO-8 package, which is widely used for medium power commercial and industrial surface mount applications.
20V 30m 6A
Pb-free; RoHS-compliant SO-8
D2 D2 D1 D1 G2 S2
SO-8
S1
G1
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VGS ID IDM PD TSTG TJ Parameter Drain-source voltage Gate-source voltage Continuous drain current Pulsed drain current
1,2
3
3 ,
Value 20 12 T A = 25C TA = 70C 6 4.8 26 2 0.016 -55 to 150 -55 to 150
Units V V A A A W W/C C C
Total power dissipation , TA = 25C Linear derating factor Storage temperature range Operating junction temperature range
THERMAL CHARACTERISTICS
Symbol RJA Parameter Maximum thermal resistance, junction-ambient
3
Value 62.5
Units C/W
Notes:
1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150C. 2.Pulse width <300us, duty cycle <2%. 3.Mounted on a square inch of copper pad on FR4 board ; 135C/W when mounted on the minimum pad area required for soldering.
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SSM9926GM
ELECTRICAL CHARACTERISTICS
Symbol BVDSS Parameter Drain-source breakdown voltage
Breakdown voltage temperature coefficient
(at Tj = 25C, unless otherwise specified)
Test Conditions VGS=0V, ID=250uA Reference to 25C, ID=1mA VGS=4.5V, ID=6A VGS=2.5V, ID=5.2A Min. 20 Typ. 0.03 20 23 4.5 7 30 70 40 65 1035 320 150 Max. Units 30 45 1.2 25 250 100 35 7 11 60 140 80 130 V V/C m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF
BV DSS/Tj
RDS(ON)
Static drain-source on-resistance2
VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Gate threshold voltage Forward transconductance
VDS=VGS, ID=250uA VDS=10V, ID=6A
Drain-source leakage current
VDS=20V, VGS=0V
VDS=20V ,VGS=0V, Tj = 70C VGS=12V ID=6A VDS=20V VGS=5V VDS=10V ID=1A RG=6 , VGS=5V RD=10 VGS=0V VDS=20V f=1.0MHz
Gate-source leakage current Total gate charge
2
Gate-source charge Gate-drain ("Miller") charge Turn-on delay time Rise time Turn-off delay time Fall time Input capacitance Output capacitance Reverse transfer capacitance
2
Source-Drain Diode
Symbol VSD
Is
Parameter Forward voltage
2
Test Conditions IS=1.7A, VGS=0V
VD=VG=0V , VS=1.3V
Min. -
Typ. 0.78
-
Max. Units 1.2
1.54
V
A
Continuous source current (body diode)
Notes:
1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150C. 2.Pulse width <300us, duty cycle <2%.
3/16/2006 Rev.3.01
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SSM9926GM
25
20
T C =25 o C
20
T C =150 o C
4.5V 4.0V 3.5V
16
4.5V 4.0V 3.5V
ID , Drain Current (A)
ID , Drain Current (A)
15
12
3.0V
8
10
3.0V
2.5V
4
5
2.5V V GS = 2 .0V
2.0V
0
0 0 0.4 0.8 1.2
V GS = 1 . 5 V
0 0.4 0.8 1.2 1.6
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
50
1.8
I D =6A V GS =2.5V
40 1.5
I D =6A V GS =4.5V Normalized RDS(ON)
4.5V
RDS(ON) (mohm)
30
1.2
20
0.9
10 -50 0 50 100 o 150
0.6 -50 0 50 100 o 150
T j , Junction Temperature ( C)
T j , Junction Temperature ( C)
Fig 3. RDS(ON) vs. Junction Temperature
Fig 4. Normalized On-Resistance vs. Temperature
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SSM9926GM
8
2.5
7 2 6
ID , Drain Current (A)
5
1.5
4
PD (W)
25 50 75 100 o 125 150
3
1
2 0.5 1
0
0 0 50 100 150
T c , Case Temperature ( C)
Tc ( C )
o
Fig 5. Maximum Drain Current vs. Case Temperature
Fig 6. Typical Power Dissipation
100
1
Duty Factor = 0.5
Normalized Thermal Response (R thja)
0.2
10
1ms 10ms
0.1
0.1
0.05
ID (A)
1
100ms 1s
0.1
0.02
PDM
0.01
t
Single Pulse
0.01
T
T C =25 o C Single Pulse
10s DC
Duty Factor = t/T Peak Tj = P DM x Rthja + Ta Rthja=135oC/W
0.01 0.1 1 10 100
0.001 0.0001 0.001 0.01 0.1 1 10 100 1000
V DS (V)
t , Pulse Width (S)
Fig 7. Maximum Safe Operating Area
Fig 8. Effective Transient Thermal Impedance
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SSM9926GM
12
10000
f=1.0MHz
V DS =10V VGS , Gate to Source Voltage (V)
9
V DS =15V V DS =20V
C (pF)
Ciss
1000
6
3
Coss Crss
0 0 9 18 27 36 45
100 1 10 19
Q G , Total Gate Charge (nC)
V DS (V)
Fig 9. Typical Gate Charge vs. VGS
Fig 10. Typical Capacitance vs. VDS
10
1.2
T j =150 o C T j =25 o C
1
0.95
Vth (V)
IF (A)
0.7
0.45
0.1 0 0.4 0.8 1.2 1.6
0.2 -50 0 50 100 150
V SD (V)
T j , Junction Temperature ( C )
o
Fig 11. Forward Characteristic of Reverse Diode
Fig 12. Gate Threshold Voltage vs. Junction Temperature
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SSM9926GM
VDS
RD
90%
D
VDS
TO THE OSCILLOSCOPE 0.5x RATED VDS
RG
G
+ 5v -
S VGS
10% VGS td(on) tr td(off) tf
Fig 13. Switching Time Circuit
Fig 14. Switching Time Waveform
VG
VDS TO THE OSCILLOSCOPE
QG 5V
D
G S
+
RATED VDS
QGS
QGD
VGS
1~ 3 mA
IG ID
Charge
Q
Fig 15. Gate Charge Circuit
Fig 16. Gate Charge Waveform
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SSM9926GM
PHYSICAL DIMENSIONS
D
SYMBOL A A1
H E
MIN 1.35 0.10 0.33 0.19 4.80 3.80 5.80 0.38
MAX 1.75 0.25 0.51 0.25 5.00 4.00 6.50 1.27
B C D E
e A C A1
e H L
L
1.27(TYP)
B
All dimensions in millimeters. Dimensions do not include mold protrusions.
PART MARKING
PART NUMBER: 9926GM
XXXXXX YWWSSS
DATE/LOT CODE: (YWWSSS) Y = last digit of the year WW = week SSS = lot code sequence
PACKING: Moisture sensitivity level MSL3
3000 pcs in antistatic tape on a 13 inch (330mm) reel packed in a moisture barrier bag (MBB).
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties.
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