View 74LVTN16245B_4672986.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

74LVTN16245B
3.3 V 16-bit transceiver; 3-state
Rev. 01 -- 29 July 2009 Product data sheet
1. General description
The 74LVTN16245B is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is a 16-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The control function implementation minimizes external timing requirements. The device features an output enable input (nOE) for easy cascading and a direction input (nDIR) for direction control.
2. Features
I I I I I I I I I 16-bit bus interface 3-state buffers Output capability: +64 mA and -32 mA TTL input and output switching levels Input and output interface capability to systems at 5 V supply Power-up 3-state Live insertion and extraction permitted No bus current loading when output is tied to 5 V bus Latch-up protection N JESD78 Class II exceeds 500 mA I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V
3. Ordering information
Table 1. Ordering information Package Temperature range 74LVTN16245BDGG 74LVTN16245BBQ -40 C to +85 C -40 C to +85 C Name TSSOP48 Description plastic thin shrink small outline package; 48 leads; body width 6.1 mm Version SOT362-1 SOT1025-1 Type number
HUQFN60U plastic thermal enhanced ultra thin quad flat package; no leads; 60 terminals; UTLP based; body 4 x 6 x 0.55 mm
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
4. Functional diagram
1DIR 1OE 1A0 1B0 1A1 1B1 1A2 1B2 1A3 1B3 1A4 1B4 1A5 1B5 1A6 1B6 1A7 1B7
2DIR 2OE 2A0 2B0 2A1 2B1 2A2 2B2 2A3 2B3 2A4 2B4 2A5 2B5 2A6 2B6 2A7 2B7
001aaa789
Fig 1. Logic symbol
74LVTN16245B_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 29 July 2009
2 of 16
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
1OE 1DIR
G3 3EN1[BA] 3EN2[AB]
2OE 2DIR
G6 6EN4[BA] 6EN5[AB]
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
1 2
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
4 5
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
001aak306
Fig 2. IEC logic symbol
74LVTN16245B_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 29 July 2009
3 of 16
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
5. Pinning information
5.1 Pinning
74LVTN16245B
1DIR 1B0 1B1 GND 1B2 1B3 VCC 1B4 1B5 1 2 3 4 5 6 7 8 9 48 1OE 47 1A0 46 1A1 45 GND 44 1A2 43 1A3 42 VCC 41 1A4 40 1A5 39 GND 38 1A6 37 1A7 36 2A0 35 2A1 34 GND 33 2A2 32 2A3 31 VCC 30 2A4 29 2A5 28 GND 27 2A6 26 2A7 25 2OE
001aak307
GND 10 1B6 11 1B7 12 2B0 13 2B1 14 GND 15 2B2 16 2B3 17 VCC 18 2B4 19 2B5 20 GND 21 2B6 22 2B7 23 2DIR 24
Fig 3.
Pin configuration SOT362-1 (TSSOP48)
74LVTN16245B_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 29 July 2009
4 of 16
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
terminal 1 index area
D1
A32
A31
A30
A29
A28
A27
D4
A1
D5
B20
B19
B18
D8
A26
A2 B1 A3 B2 A4 B3 A5 B4 A6 B5 A7 B6 A8 B7 A9 GND(1) B11 B12 B13 B15 B16 B17
A25
A24
A23
A22
74LVTN16245B
B14 A21
A20
A19
A18
A10
D6
B8
B9
B10
D7
A17
D2
A11
A12
A13
A14
A15
A16
D3
001aak308
Transparent top view
(1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input.
Fig 4.
Pin configuration SOT1025-1 (HUQFN60U)
74LVTN16245B_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 29 July 2009
5 of 16
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
5.2 Pin description
Table 2. Symbol 1DIR, 2DIR 1B0 to 1B7 2B0 to 2B7 GND VCC 1OE, 2OE 2A0 to 2A7 1A0, to 1A7 n.c. Pin description Pin SOT362-1 1, 24 2, 3, 5, 6, 8, 9, 11, 12 13, 14, 16, 17, 19, 20, 22, 23 4, 10, 15, 21, 28, 34, 39, 45 7, 18, 31, 42 48, 25 36, 35, 33, 32, 30, 29, 27, 26 47, 46, 44, 43, 41, 40, 38, 37 SOT1025-1 A30, A13 B20, A31, D5, D1, A2, B2, B3, A5 A32, A3, A8, A11, A16, A19, A24, A27 A1, A10, A17, A26 A29, A14 A21, B13, B12, A18, D3, D7, A15, B10 B18, A28, D8, D4, A25, B16, B15, A22 A4, A7, A20, A23, B1, B4, B7, B9, B11, B14, B17, B19 direction control input data input/output Description
A6, B5, B6, A9, D2, D6, A12, B8 data input/output ground (0 V) supply voltage output enable input (active LOW) data input/output data input/output not connected
6. Functional description
Table 3. Control nOE L L H
[1]
Function table [1] Input/output nDIR L H X nAn output nAn = nBn input Z nBn input output nBx = nAx Z
H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high-impedance OFF-state.
7. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC VI VO IIK IOK IO Tstg Tj
74LVTN16245B_1
Parameter supply voltage input voltage output voltage input clamping current output clamping current output current storage temperature junction temperature
Conditions
[1]
Min -0.5 -0.5 -0.5 -50 -50 -64 -65
[2]
Max +4.6 +7.0 +7.0 128 +150 150
Unit V V V mA mA mA mA C C
output in OFF-state or HIGH-state VI < 0 V VO < 0 V output in LOW-state output in HIGH-state
[1]
-
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 29 July 2009
6 of 16
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
Table 4. Limiting values ...continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Ptot Parameter total power dissipation Conditions Tamb = -40 C to +85 C TSSOP48 package HUQFN60U package
[1] [2] [3] [4]
[3] [4]
Min -
Max 500 1000
Unit mW mW
The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. Above 60 C the value of Ptot derates linearly with 5.5 mW/K. Above 70 C the value of Ptot derates linearly with 1.8 mW/K.
8. Recommended operating conditions
Table 5. Symbol VCC VI VIH VIL IOH IOL Recommended operating conditions Parameter supply voltage input voltage HIGH-level input voltage LOW-level input voltage HIGH-level output current LOW-level output current none current duty cycle 50 %; fi 1 kHz Tamb t/V ambient temperature in free-air input transition rise and fall rate outputs enabled Conditions Min 2.7 0 2.0 -32 -40 Typ Max 3.6 5.5 0.8 32 64 +85 10 Unit V V V V mA mA mA C ns/V
9. Static characteristics
Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = -40 C to +85 C VIK VOH input clamping voltage VCC = 2.7 V; IIK = -18 mA IOH = -8 mA; VCC = 2.7 V IOH = -32 mA; VCC = 3.0 V VOL LOW-level output voltage VCC = 2.7 V IOL = 100 A IOL = 24 mA VCC = 3.0 V IOL = 16 mA IOL = 32 mA IOL = 64 mA
74LVTN16245B_1
Conditions
Min -1.2 2.4 2.0 -
Typ[1] -0.85 2.5 2.3 0.07 0.3 0.25 0.3 0.4
Max 0.2 0.5 0.4 0.5 0.55
Unit V V V V V V V V V
HIGH-level output voltage IOH = -100 A; VCC = 2.7 V to 3.6 V
VCC - 0.2 VCC
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 29 July 2009
7 of 16
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
Table 6. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter II input leakage current Conditions control pins VCC = 3.6 V; VI = VCC or GND VCC = 0 V or 3.6 V; VI = 5.5 V input/output data pins; VCC = 3.6 V VI = 5.5 V VI = VCC VI = 0 V IOFF ILO IO(pu/pd) ICC power-off leakage current VCC = 0 V; VI or VO = 0 V to 4.5 V output leakage current power-up/power-down output current supply current output in HIGH-state when VO > VCC; VO = 5.5 V; VCC = 3.0 V VCC 1.2 V; VO = 0.5 V to VCC; VI = GND or VCC; nOE = don't care VCC = 3.6 V; VI = GND or VCC; IO = 0 A output HIGH output LOW outputs disabled ICC CI Cio(off) additional supply current input capacitance off-state input/output capacitance per input pin; VCC = 3.0 V to 3.6 V; one input at VCC - 0.6 V other inputs at VCC or GND pins nDIR and nOE, VO = 0 V or 3.0 V pins nAn and nBn, outputs disabled; VO = GND or VCC
[4] [5] [3] [2]
Min -5 -
Typ[1] 0.1 0.1 0.1 0.5 -0.1 0.1 75 40
Max 1 10 20 10 100 125 100
Unit A A A A A A A A
-
0.07 4.0 0.07 0.1 3 9
0.12 6.0 0.12 0.2 -
mA mA mA mA pF pF
[1] [2] [3] [4] [5]
Typical values are measured at VCC = 3.3 V and at Tamb = 25 C. Unused pins at VCC or GND. This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms. From VCC = 1.2 V to VCC = 3.3 V 0.3 V a transition time of 100 s is permitted. This parameter is valid for Tamb = 25 C only. ICC is measured with outputs pulled to VCC or GND. This is the increase in supply current for each input at the specified voltage level other than VCC or GND.
74LVTN16245B_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 29 July 2009
8 of 16
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol tPLH Parameter LOW to HIGH propagation delay Conditions nAn to nBn or nBn to nAn; see Figure 5 VCC = 2.7 V VCC = 3.0 V to 3.6 V tPHL HIGH to LOW propagation delay nAn to nBn or nBn to nAn; see Figure 5 VCC = 2.7 V VCC = 3.0 V to 3.6 V tPZH OFF-state to HIGH propagation delay nOE to nAn or nBn; see Figure 6 VCC = 2.7 V VCC = 3.0 V to 3.6 V tPZL OFF-state to LOW propagation delay nOE to nAn or nBn; see Figure 6 VCC = 2.7 V VCC = 3.0 V to 3.6 V tPHZ HIGH to OFF-state propagation delay nOE to nAn or nBn; see Figure 6 VCC = 2.7 V VCC = 3.0 V to 3.6 V tPLZ LOW to OFF-state propagation delay nOE to nAn or nBn; see Figure 6 VCC = 2.7 V VCC = 3.0 V to 3.6 V
[1] Typical values are measured at VCC = 3.3 V and Tamb = 25 C.
Min
Typ[1]
Max
Unit
Tamb = -40 C to +85 C
1.0
1.9
3.5 3.3
ns ns
1.0
1.7
3.5 3.3
ns ns
1.0
2.8
5.3 4.5
ns ns
1.0
2.8
5.1 4.1
ns ns
1.5
3.2
5.7 5.1
ns ns
1.5
3.0
4.6 4.6
ns ns
74LVTN16245B_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 29 July 2009
9 of 16
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
11. Waveforms
VI nAn, nBn input GND t PHL VOH nBn, nAn output VOL VM
mna477
VM
t PLH
Measurements points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5.
Propagation delay input (nAn, nBn) to output (nBn, nAn)
VI nOE input 0V tPZL 3.0 V nAn or nBn output VOL tPZH VOH nBn or nAn output 0V
001aaj658
VM
tPLZ
VM VX tPHZ VY VM
Measurements points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6. Table 8. Input VM 1.5 V
Enable and disable times Measurement points Output VM 1.5 V VX VOL + 0.3 V VY VOH - 0.3 V
74LVTN16245B_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 29 July 2009
10 of 16
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
VI negative pulse 0V
tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW VM VM
VI positive pulse 0V
VEXT VCC PULSE GENERATOR VI DUT
RT CL RL RL
VO
001aae235
Test data is given in Table 9. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times.
Fig 7. Table 9. Input VI 2.7 V
Load circuit for measuring switching times Test data Load fi 10 MHz tW 500 ns tr, tf 2.5 ns CL 50 pF RL 500 VEXT tPHZ, tPZH GND tPLZ, tPZL 6V tPLH, tPHL open
74LVTN16245B_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 29 July 2009
11 of 16
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
12. Package outline
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1
D
E
A X
c y HE vMA
Z
48
25
Q A2 A1 pin 1 index Lp L (A 3) A
1
e bp
24
wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions). UNIT mm A max. 1.2 A1 0.15 0.05 A2 1.05 0.85 A3 0.25 bp 0.28 0.17 c 0.2 0.1 D (1) 12.6 12.4 E (2) 6.2 6.0 e 0.5 HE 8.3 7.9 L 1 Lp 0.8 0.4 Q 0.50 0.35 v 0.25 w 0.08 y 0.1 Z 0.8 0.4 8 o 0
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT362-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
Fig 8. Package outline SOT362-1 (TSSOP48)
74LVTN16245B_1 (c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 29 July 2009
12 of 16
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
HUQFN60U: plastic thermal enhanced ultra thin quad flat package; no leads 60 terminals; UTLP based; body 4 x 6 x 0.55 mm
D B A
SOT1025-1
terminal 1 index area
E
A
A1
detail X
e2 v w
M M
CAB C e
e1 1/2 e
b
v w
M M
CAB C C
L1 L eR
D2 D6
A11
B8
B10
A16
D3 D7
y1 C
y
A10 B7
A17 B11
e
Eh 1/2 e
B1 A1 B17 A26
e3
e4
terminal 1 index area
D5 D1
A32
B20
B18
A27
Dh
D8 D4
k
X 0 2.5 scale 5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max 0.6 A1 0.05 0.00 b 0.35 0.25 D 4.1 3.9 Dh 1.9 1.8 E 6.1 5.9 Eh 3.9 3.8 e 0.5 e1 1 e2 2.5 e3 3
e4 4.5
eR 0.5
k 0.25 0.15
L
L1
v
w 0.05
y 0.08
y1 0.1
0.35 0.125 0.07 0.25 0.025 EUROPEAN PROJECTION
OUTLINE VERSION SOT1025-1
REFERENCES IEC --JEDEC --JEITA ---
ISSUE DATE 07-08-28 07-11-14
Fig 9.
Package outline SOT1025-1 (HUQFN60U)
(c) NXP B.V. 2009. All rights reserved.
74LVTN16245B_1
Product data sheet
Rev. 01 -- 29 July 2009
13 of 16
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
13. Abbreviations
Table 10. Acronym BiCMOS DUT ESD HBM MM TTL Abbreviations Description Bipolar Complementary Metal Oxide Semiconductor Device Under Test Electrostatic Discharge Human Body Model Machine Model Transistor-Transistor Logic
14. Revision history
Table 11. Revision history Release date 20090729 Data sheet status Product data sheet Change notice Supersedes Document ID 74LVTN16245B_1
74LVTN16245B_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 29 July 2009
14 of 16
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
15. Legal information
15.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
15.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
74LVTN16245B_1
(c) NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 -- 29 July 2009
15 of 16
NXP Semiconductors
74LVTN16245B
3.3 V 16-bit transceiver; 3-state
17. Contents
1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 Functional description . . . . . . . . . . . . . . . . . . . 6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Recommended operating conditions. . . . . . . . 7 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Contact information. . . . . . . . . . . . . . . . . . . . . 15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 29 July 2009 Document identifier: 74LVTN16245B_1

▲Up To Search▲

Price & Availability of 74LVTN16245B

	To Download 74LVTN16245B Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .