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19-0741; Rev 1; 5/09
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules
General Description
The MAX5661 single 16-bit DAC with precision highvoltage amplifiers provides a complete solution for programmable current and voltage-output applications. The output amplifiers swing to industry-standard levels of 10V (voltage output) or source from 0mA (or from 4mA) to 20mA (current output). The voltage output (OUTV) drives resistive loads greater than 2k and capacitive loads of up to 1.2F. Voltage-output forcesense connections compensate for series protection resistors and field-wiring resistance. Short-circuit protection on the voltage output limits output current to 10mA (typ) sourcing or -11.5mA (typ) sinking. The current output (OUTI) drives resistive loads up to 37.5V (max) and inductive loads up to 1H. The MAX5661 provides either a current output or a voltage output. Only one output is active at any given time, regardless of the configuration. The MAX5661 voltage output operates with 13.48V to 15.75V supplies (VDDV, VSSV) and the current output operates with a single +13.48V to +40V supply (V DDI). A +4.75V to +5.25V digital supply (VCC) powers the rest of the internal circuitry. A buffered reference input accepts an external +4.096V reference voltage. Update the DAC outputs using software commands or the asynchronous LDAC input. An asynchronous CLR input sets the DAC outputs to the value stored in the clear register or to zero. The FAULT output asserts when the DAC's current output is an open circuit, the DAC's voltage output is a short circuit, or when the CLR input is low. The MAX5661 communicates through a 4-wire 10MHz SPITM-/QSPITM-/MICROWIRETM-compatible serial interface. The DOUT output allows daisy chaining of multiple devices. The MAX5661 is available in a 10mm x 10mm, 64-pin, LQFP package and operates over the -40C to +105C temperature range.
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
PART MAX5661GCB+
Features
10-Bit Programmable Full-Scale Output Adjustment for Up to 25% Over Range Programmable Voltage Output Unipolar Range: 0 to +10.24V 25% Bipolar Range: 10.24V 25% Programmable Current Output Unipolar Low Range: 0 to 20.45mA Unipolar High Range: 3.97mA to 20.45mA Flexible Analog Supplies (See Table 16) 13.48V to 15.75V for Voltage Output +13.48V to +40V for Current Output Force-Sense Connections (Voltage Output) for Differential Voltage-Output Remote Sensing Voltage-Output Current Limit Dropout Detector Senses Out-of-Regulation Current Output CLR and LDAC Inputs for Asynchronous DAC Updates CLR Input Resets Output to Programmed Value or Zero Code FAULT Output Indicates Open-Circuited Current Output, Short-Circuited Voltage Output, or Clear State Temperature Drift Voltage Output: 0.4ppm FSR/C Current Output: 7.9ppm FSR/C Small 64-Pin LQFP Package (10mm x 10mm)
MAX5661
Ordering Information
TEMP RANGE -40C to +105C PIN-PACKAGE 64 LQFP
Applications
Industrial Analog Output Modules Industrial Instrumentation Programmable Logic Controls/Distributed Control Systems Process Control
+Denotes a lead(Pb)-free/RoHS-compliant package.
Pin Configuration and Typical Operating Circuit appear at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing delivery, and ordering information please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
ABSOLUTE MAXIMUM RATINGS
VDDCORE to VSSV ...................................................-0.3V to +42V VDDI to AGND.........................................................-0.3V to +42V VDDV to AGND........................................................-0.3V to +17V VSSV to AGND ........................................................-17V to +0.3V VDDI to VSSV ...........................................................-0.3V to +59V VCC to DGND ...........................................................-0.3V to +6V DGND, DUTGND, DUTGNDS, DACGND, DACGNDS to AGND ............................................-0.3V to +6V Digital Inputs (CS, DIN, SCLK, CLR, LDAC, CNF_) to DGND .....................................-0.3V to (VCC + 0.3V) Digital Outputs (DOUT, FAULT) to DGND.................................... ...............................-0.3V to the lesser of (VCC + 0.3V) or +6V REF to AGND............................................................-0.3V to +6V OUTV, SVP, SVN, COMPV to VSSV ...........-0.3V to (VDDV + 0.3V) OUTI, COMPI, OUTI4/0 to AGND ..............-0.3V to (VDDI + 0.3V) Maximum Current into Any Pin .......................................100mA Continuous Power Dissipation (TA = +70C) 64-Pin, 10mm x 10mm TQFP (derate 25mW/C above +70C)............................................................ 2000mW Junction-to-Ambient Thermal Resistance in Still Air (JA) ....................................................40C/W Junction-to-Case Thermal Resistance (JC)...................... 8C/W Operating Temperature Range .........................-40C to +105C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering,10s) ..................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = VDUTGND = VDACGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C. See the Typical Operating Circuit.) (Note 1)
PARAMETER STATIC PERFORMANCE Resolution VOUT IOUT, VDDI = 40V, VSSV = VDDV = 0 (Note 2) IOUT, VDDI = VDDV = +15V, VSSV = -15V (Note 2) Differential Nonlinearity Zero-Scale Voltage Error DNL VZSE 4-20mA 0 to 20mA 4-20mA 0 to 20mA -1.0 0.01 2.0 -45 -60 3.955 3.94 -15 -30 -15 -30 -30 -30 3.97 3.97 2.0 2.0 3.0 7.0 0.5 0.2 2 6 +1.0 3 10 -15 0 3.985 4.00 +15 +30 +15 +30 ppm of FSR/oC A LSB mV A mA 16 0.2 6 10 LSB 4 Bits SYMBOL CONDITIONS MIN TYP MAX UNITS
Integral Nonlinearity
INL
Guaranteed monotonic (Note 3) OUTV 0 to 20mA mode Unipolar Bipolar TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX Unipolar Bipolar
Zero-Scale Current (Note 4) 4-20mA mode 0 to 20mA mode Zero-Scale Current Error (Note 4) IZSE 4-20mA mode Voltage-Offset Error Drift TCVOS OUTV
2
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = VDUTGND = VDACGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C. See the Typical Operating Circuit.) (Note 1)
PARAMETER Current-Offset Error Drift SYMBOL TCIOS OUTI OUTV Gain Error GE OUTI OUTV Gain-Error Drift TCGE OUTI CONDITIONS 0 to 20mA 4-20mA Unipolar Bipolar TA = +25C TA = TMIN to TMAX Unipolar Bipolar 0 to 20mA 4-20mA MIN TYP 4 4 2.5 4.5 8.0 40 0.4 0.4 -7.9 -8.6 20 20 0.013 0.017 200 V/V 200 5 A/V 5 ppm of FSR/oC 10 20 70 130 MAX UNITS ppm of FSR/oC mV A
OUTV, unipolar output, full-scale code, VDDV from +13.48V to +15.75V OUTV, bipolar output, zero-scale code, VSSV from -13.48V to -15.75V OUTI, full-scale code, VDDI from +13.48V to +40V, VSSV = -15.75V, VDDV = +15.75V OUTI, full-scale code, VDDI from +13.48V to +40V, VDDV = VSSV = 0 REFERENCE INPUT Reference Input Current Reference Input Voltage Range DYNAMIC PERFORMANCE Output-Voltage Noise at 10kHz Output-Current Noise at 10kHz Voltage-Output Slew Rate Current-Output Slew Rate Major Code Transition Glitch en in Unipolar output, VOUTV = +10.48V Bipolar output, VOUTV = 10.48V 0 to 20mA range 4-20mA range COUTV = 100pF, ROUTV = 2k, step = 20V, CEXT = 0nF LOUTI = 0, ROUTI = 500, step = 20mA OUTV From code 7FFFh to code 8000h Outputs set to zero scale, all digital inputs from 0V to VCC and back to 0V OUTI OUTV 0 to 20mA 4-20mA IREF VREF 4.0
Power-Supply Rejection Ratio
PSRR
0.050 4.096 230 300 132 120 0.1 0.15 1 2.0 2.0 0.1
1 4.2
A V
nV/Hz pA/Hz V/s mA/s V*s nA*s nV*s
Digital Feedthrough
OUTI, RL = 500
0.2
pA*s
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3
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = VDUTGND = VDACGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C. See the Typical Operating Circuit.) (Note 1)
PARAMETER SETTLING TIME Bipolar output, CCOMPV = 3.3nF, to 0.1% Bipolar output, CCOMPV = 0nF, to 0.1% Unipolar output, CCOMPV = 3.3nF, to 0.1% Unipolar output, CCOMPV = 0nF, to 0.1% 0 to 20.45mA range to 0.1% Current-Output Settling Time 3.97mA to 20.45mA range to 0.1% COUTV = 1nF, ROUTV = 2k COUTV = 1.2F, ROUTV = 2k COUTV = 100pF, ROUTV = 2k COUTV = 1nF, ROUTV = 2k COUTV = 1.2F, ROUTV = 2k COUTV = 100pF, ROUTV = 2k ROUTI = 500 LOUTI = 1mH LOUTI = 10mH LOUTI = 1H ROUTI = 500 LOUTI = 1mH LOUTI = 10mH LOUTI = 1H 3 ms 5.44 SYMBOL CONDITIONS MIN TYP MAX UNITS
244
s
Voltage-Output Settling Time
1.8 ms 3.64
130 1.5 1.66 1.66 1.97 1.43 1.58 1.58 1.73
s
ms
4
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = VDUTGND = VDACGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C. See the Typical Operating Circuit.) (Note 1)
PARAMETER OUTV OUTPUT OUTV Linear Output Voltage Range Default OUTV Output Voltage Ranges (0V to Full Scale) Minimum OUTV Output Voltage Range (FS to ADJ) Maximum OUTV Output Voltage Range (FS to ADJ) DC Output Impedance OUTV Off-State Leakage Current OUTV Short-Circuit Output Current Minimum OUTV Resistive Load Maximum OUTV Capacitive Load OUTI OUTPUT OUTI Voltage Compliance OUTI Output Current Range DC Output Impedance OUTI Off-State Leakage Current Current-Mode Dropout Detection FEEDBACK SENSE BUFFER INPUTS Input Current Input Voltage Range DIGITAL INPUTS Input High Voltage Input Low Voltage Input Capacitance Input Leakage Current DIGITAL OUTPUTS Output High Voltage Output Low Voltage VOH VOL ISOURCE = 400A, except FAULT VCC = 4.75V ISINK = 1.6mA ISINK = 10mA VCC - 0.5 0.4 1 V V VIH VIL CIN IIN VIN = 0V or VCC -1 VCC = 4.75V to 5.25V VCC = 4.75V to 5.25V 10 +1 2.4 0.8 V V pF A VSSV + 1.7V < SVP, SVN < VDDV - 1.7V SVP, SVN VSSV + 1.7 0.05 1 VDDV - 1.7 A V Full-scale output, ROUTI = 1500 (Note 5) 0 to 20mA mode includes FS calibration (Note 4) 4-20mA mode includes FS calibration OUTI = full scale OUTI off or disabled, 0V < VOUTI < VDDI VDDI - VOUTI, FAULT does not assert 0 3.97 45 0.1 1.3 10 VDDI - 2.5 20.45 20.45 M A V V mA ISC ROUTV COUTV OUTV off or disabled, output leakage current from OUTV to AGND Sourcing Sinking Full-scale code CCOMPV = 3.3nF CCOMPV = 0nF 7 -18.0 VOUT VOUT VOUT Unipolar, VDDV = +13.48V, VSSV = -13.48V Bipolar, VDDV = +13.48V, VSSV = -13.48V Unipolar Bipolar Unipolar Bipolar VSSV + 3.0 0 -10.48 +7.68 7.68 +12.8 12.8 0.1 2.5 10 -11.5 2 1.2 1 10 13 -9.0 VDDV 3.0 +10.48 +10.48 V V V V A mA k F nF SYMBOL CONDITIONS MIN TYP MAX UNITS
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5
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = VDUTGND = VDACGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C. See the Typical Operating Circuit.) (Note 1)
PARAMETER Output High Leakage Current Three-State Output Leakage Current POWER SUPPLIES (see Table 16) VCC Supply Range VDDV Supply Range VCC Only OUTV powered VDDV Only OUTI powered Both OUTV and OUTI powered Only OUTV powered VSSV Supply Range VSSV Only OUTI powered Both OUTV and OUTI powered Only OUTV powered VDDI Supply Range VDDI Only OUTI powered Both OUTV and OUTI powered Only OUTV powered VDDCORE Supply Range VDDCORE IVDDV + IVDDI + Analog and Digital Supply Currents (OUTV Active) IVDDCORE IVSSV IAGND IVCC IVDDV + IVDDI + IVDDCORE IVSSV IAGND IVCC IVDDV + IVDDI + IVDDCORE IVSSV IAGND IVCC IVDDV + IVDDCORE Analog and Digital Supply Currents (Either OUTV or OUTI Active) IVSSV IAGND IVCC IVDDI IVDDI 0 to 20mA at zero code 4-20mA at zero code Both OUTV and OUTI powered, VDDV = VDDCORE = +15.75V, VSSV = -15.75V, VDDI = +40V, VCC = +5.25V, OUTV unloaded at zero code, all ditgital inputs at VCC or DGND Only OUTI powered Both OUTV and OUTI powered OUTV powered, VDDV = VDDI = VDDCORE = +15.75V, VSSV = -15.75V, VCC = +5.25V, OUTV unloaded, all ditgital inputs at VCC or DGND +13.48 VDDV VDDV VDDI VDDV 4.5 -5 -3.0 -2.5 -1.6 0.03 2.8 OUTI powered, VDDV = VSSV = AGND, VDDI = VDDCORE = +12V to +40V, VCC = +5.25V, zero code -1.0 -4.0 -0.03 -2.1 0.03 6.8 OUTI powered, VDDV = VSSV = AGND, VDDI = VDDCORE = +12V to +40V, VCC = +5.25V, zero code -1.0 -4.0 -0.03 -2.1 0.03 4.2 -4.0 -4.0 2.6 -2.0 0.03 1.3 5.3 0.2 2 6.5 mA 0.2 6 0.2 9.5 mA 0.2 5.5 mA 6.5 mA V -15.75 VDDV +40.00 +40 V +13.48 -15.75 AGND -13.48 +4.75 +13.48 AGND +15.75 -13.48 V +5.25 +15.75 V V SYMBOL FAULT only DOUT only CONDITIONS MIN TYP 0.1 0.1 MAX 2 2 UNITS A A
Analog and Digital Supply Currents (OUTI Active), 0 to 20mA Mode
Analog and Digital Supply Currents (OUTI Active), 4-20mA Mode
6
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
TIMING CHARACTERISTICS
(VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, AGND = DGND = DUTGND = DACGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C. See Figure 1.) (Notes 1, 6)
PARAMETER SCLK Rise or Fall to CS Fall Setup Time CS Fall to SCLK Rise or Fall Setup Time SCLK Pulse-Width High SCLK Pulse-Width Low DIN to SCLK High Setup Time DIN to SCLK High Hold Time SCLK Period CS Pulse-Width High CS High to SCLK High or Low Setup Time SCLK High to CS Hold Time SCLK Fall to DOUT Valid Propagation Delay CS Transitions to DOUT Enable/Disable Delay SCLK Fall or Rise to CS Rise Time LDAC Pulse-Width Low CS Rise to LDAC Rise Time SYMBOL tCSO tCSS tCH tCL tDS tDH tCP tCSW tCS1 tCSH tDO tDV tSCS tLDL tCSLD CDOUT = 100pF CDOUT = 100pF 15 40 80 CONDITIONS MIN 45 40 45 45 40 0 100 100 45 45 100 100 TYP MAX UNITS ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Note 1: Devices are 100% production tested at TA = +25C and +105C. Operation to -40C is guaranteed by design. Note 2: IOUT INL 100% production tested from 0 to 20mA only. Note 3: IOUT DNL guaranteed by VOUT DNL. Note 4: 0 to 20mA zero-scale current extrapolated by interpolation from full scale and code 192. See the Measuring Zero-Code Current (0 to 20mA Mode) section. Note 5: OUTI voltage compliance measured at VDDI = +33.22V. Note 6: When updating the DAC registers, allow 5s before sending the next command.
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7
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
CS tCSO tCSH tCSW
tCL tCP
tCH
tCSS SCLK tDH tDS
tSCS
tCS1
DIN tDO tDV
tDV
DOUT
tCSLD LDAC
tLDL
Figure 1. Serial-Interface Timing Diagram
Typical Operating Characteristics
(Typical Operating Circuit, VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = +25C.)
INL vs. DIGITAL INPUT CODE
MAX5661 toc01
INL vs. DIGITAL INPUT CODE
0.8 0.6 0.4 INL (LSB) INL (LSB) 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 -1 BIPOLAR VOLTAGE OUTPUT
MAX5661 toc02
INL vs. DIGITAL INPUT CODE
MAX5661 toc03
1.0 0.8 0.6 0.4 INL (LSB) 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 16,384 32,768 49,152 UNIPOLAR VOLTAGE OUTPUT
1.0
5 4 3 2 1 0
0 TO 20mA CURRENT OUTPUT -2 0 16,384 32,768 49,152 65,536 0 16,384 32,768 49,152 65,536 DIGITAL INPUT CODE DIGITAL INPUT CODE
65,536
DIGITAL INPUT CODE
8
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules
Typical Operating Characteristics (continued)
(Typical Operating Circuit, VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = +25C.)
MAX5661
INL vs. DIGITAL INPUT CODE
MAX5661 toc04
INL vs. DIGITAL INPUT CODE
MAX5661 toc05a
INL vs. DIGITAL INPUT CODE
MAX5661 toc05b
10 9 8 7 6 INL (LSB)
3 2 1 INL (LSB)
5 4 3 INL (LSB) 2 1 0 -1 4-20mA CURRENT OUTPUT VDDI = VDDCORE = +40V VDDV = VSSV = 0V 0 16,384 32,768 49,152
5 4 3 2 1 0 -1 -2 0 16,384 32,768 49,152 65,536 DIGITAL INPUT CODE
0 -1
0 TO 20mA CURRENT OUTPUT VDDI = VDDCORE = +40V VDDV = VSSV = 0V
-2 4-20mA CURRENT OUTPUT -3 0 16,384 32,768 49,152 65,536 DIGITAL INPUT CODE
-2 65,536 DIGITAL INPUT CODE
DNL vs. DIGITAL INPUT CODE
0.4 0.3 0.2 DNL (LSB) INL (LSB) 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 0 16,384 32,768 49,152 65,536 DIGITAL INPUT CODE -0.3 ALL MODES
MAX5661 toc06
INL vs. TEMPERATURE
MAX5661 toc07
INL vs. TEMPERATURE
0.4 0.3 0.2 INL (LSB) 0.1 0 -0.1 -0.2 MIN INL
MAX5661 toc08
0.5
0.4 0.3 0.2 0.1 0 -0.1 -0.2 UNIPOLAR VOLTAGE OUTPUT -0.4 -50 -25 0 25 50 75 100 MIN INL MAX INL
0.5 MAX INL
-0.3 -0.4 125 -50
BIPOLAR VOLTAGE OUTPUT -25 0 25 50 75 100 125
TEMPERATURE (C)
TEMPERATURE (C)
INL vs. TEMPERATURE
MAX5661 toc09
INL vs. TEMPERATURE
7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -50 -25
MAX5661 toc10
INL vs. TEMPERATURE
4-20mA CURRENT OUTPUT 2.5 2.0
MAX5661 toc11a
3.0 0 TO 20mA CURRENT OUTPUT 2.5 2.0
0 to 20mA CURRENT OUTPUT VDDI = VDDCORE = +40V VDDV = VSSV = 0V
3.0
INL (LSB)
INL (LSB)
MAX INL 1.0 0.5 0 -0.5 -1.0 -50 -25 0 25 50 75 100 125 TEMPERATURE (C) MIN INL
MAX INL
INL (LSB)
1.5
1.5 1.0 MAX INL 0.5 MIN INL 0 -0.5 -1.0
MIN INL
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
TEMPERATURE (C)
TEMPERATURE (C)
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Typical Operating Characteristics (continued)
(Typical Operating Circuit, VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = +25C.)
ZERO-SCALE ERROR vs. TEMPERATURE
MAX5661 toc12
INL vs. TEMPERATURE
5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -50 -25
MAX5661 toc11b
DNL vs. TEMPERATURE
0.4 ALL MODES 0.3 0.2 DNL (LSB) 0.1 0 -0.1 MIN DNL MAX DNL 3 2
4-20mA CURRENT OUTPUT VDDI = VDDCORE = +40V VDDV = VSSV = 0V
CURRENT OUTPUT = 0 TO 20mA ZERO-SCALE ERROR (LSB) 1 0 -1 -2 -3 -4 -5 UNIPOLAR VOLTAGE OUTPUT BIPOLAR VOLTAGE OUTPUT
INL (LSB)
MAX INL
MIN INL
-0.2 -0.3 -0.4
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
TEMPERATURE (C)
TEMPERATURE (C)
TEMPERATURE (C)
VOLTAGE-OUTPUT FULL-SCALE VOLTAGE vs. TEMPERATURE
MAX5661 toc14
CURRENT-OUTPUT FULL-SCALE CURRENT vs. TEMPERATURE
MAX5661 toc15
SUPPLY CURRENT vs. TEMPERATURE (UNIPOLAR VOLTAGE OUTPUT)
3.6 3.2 SUPPLY CURRENT (mA) 2.8 2.4 2.0 1.6 1.2 0.8 0.4 IVDDI -50 -25 0 25 50 75 100 125 IVSSV IVDDV IVDDCORE
MAX5661 toc16
10.4850
20.60 20.55 20.50 20.45 20.40 20.35
CURRENT OUTPUT = 0 TO 20mA
4.0
FULL-SCALE VOLTAGE (V)
10.4825
UNIPOLAR VOLTAGE OUTPUT
10.4800 BIPOLAR VOLTAGE OUTPUT 10.4775
FULL-SCALE CURRENT (mA)
10.4750 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
20.30 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
0 TEMPERATURE (C)
SUPPLY CURRENT vs. TEMPERATURE (BIPOLAR VOLTAGE OUTPUT)
MAX5661 toc17
SUPPLY CURRENT vs. TEMPERATURE (0 TO 20mA CURRENT OUTPUT)
MAX5661 toc18a
SUPPLY CURRENT vs. TEMPERATURE (4-20mA CURRENT OUTPUT)
MAX5661 toc18b
4.0 3.6 3.2 SUPPLY CURRENT (mA) 2.8 2.4 2.0 1.6 1.2 0.8 0.4 0 -50 -25 0 25 50 75 100 IVDDI IVSSV IVDDV IVDDCORE
4.0 3.6 3.2 SUPPLY CURRENT (mA) 2.8 2.4 2.0 1.6 1.2 0.8 0.4 0 IVDDI -50 -25 0 25 50 75 100 IVSSV IVDDV IVDDCORE
5.5 5.0 4.5 SUPPLY CURRENT (mA) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 IOUTI = 4mA RL = 500 -50 -25 0 IVDDCORE IVDDV IVSSV IVDDI
125
125
25
50
75
100
125
TEMPERATURE (C)
TEMPERATURE (C)
TEMPERATURE (C)
10
_______________________________________________________________________________________
MAX5661 toc13
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules
Typical Operating Characteristics (continued)
(Typical Operating Circuit, VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = +25C.)
SUPPLY CURRENT vs. TEMPERATURE (0 TO 20mA CURRENT OUTPUT)
MAX5661 toc18c
MAX5661
SUPPLY CURRENT vs. TEMPERATURE (4-20mA CURRENT OUTPUT)
MAX5661 toc18d
DIGITAL SUPPLY CURRENT vs. TEMPERATURE
36 34 32 IVCC (A) 30 28 26 24
MAX5661 toc19
4.0 3.6 3.2 SUPPLY CURRENT (mA) 2.8 2.4 2.0 1.6 1.2 0.8 0.4 0 IOUTI = 0mA VDDI = VDDCORE = +40V -50 -25 0 25 IVDDI IVDDCORE
6.0 5.5 SUPPLY CURRENT (mA) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 IOUTI = 4mA VDDI = VDDCORE = +40V -50 -25 0 25 IVDDI IVDDCORE
38
22 20 18 VCC = +5.25V ALL INPUTS CONNECTED TO VCC -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
50
75
100
125
50
75
100
125
TEMPERATURE (C)
TEMPERATURE (C)
UNIPOLAR VOLTAGE-OUTPUT, ZS-TO-FS TRANSITION vs. CL (CCOMP = 0nF)
MAX5661 toc20
UNIPOLAR VOLTAGE-OUTPUT, ZS-TO-FS TRANSITION vs. CL (CCOMP = 3.3nF)
MAX5661 toc21
UNIPOLAR VOLTAGE-OUTPUT SETTLING TIME (CCOMP = 0nF)
MAX5661 toc22
CL = 100pF CL = 100nF CL = 0.47F CL = 1F CL = 1.8F
CS 5V/div OUTV 2V/div CL = 100pF CL = 0.47F CL = 1F CL = 1.8F
CS 5V/div
CS 5V/div
OUTV 2V/div CL = 100pF CL = 100nF
OUTV 100mV/div
RL = 2k 400s/div 400s/div
RL = 2k
RL = 2k ZS-TO-FS TRANSITION 100s/div
UNIPOLAR VOLTAGE-OUTPUT SETTLING TIME (CCOMP = 0nF)
MAX5661 toc23
UNIPOLAR VOLTAGE-OUTPUT SETTLING TIME (CCOMP = 3.3nF)
MAX5661 toc24
UNIPOLAR VOLTAGE-OUTPUT, FS-TO-ZS TRANSITION (CCOMP = 0nF)
MAX5661 toc25
RL = 2k CS 5V/div CS 5V/div CS 5V/div
OUTV 100mV/div CL = 100pF CL = 1F CL = 1F RL = 2k ZS-TO-FS TRANSITION 400s/div RL = 2k ZS-TO-FS TRANSITION 400s/div
OUTV 100mV/div
CL = 100nF CL = 0.47F CL = 1F CL = 1.8F 400s/div
OUTV 2V/div
______________________________________________________________________________________
11
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Typical Operating Characteristics (continued)
(Typical Operating Circuit, VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = +25C.)
UNIPOLAR VOLTAGE-OUTPUT, FS-TO-ZS TRANSITION (CCOMP = 3.3nF) UNIPOLAR VOLTAGE-OUTPUT SETTLING TIME (CCOMP = 0nF)
MAX5661 toc27
MAX5661 toc26
UNIPOLAR VOLTAGE-OUTPUT SETTLING TIME (CCOMP = 3.3nF)
MAX5661 toc28
CS 5V/div
CL = 100pF
CS 5V/div CL = 100pF
CS 5V/div
RL = 2k CL = 100pF CL = 0.47F CL = 1F CL = 1.8F
OUTV 2V/div CL = 100nF RL = 2k FS-TO-ZS TRANSITION 100s/div
CL = 1F OUTV 100mV/div OUTV 100mV/div RL = 2k FS-TO-ZS TRANSITION 400s/div
400s/div
UNIPOLAR VOLTAGE-OUTPUT SETTLING TIME (CCOMP = 0nF)
MAX5661 toc29
BIPOLAR VOLTAGE-OUTPUT, ZS-TO-FS TRANSITION (CCOMP = 0nF)
MAX5661 toc30
BIPOLAR VOLTAGE-OUTPUT, ZS-TO-FS TRANSITION (CCOMP = 3.3nF)
MAX5661 toc31
CS 5V/div
CS 5V/div
CS 5V/div
CL = 1F RL = 2k FS-TO-ZS TRANSITION OUTV 100mV/div
CL = 100nF CL = 0.47F CL = 1F CL = 1.8F
OUTV 5V/div
CL = 100pF CL = 0.47F CL = 1F CL = 1.8F
OUTV 5V/div
RL = 2k 400s/div 1.0ms/div 1.0ms/div
RL = 2k
BIPOLAR VOLTAGE-OUTPUT SETTLING TIME (CCOMP = 0nF)
MAX5661 toc32
BIPOLAR VOLTAGE-OUTPUT SETTLING TIME (CCOMP = 3.3nF)
MAX5661 toc33
BIPOLAR VOLTAGE-OUTPUT SETTLING TIME (CCOMP = 0nF)
MAX5661 toc34
CL = 100pF
CS 5V/div
CS 5V/div
CS 5V/div
CL = 100nF
OUTV 100mV/div
CL = 100pF CL = 1F
OUTV 100mV/div
OUTV 100mV/div
RL = 2k ZS-TO-FS TRANSITION 100s/div 1.0ms/div
RL = 2k
CL = 1F RL = 2k ZS-TO-FS TRANSITION 1.0ms/div
12
_______________________________________________________________________________________
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules
Typical Operating Characteristics (continued)
(Typical Operating Circuit, VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = +25C.)
BIPOLAR VOLTAGE-OUTPUT, FS-TO-ZS TRANSITION (CCOMP = 0nF) BIPOLAR VOLTAGE-OUTPUT, FS-TO-ZS TRANSITION (CCOMP = 3.3nF) BIPOLAR VOLTAGE-OUTPUT SETTLING TIME (CCOMP = 0nF)
MAX5661 toc37
MAX5661
MAX5661 toc35
MAX5661 toc36
CS 5V/div
CS 5V/div
CS 5V/div
CL = 100pF CL = 0.47F CL = 1F CL = 1.8F RL = 2k 1.0ms/div OUTV 5V/div
CL = 100pF CL = 0.47F CL = 1F CL = 1.8F RL = 2k 1.0ms/div OUTV 5V/div
CL = 100pF CL = 100nF OUTV 100mV/div RL = 2k FS-TO-ZS TRANSITION 100s/div
BIPOLAR VOLTAGE-OUTPUT SETTLING TIME (CCOMP = 3.3nF)
MAX5661 toc38
BIPOLAR VOLTAGE-OUTPUT SETTLING TIME (CCOMP = 0nF)
MAX5661 toc39
0 TO 20mA CURRENT-OUTPUT, ZS-TO-FS TRANSITION vs. INDUCTIVE LOAD
MAX5661 toc40
CS 5V/div
CS 5V/div LL = 1H
CS 5V/div OUTI 4mA/div
CL = 100pF CL = 1F OUTV 100mV/div
CL = 1F RL = 2k FS-TO-ZS TRANSITION OUTV 100mV/div
LL = 0mH, LL = 100mH
RL = 2k FS-TO-ZS TRANSITION 1.0ms/div 1.0ms/div 400s/div
0 TO 20mA CURRENT-OUTPUT, ZS-TO-FS SETTLING TIME
MAX5661 toc41
0 TO 20mA CURRENT-OUTPUT, FS-TO-ZS TRANSITION vs. INDUCTIVE LOAD
MAX5661 toc42a
0 TO 20mA CURRENT-OUTPUT, FS-TO-ZS SETTLING TIME
MAX5661 toc42b
CS 5V/div
CS 5V/div OUTI 4mA/div LL = 0mH LL = 100mH
CS 5V/div OUTI 200A/div
LL = 0mH, LL = 100mH
OUTV 200A/div LL = 0mH LL = 1H LL = 100mH LL = 1H
LL = 1H
400s/div
2ms/div
2ms/div
______________________________________________________________________________________
13
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Typical Operating Characteristics (continued)
(Typical Operating Circuit, VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = +25C.)
0 TO 20mA CURRENT-OUTPUT, ZS-TO-FS TRANSITION vs. INDUCTIVE LOAD
MAX5661 toc43a
0 TO 20mA CURRENT-OUTPUT, ZS-TO-FS SETTLING TIME
MAX5661 toc43b
0 TO 20mA CURRENT-OUTPUT, FS-TO-ZS TRANSITION vs. INDUCTIVE LOAD
MAX5661 toc43c
CS 5V/div LL = 0mH, 100mH LL = 1H OUTI 4mA/div LL = 0mH, LL = 100mH VDDI = VDDCORE = +40V VDDV = VSSV = 0V 400s/div VDDI = VDDCORE = +40V VDDV = VSSV = 0V 400s/div LL = 1H
CS 5V/div VDDI = VDDCORE = +40V VDDV = VSSV = 0V OUTI 200A/div
CS 5V/div
LL = 1H LL = 100mH LL = 0mH
OUTI 4mA/div
2ms/div
0 TO 20mA CURRENT-OUTPUT, FS-TO-ZS SETTLING TIME
MAX5661 toc43d
OUTV OUTPUT VOLTAGE vs. LOAD CURRENT (SOURCING)
UNIPOLAR OUTV MODE CS 5V/div 10.482 10.480 VOUTV (V) BIPOLAR OUTV MODE 10.478 10.476 10.474 10.472 VOUTV (V)
MAX5661 toc44
OUTV OUTPUT VOLTAGE vs. LOAD CURRENT (SINKING)
MAX5661 toc45
10.484
100 80 60 40 20 0 UNIPOLAR OUTV MODE -20
LL = 0mH LL = 100mH LL = 1H OUTI 200A/div
VDDI = VDDCORE = +40V VDDV = VSSV = 0V 2ms/div
0
1
2
3
4
5
6
7
8
9 10 11
-12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 SINK CURRENT (mA)
SOURCE CURRENT (mA)
OUTI OUTPUT CURRENT vs. OUTPUT VOLTAGE
MAX5661 toc46
OUTI OUTPUT CURRENT vs. OUTPUT VOLTAGE
MAX5661 toc47
UNIPOLAR VOLTAGE-OUTPUT, POSITIVE MAJOR CARRY TRANSITION GLITCH (CCOMP = 3.3nF)
MAX5661 toc48
25
25
20
20
CS 5V/div
IOUTI (mA)
10
IOUTI (mA)
15
15
10
OUTV 1mV/div
5 VDDCORE = VDDI = +24V 0 5 10 15 20 25
5 VDDCORE = VDDI = +40V 0 5 10 15 20 25 30 35 40 45 100s/div
0
0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
14
_______________________________________________________________________________________
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules
Typical Operating Characteristics (continued)
(Typical Operating Circuit, VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = +25C.)
UNIPOLAR VOLTAGE-OUTPUT, NEGATIVE MAJOR CARRY TRANSITION GLITCH (CCOMP = 3.3nF)
MAX5661 toc49
MAX5661
BIPOLAR VOLTAGE-OUTPUT, POSITIVE MAJOR CARRY TRANSITION GLITCH (CCOMP = 3.3nF)
MAX5661 toc50
BIPOLAR VOLTAGE-OUTPUT, NEGATIVE MAJOR CARRY TRANSITION GLITCH (CCOMP = 3.3nF)
MAX5661 toc51
CS 5V/div
CS 5V/div
CS 5V/div
OUTV 1mV/div
OUTV 1mV/div
OUTV 1mV/div
100s/div
100s/div
100s/div
UNIPOLAR VOLTAGE-OUTPUT, POSITIVE MAJOR CARRY TRANSITION GLITCH (CCOMP = 0nF)
MAX5661 toc52
UNIPOLAR VOLTAGE-OUTPUT, NEGATIVE MAJOR CARRY TRANSITION GLITCH (CCOMP = 0nF)
MAX5661 toc53
BIPOLAR VOLTAGE-OUTPUT, POSITIVE MAJOR CARRY TRANSITION GLITCH (CCOMP = 0nF)
MAX5661 toc54
CS 5V/div
CS 5V/div
CS 5V/div
OUTV 50mV/div
OUTV 50mV/div
OUTV 50mV/div
4s/div
4s/div
4s/div
BIPOLAR VOLTAGE-OUTPUT, NEGATIVE MAJOR CARRY TRANSITION GLITCH (CCOMP = 0nF)
MAX5661 toc55
0 TO 20mA CURRENT-OUTPUT, POSITIVE MAJOR CARRY TRANSITION GLITCH
MAX5661 toc56
0 TO 20mA CURRENT-OUTPUT, NEGATIVE MAJOR CARRY TRANSITION GLITCH
MAX5661 toc57
CS 5V/div
CS 5V/div
CS 5V/div
OUTV 50mV/div
OUTI 2A/div
OUTI 2A/div
4s/div
100s/div
100s/div
______________________________________________________________________________________
15
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Typical Operating Characteristics (continued)
(Typical Operating Circuit, VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = +25C.)
4-20mA CURRENT-OUTPUT, POSITIVE MAJOR CARRY TRANSITION GLITCH
MAX5661 toc58
4-20mA CURRENT-OUTPUT, NEGATIVE MAJOR CARRY TRANSITION GLITCH
MAX5661 toc59
VCC SUPPLY CURRENT vs. DIGITAL INPUT VOLTAGE
VCC = 5.25V CS 5V/div 1000 IVCC (A)
MAX5661 toc60
10,000
CS 5V/div
OUTI 2A/div
OUTI 2A/div
100
10 100s/div 100s/div 0 1 2 3 4 5 6 DIGITAL INPUT VOLTAGE (V)
UNIPOLAR VOLTAGE-OUTPUT DIGITAL FEEDTHROUGH
MAX5661 toc61
BIPOLAR VOLTAGE-OUTPUT DIGITAL FEEDTHROUGH
MAX5661 toc62
CS = VCC DIN = SCLK f = 1MHz DIN, SCLK 5V/div
CS = VCC DIN = SCLK f = 1MHz DIN, SCLK 5V/div
OUTV 1mV/div
OUTV 2mV/div
200ns/div
200ns/div
CURRENT-OUTPUT DIGITAL FEEDTHROUGH
MAX5661 toc63
FULL-SCALE CURRENT vs. FULL-SCALE OUTPUT CURRENT TRIM CODE
27 26 25 24 23 22 21 20 19 18 17 16 15 14 0 256 512 CODE 768
MAX5661 toc64
DIN, SCLK 5V/div
OUTI 2A/div
200ns/div
FULL-SCALE CURRENT (mA)
CS = VCC DIN = SCLK f = 1MHz
1024
16
_______________________________________________________________________________________
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules
Typical Operating Characteristics (continued)
(Typical Operating Circuit, VCC = +5V, CCOMPI = 22nF, VDDV = VDDCORE = +15V, VSSV = -15V, VDDI = +24V, VREF = +4.096V, VAGND = VDGND = 0V, RSERIES = 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, TA = +25C.)
POSITIVE FULL-SCALE VOLTAGE vs. FULL-SCALE OUTPUT TRIM CODE
MAX5661 toc65
MAX5661
NEGATIVE FULL-SCALE VOLTAGE vs. FULL-SCALE OUTPUT TRIM CODE
-7 FULL-SCALE VOLTAGE (V) -8 -9 -10 -11 -12 -13
MAX5661 toc66
14 13 FULL-SCALE VOLTAGE (V) 12 11 10 9 8 7 UNIPOLAR OR BIPOLAR MODE 6 0 256 512 CODE 768
-6
-14 1024 0 256 512 CODE 768 1024
Pin Description
PIN 1, 3, 5, 7, 8, 10, 15-20, 29-34, 36, 38, 42, 44, 46-52, 58, 61-64 2 4 NAME FUNCTION
N.C.
No Connection. Not internally connected.
OUTI VDDI
DAC Current-Source Output. OUTI sources either from 0 to 20mA or from 4-20mA. DAC Current-Output Positive Supply. Connect VDDI to a power supply between +13.48V and +40V to power the DAC current-output (OUTI) buffer. Bypass VDDI with a 0.1F capacitor to AGND, as close as possible to the device. OUTI Noise-Limiting Capacitor Connection. Connect a 22nF capacitor from COMPI to VDDI to reduce transient noise at OUTI. Current-Output Range Selection Input. Connect OUTI4/0 to AGND to select the 0 to 20mA OUTI current-output range. Connect OUTI4/0 to VDDI to select the 4-20mA OUTI current-output range. The OUTI current range can also be set by software. When using software to set the OUTI current range, connect OUTI4/0 to AGND. Buffered Voltage Reference Input. Connect an external +4.096V voltage reference to REF. Bypass REF with a 0.1F capacitor to DACGND, as close as possible to the device. Use a 1k resistor in series to the reference input for optimum performance. DAC Analog Ground. Connect DACGND, DACGNDS, DUTGND, and DUTGNDS together on a low-noise ground plane with a star connection. DAC Analog Sense Ground. Connect DACGND, DACGNDS, DUTGND, and DUTGNDS together on a low-noise ground plane with a star connection. Voltage/Current Configuration Input. CNF1 and CNF0 control the OUTV and OUTI outputs. See Tables 13 and 14. Voltage/Current Configuration Input. CNF0 and CNF1 control the OUTV and OUTI outputs. See Tables 13 and 14.
6
COMPI
9
OUTI4/0
11
REF
12 13 14 21
DACGND DACGNDS CNF1 CNF0
______________________________________________________________________________________
17
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Pin Description (continued)
PIN 22 23 24 25 26 27 NAME DIN SCLK CS DGND VCC LDAC Serial-Clock Input Active-Low Chip-Select Input. Drive CS low to enable the serial interface. Drive CS high to disable the serial interface. DOUT is high impedance when CS is high. Digital Ground Digital Power Supply. Connect VCC to a power supply between +4.75V and +5.25V. Bypass VCC with a 0.1F capacitor to DGND, as close as possible to the device. Active-Low Asynchronous Load DAC Input. Drive LDAC low to transfer the contents of the input register to the DAC register to immediately update the output. Connect LDAC to VCC if unused. Active-Low Open-Drain Fault Output. FAULT asserts low for an OUTI open-circuit condition, an OUTV short-circuit condition, or when the CLR input is low (see Table 12 and Figure 9). Ignore the FAULT pin function in single supply mode. Serial Data Output. Data transitions at DOUT on SCLK's falling edge. DOUT is high impedance when CS is high. Use DOUT to read the shift register contents or for daisy chaining multiple MAX5661 devices. Active-Low Clear Input. Drive CLR low to set the DAC code to the value stored in the clear register, to 0V in voltage mode, or 0mA/4mA depending on the output current mode. Program the contents of the clear register through the serial interface. Enable and disable the CLR input through the control register's CLREN bit (see Table 4). DAC Core Positive Supply. Connect VDDCORE to VDDI or VDDV (see Table 16). Bypass VDDCORE with a 0.1F capacitor to AGND, as close as possible to the device. DUT Analog Sense Ground. Connect DACGND, DACGNDS, DUTGND, and DUTGNDS together on a low-noise ground plane with a star connection. DUT Analog Ground. Connect DACGND, DACGNDS, DUTGND, and DUTGNDS together on a low-noise ground plane with a star connection. OUTV Amplifier Compensation Feedback Node. Connect a 3.3nF capacitor from OUTV to COMPV when OUTV drives capacitive loads of up to 1.2F. Leave COMPV open for faster response time. Analog Ground Remote Ground Sense Input. Connect SVP to the bottom terminal of ROUTV. See the Typical Operating Circuit. Internal Connection. Leave unconnected. DAC Voltage-Output Negative Power Supply. Always connect VSSV to a power supply between -13.48V and -15.75V. Bypass VSSV with a 0.1F capacitor to AGND, as close as possible to the device. DAC Unipolar/Bipolar Voltage Output. OUTV provides 0 to +10.48V in unipolar mode and -10.48V to +10.48V in bipolar mode. DAC Voltage-Output Positive Power Supply. Connect VDDV to a power supply between +13.48V and +15.75V. Bypass VDDV with a 0.1F capacitor to AGND, as close as possible to the device. Remote Voltage Sense Input. Connect to the top terminal of ROUTV. See the Typical Operating Circuit. FUNCTION Serial-Data Input. Data is clocked into the serial interface on the rising edge of SCLK.
28
FAULT
35
DOUT
37
CLR
39 40 41 43 45 53 54, 59 55 56 57 60
VDDCORE DUTGNDS DUTGND COMPV AGND SVP I.C. VSSV OUTV VDDV SVN
18
_______________________________________________________________________________________
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules
Detailed Description
The MAX5661 single 16-bit DAC with precision high-voltage amplifiers provides a complete solution for programmable current and voltage-output applications. The programmable output amplifiers swing to industry-standard voltage levels of 10V or current levels from 0mA (or from 4mA) to 20mA. The OUTV voltage output drives resistive loads greater than 2k and capacitive loads up to 1.2F. Force and sense connections on the voltage output compensate for series protection resistors and field wiring resistance. Short-circuit protection on the voltage output limits output current. The OUTI current output drives resistive loads from 0 and higher, up to a compliance voltage of (VDDI - 2.5V). The OUTI current output also drives inductive loads up to 1H. The MAX5661 provides a current output or a voltage output, with only one output active at any given time. The MAX5661 operates with 13.48V to 15.75V dual supplies (V DDV , V SSV ) for the voltage output and a +13.48V to +40V single supply (VDDI) for the current output (see Table 16). The +4.75V to +5.25V digital supply (VCC) powers the digital circuitry and VDDCORE powers the rest of the internal analog circuitry. A buffered reference input accepts a +4.096V reference voltage. The LDAC and CLR inputs asynchronously update the DAC outputs. CLR sets the DAC code to the value stored in the clear register (software clear), or to zero scale (hardware clear). The FAULT output asserts for an open-circuit current output, a short-circuit voltage output, or a clear state condition when CLR is low. The power-on reset circuitry guarantees the outputs remain off at power-up and all register bits are set to zero to ensure a glitchless power-up sequence. A 10MHz SPI-/QSPI-/MICROWIRE-compatible serial interface programs the DAC outputs and configures the device. The DOUT output allows shift-register reads or daisy chaining of several devices. The double-buffered interface includes an input register and a DAC register. Use software commands or the asynchronous LDAC input to transfer the input register contents to the DAC register and update the DAC outputs. microcontroller (C)) runs in master mode to generate the serial-clock signal. Set the SCLK frequency to 10MHz or less, and set the clock polarity (CPOL) and phase (CPHA) in the C control registers to the same value. The MAX5661 operates with SCLK idling high or low, and thus operates with CPOL = CPHA = 0 (see Figure 2) or CPOL = CPHA = 1 (see Figure 3). Force CS low to input data at DIN on the rising edge of SCLK. Output data at DOUT updates on the falling edge of SCLK (see Figure 1). A high-to-low transition on CS initiates the 24-bit data input cycle. Once CS is low, write an 8-bit command byte (MSB first) at DIN to send data to the appropriate internal register (see Tables 1, 2, and 3). C7 is the MSB of the command byte and C0 is the LSB. Following the command byte, write 2 data bytes containing bits D15-D0. D15 is the MSB of the 2 data bytes and D0 is the LSB (see Figure 4 and the Register Descriptions section). Data loads into the shift register 1 bit at a time. Write the data as one continuous 24-bit stream, always keeping CS low throughout the entire 24-bit word. The MAX5661 stores the 24 most recent bits received, including bits from previous transmission(s). Ensure SCLK has 24 rising and falling edges between CS falling low to CS returning high. Data loads into the shift register on the rising edge of SCLK. Once CS returns high, data transfers from the shift register into the appropriate internal register. When reading data, write an 8-bit command byte and 16 data bits at DIN. On the following 24-bit sequence, read out the shift register's contents (command byte and the 16 data bits) at DOUT (see Figure 5). Data transitions at DOUT on the falling edge of SCLK. While reading data at DOUT on the second 24-bit sequence, load another command byte and 2 data bytes at DIN or write a no-operation command. DOUT three-states when CS is high. The DAC outputs update on the rising edge of CS after writing to the DAC register or by pulling LDAC low. Daisy chain multiple devices by connecting the first DOUT to the second DIN, and so forth. Daisy chaining allows communication with multiple MAX5661 devices using single CS and SCLK signals. See the Daisy Chaining Multiple MAX5661 Devices section.
MAX5661
4-Wire SPI-Compatible Serial Interface
The MAX5661 communicates through a serial interface compatible with SPI, QSPI, and MICROWIRE devices. For SPI, ensure that the SPI bus master (typically a
______________________________________________________________________________________
19
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
CS
SCLK
DIN
C7
C6
C5
C4
D3
D2
D1
D0
DOUT
c7
c6
c5
c4
d3
d2
d1
d0
C7
BITS WITH CAPITAL LETTERS REPRESENT DATA BEING WRITTEN TO THE SHIFT REGISTER. BITS WITH LOWERCASE LETTERS REPRESENT DATA IN THE SHIFT REGISTER FROM THE PREVIOUS 24-BIT CYCLE.
Figure 2. MICROWIRE- or SPI-Interface Timing Diagram (CPOL = CPHA = 0)
CS
SCLK
DIN
C7
C6
C5
C4
D3
D2
D1
D0
DOUT
p
c7
c6
c5
c4
d3
d2
d1
d0
p IS DATA LEFT FROM THE PREVIOUS INSTRUCTION CYCLE. BITS WITH CAPITAL LETTERS REPRESENT DATA BEING WRITTEN TO THE SHIFT REGISTER. BITS WITH LOWERCASE LETTERS REPRESENT DATA IN THE SHIFT REGISTER FROM THE PREVIOUS 24-BIT CYCLE.
Figure 3. SPI-Interface Timing Diagram (CPOL = CPHA = 1)
20
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Table 1. Input Command Bits
24-BIT SERIAL INPUT WORD COMMAND BYTE MSB C7 C6 C5 C4 C3 C2 C1 C0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 DATA BITS LSB D0
Table 2. Register Description
COMMAND BITS C7 X X X X X X X X X X X C6 X X X X X X X X X X X C5 X X X X X X X X X X X C4 X X X X X X X X X X X C3 0 0 0 0 0 0 0 0 1 1 1 C2 0 0 0 0 1 1 1 1 0 0 1 C1 0 0 1 1 0 0 1 1 0 0 1 C0 0 1 0 1 0 1 0 1 0 1 1 OPERATION No operation. Transfer shift register's data to DOUT. Write control register. Read control register. Load input register. DAC register unchanged. Load DAC and input register. Load DAC register. Transfer input register data to DAC register. DAC outputs update on CS's rising edge. Write clear register. Read input register. Read DAC register. Read clear register. No operation. Transfer shift register's data to DOUT.
X = Don't care. All other commands are reserved for factory use. Do not use.
Register Descriptions The MAX5661 communicates between its internal registers and the external bus lines through the 4-wire SPI-/QSPI-/MICROWIRE-compatible serial interface. Table 1 details the command bits (C7-C0) and the data bits (D15-D0) of the serial input word. Tables 2 and 3 detail the command byte and the subsequent register accessed. Tables 4-8 detail the various read/write internal registers and their power-on reset states. When updating the DAC register, allow 5s before sending the next command. Control Register (Read/Write) Write to the control register to enable the current or voltage output, set the voltage output for unipolar or bipolar
mode, and set the current-output range. The control register also initializes the clear and fault modes. Set the command byte to 0x01 to write to the control register. Set the command byte to 0x02 to read from the control register. Write or read data bits D15-D5. D4-D0 are don't-care bits for a write operation. D4, D3, and D2 are read-only bits. D1 and D0 are don't-care bits for a read operation (see Table 4). Set the OUTVON bit (D15) to 1 to enable the OUTV DAC voltage output. Set the OUTION bit (D14) to 1 to enable the OUTI DAC current output. Always set bit D13 to 0. Set the B/U bit (D12) to determine whether the OUTV output operates in bipolar mode (B/U = 0) or unipolar mode (B/U = 1).
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Table 3. Register Bit Descriptions
OPERATION DESCRIPTION C7 Data in shift register before CS driven high and command executed Data in shift register after CS driven high and command executed Data in shift register before CS driven high and command executed Data in shift register after CS driven high and command executed Data in shift register before CS driven high and command executed Data in shift register after CS driven high and command executed Data in shift register before CS driven high and command executed Data in shift register after CS driven high and command executed Data in shift register before CS driven high and command executed Data in shift register after CS driven high and command executed Data in shift register before CS driven high and command executed Data in shift register after CS driven high and command executed Data in shift register before CS driven high and command executed Data in shift register after CS driven high and command executed Data in shift register before CS driven high and command executed Data in shift register after CS driven high and command executed Data in shift register before CS driven high and command executed Data in shift register after CS driven high and command executed Data in shift register before CS driven high and command executed Data in shift register after CS driven high and command executed Data in shift register before CS driven high and command executed Data in shift register after CS driven high and command executed Data in shift register before CS driven high and command executed Write full-scale output trim register Data in shift register after CS driven high and command executed X X X X X X X X X X 0 1 1 1 X X X X 0 1 1 0 X X X X 0 1 0 1 X X X X 0 1 0 0 X X X X X X 1 1 1 1 C6 C5 COMMAND BYTE C4 C3 C2 C1 C0 D15 D14 1ST DATA BYTE D13 D12 D11 D10 D9 D8 D7 D6 D5 2ND DATA BYTE D4 D3 D2 D1 D0
No operation. Transfer shiftregister data to DOUT.
X
X
X
X
0
0
0
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Same as line above. Shift-register data not changed by this operation.
No operation. Transfer shiftregister data to DOUT.
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Same as line above. Shift-register data not changed by this operation. CLRFLAGEN 14 to 20 BIT
CLRMODE
OUTVON
X
X
X
X
0
0
0
1
FAULTEN
OUTION
OUTI4/0 EN
CLREN
RCLR
B/U
0
X
X
X
X
X
Write control register
Same as line above. Shift-register data not changed by this operation.
X
X
X
X
0
0
1
0
X OUTVON
X
X
X
X
X
X
X CLRMODE
X
X FAULTEN
X CLRFLAGEN
X
X
X CLEARST
X
X
OUTI4/0 EN
OUTION
FAULTV
CLREN
Same as line above.
0
FAULTI
Read control register
14 to 20 BIT
RCLR
B/U
X
X
Load input register from shift register. DAC register unchanged.
X
X
0
0
1
1
MSB <-- 16-Bit DAC Data --> LSB
Same as line above. Shift-register data not changed by this operation.
Load input register and DAC register from shift register.
MSB <-- 16-Bit DAC Data --> LSB
Same as line above. Shift-register data not changed by this operation.
Load DAC register from input register
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Same as line above. Shift-register data not changed by this operation.
MSB <-- 16-Bit Clear-Register Data --> LSB
Write clear register
Same as line above. Shift-register data not changed by this operation.
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Read input register
Same as line above.
MSB <-- 16-Bit Input-Register Data --> LSB
X
X
1
0
0
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Read DAC register
Same as line above.
MSB <-- 16-Bit DAC-Register Data --> LSB
X
X
1
0
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Read clear register
Same as line above.
MSB <-- 16-Bit DAC Clear Register Data --> LSB
X
X
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
FS_ BIT 9 (MSB)
Same as line above.
X
X
X
X
X
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FS_ BIT 0 (LSB)
FS_ BIT 8
FS_ BIT 7
FS_ BIT 6
FS_ BIT 5
FS_ BIT 4
FS_ BIT 3
FS_ BIT 2
FS_ BIT 1
FS_ EN
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
DIN CLOCKED IN ON THE SCLK RISING EDGE WRITE COMMAND EXECUTED CS
SCLK
DIN
C7
C6
C5
C4
C0
D15
D14
D13
D0
Figure 4. Write Timing
READ COMMAND EXECUTED CS
SCLK
DIN DOUT CS
C7
C6
C5
C4
C0
D15
D14
D13
D0
DOUT READY
SCLK
DIN
X
X
X
X
X
X
X
X
X
DOUT
C7
C6
C5
C4
C0
D15
D14
D13
D0
DOUT TRANSITIONS ON THE FALLING SCLK EDGE X = DON'T CARE.
Figure 5. Read Timing
Set the OUTI4/0EN bit (D11) low to enable the OUTI4/0 hardware input. Set the I4TO20BIT bit (D10) high to select the current-output range through the software. Set the CLREN bit (D9) low to enable the CLR hardware input. Set the CLRMODE bit (D8) high to force the output to the value in the clear register or the zero state when the CLR hardware input is pulled low. Set the RCLR bit (D7) high to remain in the clear state. Set the FAULTEN bit (D6) high to enable the FAULT output
functionality. Set the CLRFLAGEN bit (D5) high to activate the FAULT output when the MAX5661 is in the clear state. Bits D4, D3, and D2 are read-only bits. The FAULTV bit (D4) is set to 1 when OUTV is short circuited. The FAULTI bit (D3) is set to 1 when OUTI is open circuited. The CLEARST bit (D2) is set to 1 when the MAX5661 is in the clear state.
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Table 4. Control Register (Read/Write)
BIT NAME OUTVON OUTION -- B/U DATA BIT D15 D14 D13 D12 RESET STATE 0 0 0 0 FUNCTION DAC OUTV output enable bit. Set to 1 to enable the OUTV output. DAC OUTI output enable bit. Set to 1 to enable the OUTI output. Reserved. Always set to 0. Voltage-output unipolar/bipolar mode select bit. Set to 0 (default power-up state) to select the bipolar output range (10.48V). Set to 1 to select the unipolar output range (0 to +10.48V). OUTI4/0 enable bit. Set to 0 (default power-up state) to enable the OUTI4/0 hardware input. Set to 1 to disable the OUTI4/0 hardware input, thereby controlling the current-output range through software commands. OUTI current range bit. Set to 0 to set the OUTI current range from 0 to 20mA. Set to 1 to set the OUTI current range from 4-20mA. Clear enable bit. Set to 0 to enable the external CLR input. Set to 1 to disable the external CLR input. Clear mode bit. Set to 1 and drive the external CLR input low to force the DAC output to the value stored in the clear register. Set to 0 and drive the external CLR input low to force the DAC output to 0V in voltage mode or 0mA/4mA depending on output-current mode. Remain in clear bit. Set to 1 to remain in the clear state. The RCLR bit determines the steps required to exit the clear state. See the CLR Input section. Fault output enable. Set to 1 to enable the FAULT output functionality. Set to 0 to disable the FAULT output functionality. In single supply mode, set to 0 to disable the FAULT pin function. Clear flag enable. Set to 1 to enable the FAULT output to report when the device is in the clear state. Output voltage fault bit (read only). The FAULTV bit is set to 1 when FAULT triggers due to an OUTV short-circuit condition. The FAULTV bit is a don't-care bit for control-register write commands. In single supply mode, FAULTV = 1 must be ignored. Output-current fault bit (read only). The FAULTI bit is set to 1 when FAULT triggers due to an OUTI open-circuit condition. The FAULTI bit is a don't-care bit for the control register write commands. In single supply mode, monitor the FAULTI bit for any FAULTI condition. Clear state bit (read only). The CLEARST bit is set to 1 when CLR is low and CLREN = 0. The CLRST bit is a don't-care bit for control register write commands. Not used.
OUTI4/0EN
D11
0
I4TO20BIT CLREN
D10 D9
0 0
CLRMODE
D8
0
RCLR FAULTEN CLRFLAGEN FAULTV
D7 D6 D5 D4
0 0 0 0
FAULTI
D3
0
CLEARST X
D2 D1, D0
0 0
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules
Input Register (Read/Write) Write to the input register to store the DAC code. Transfer the value written to the input register to the DAC register by pulling the LDAC input low or by writing to the load DAC register (0x05). Set the command byte to 0x03 to write to the input register. Set the command byte to 0x07 to read from the input register. Bits D15-D0 contain the straight binary data (see Table 5). DAC Register (Read/Write) Write to the DAC register to update the OUTV and OUTI outputs after CS returns high. Set the command byte to 0x04 to write to the DAC register. Set the command byte to 0x08 to read from the DAC register. Bits D15-D0 contain the straight binary data (see Table 6). Load DAC Register (Write) Write to the load DAC register to transfer the input register data to the DAC register and update the DAC output. Set the command byte to 0x05 to write to the load DAC register. Bits D15-D0 are don't-care bits.
MAX5661
Clear Register (Read/Write) Write to the clear register to set the DAC output value when the CLR hardware input is pulled low (forcing the MAX5661 into the clear state). Set the command byte to 0x06 to write to the clear register. Set the command byte to 0x09 to read the clear register. Bits D15-D0 contain the straight binary data (see Table 7). No Operation Set the command byte to 0x0F or 0x00 to perform a nooperation command. After writing the command byte and 2 data bytes (16 don't-care bits), read out the shift register's contents on the following 24-bit cycle.
Table 5. Input Register (Read/Write)
BIT NAME DATA BIT RESET STATE 0000 0000 0000 0000 (unipolar/current) 1000 0000 0000 0000 (bipolar) FUNCTION
IN15-IN0
D15-D0
IN15 is the MSB and IN0 is the LSB. Data format is straight binary.
Table 6. DAC Register (Read/Write)
BIT NAME DATA BIT RESET STATE 0000 0000 0000 0000 (unipolar/current) 0000 0000 0000 0000 (bipolar) FUNCTION DAC15 is the MSB and DAC0 is the LSB. Data format is straight binary.
DAC15-DAC0
D15-D0
Table 7. Clear Register (Read/Write)
BIT NAME DATA BIT RESET STATE 0000 0000 0000 0000 (unipolar/current) 1000 0000 0000 0000 (bipolar) FUNCTION CLR15 is the MSB and CLR0 is the LSB. Data format is straight binary.
CLR15-CLR0
D15-D0
Table 8. Full-Scale Output Trim Register (Write)
BIT NAME FS_EN + FS_BIT9- FS_BIT0 DATA BIT D9-D0 RESET STATE 0000 0000 0000 0000 FUNCTION FS_EN (D15) enables the full-scale output adjustment feature. D9 is the MSB and D0 is the LSB. D9 is straight binary, D8-D0 are inverted binary.
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Full-Scale Output Current Trim Register (Write)
Write to the full-scale output trim register to adjust the output voltage or current 25%. Set command bits to 0x06 to write to the output trim register. Bit 15 enables the output trim register. Bits D9-D0 program the 10-bit trim DAC (Table 8).
Table 9. N to D: Full-Scale Output Trim Register Bits Map
N9 D9 N8 D8 N7 D7 N6 D6 N5 D5 N4 D4 N3 D3 N2 D2 N1 D1 N0 D0
Table 10. Full-Scale Output Variation vs. N and B
DECIMAL VALUE (N) 0 256 511 512 767 1023 BIT DECIMAL VALUE (B) 511 255 0 1023 768 512
1100
BITS (B) TO NUMERICAL (N) TRANSFER FUNCTION
MAX5661 fig06
% CHANGE -25 00+ +12.5 +25
NUMBER (N)
1000 900 800 700 600 500 400 300 200 100 0
+25% % CHANGE FULL-SCALE OUTPUT
-12.5
+12.5%
0%
-12.5%
-25% 0 100 200 300 400 500 600 700 800 900 1000 1100 BITS (B)
Figure 6. Transfer Function of Bits (B) to Numerical (N) Representation
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
LDAC SOFTWARE LOAD DAC CONTROL REGISTER CS INPUT REGISTER FULL-SCALE ADJUST REGISTER SHIFT REGISTER FULL-SCALE OUTPUT ADJUST
SCLK
DAC REGISTER DAC 2-TO-1 MUX
OUTI TO OUTPUT CIRCUITRY OUTV
DIN DOUT CLEAR REGISTER
MAX5661
Figure 7. Functional Diagram
Reference Input
Connect an external voltage reference in the +4V to +4.2V range through a 1k series resistor to the buffered REF input. Use a high-accuracy, lownoise +4.096V voltage reference such as the MAX6126AASA41 (3ppm/C temperature drift and 0.02% initial accuracy) for best 16-bit static accuracy. REF does not accept AC signals. See Table 17 for a listing of +4.096V references.
tLDL LDAC
2 LSB
LDAC Input
The MAX5661 features an active-low load DAC (LDAC) logic input that allows asynchronous updates to the DAC outputs. Drive LDAC high to VCC during normal operation while controlling the MAX5661 using only the serial interface. Drive LDAC low to update the DAC output with the input register data. Hold LDAC low to make the input register transparent and immediately update the DAC output with the input register data. Figure 8 shows the LDAC timing with respect to OUT_.
OUT_
tDELAY
Figure 8. LDAC Timing
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27
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
CLR Input
The active-low external CLR input asynchronously sets the DAC code to the value in the clear register (software clear) or to the zero state (hardware clear), depending on the control register's CLRMODE bit setting (see Tables 4 and 11). Set the CLRMODE bit to 1 and drive external CLR low to force the output to the value stored in the clear register. Set the CLRMODE bit to 0 and drive the external CLR input low to force the output to the zero state. The zero state value is 0mA in 0 to 20mA current mode, 3.97mA in 4-20mA current mode, or 0V in voltage mode (unipolar or bipolar). Disable the external CLR input functionality by setting the control register's CLREN bit to 1. Set the CLREN bit to 0 to enable the external CLR input functionality. After setting the CLREN bit to 0, force the external CLR input low to set the MAX5661 into the clear state. The control register's read-only CLEARST bit is set to 1 while in the clear state. The RCLR (remain in clear) bit determines the steps required to exit the clear state. With the RCLR bit set to 1, exit the clear state in one of three ways: 1) Pull the external CLR input high and then write to the DAC register (0x04) or the load DAC register (0x05) or force LDAC low. 2) Pull the external CLR input high and set the RCLR bit low. 3) Initiate a power-on reset (POR) to reset the RCLR bit to 0. With the RCLR bit set to 0, exit the clear state one of three ways: 1) Set the CLREN bit high. 2) Pull the external CLR input high. 3) Initiate a power-on reset (POR).
FAULT Output
The open-drain active-low FAULT output asserts low for a current-output open circuit or dropout condition, for a voltage-output short circuit, or when the MAX5661 is in the clear state (see the CLR Input section). Enable and disable the FAULT output with the control register's FAULTEN and CLRFLAGEN bits (see Tables 4, 12, and Figure 9). Set the FAULTEN bit to 1 to enable the FAULT output to report fault conditions on OUTV and OUTI. Set FAULTEN to 0 to disable the FAULT output for fault conditions on OUTV and OUTI. Set the CLRFLAGEN bit to 1 to enable the FAULT output to report when the device is in the clear state. Set CLRFLAGEN to 0 to disable a hardware indication of the clear state. The FAULT output asserts low if CLRFLAGEN = 1 and CLEARST = 1. Read the control register to determine the source of a FAULT output condition. The FAULTV read-only bit is set to 1 when the voltage output (OUTV) is shortcircuited. The FAULTI bit is set to 1 when the current output (OUTI) is open circuited or in a dropout condition (VDDI - VOUTI at 1.3V typ). The FAULT output asserts low if FAULTEN is set to 1 and either the FAULTV bit or FAULTI bit is set to 1.
Table 11. Hardware-Clear and Software-Clear Truth Table
CLEARST BIT (READ) 0 (not in clear state) 1 (in clear state) 1 (in clear state) CLRMODE BIT (READ/WRITE) X 0 1 HARDWARE CLEAR X DAC code set to zero state* -- SOFTWARE CLEAR X -- DAC code set by clear register data
X = Don't care. *Zero state is 0V in unipolar voltage mode, -10.48V in bipolar voltage mode, and 0mA/4mA depending on output-current mode.
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
FAULTEN BIT X 0 1 FAULT_AT_ OUTPUT 0 X 1 INTERNAL FAULT SIGNAL 0 0 1 INTERNAL FAULT SIGNAL FAULTEN BIT FAULT OUTPUT FAULT_AT_OUTPUT (INTERNALLY GENERATED, CANNOT BE READ) INTERNAL FAULT SIGNAL 1 X FAULTV BIT X 1 0 FAULT_AT_ OUTPUT 1 1 0 CLEAR_FLAG (INTERNALLY GENERATED, CANNOT BE READ) 0 CLEAR_ FLAG X 1 0 FAULT OUTPUT 0 0 1
FAULTI BIT
FAULTV BIT FAULTI BIT 1 X 0
CLRFLAGEN
CLRFLAGEN BIT 0 X
CLEARST BIT X 0 1
CLEAR_ FLAG 0 0 1
CLEARST BIT
X = DON'T CARE.
1
Figure 9. FAULT Output Logic Diagram
Table 12. FAULT Output Truth Table
OUTV SHORT CIRCUITED No No X X No X Yes OUTI OPEN CIRCUITED OR IN DROPOUT No No X X Yes X No CLEARST BIT 0 X 1 0 X X X FAULTEN BIT X X X 0 1 0 1 CLRFLAGEN BIT X 0 1 X X 0 X FAULT OUTPUT High High Low High Low High Low
X = Don't care. Only one output (OUTV or OUTI) is active at a time.
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Output Configurations
The CNF0, CNF1, and OUTI4/0 hardware inputs determine whether the hardware or software controls the MAX5661 DAC outputs (see Table 13). The CNF0 and CNF1 inputs enable and disable the DAC outputs or allow software control of the outputs (see Table 14). The OUTI4/0 input sets the current range of the OUTI output. Hardware inputs take precedence over the software commands. The VCC digital supply powers the CNF1, CNF0, and OUTI4/0 inputs. If VCC = 0V, the DAC outputs enter the zero state and all register bits are set to 0. The zero state of the voltage output (OUTV) is 0V. The zero state of the current output (OUTI) is 0mA when OUTI4/0 = AGND or 4mA when OUTI4/0 = VDDI.
Table 13. Output Configuration
CONTROL SIGNAL CNF1 HARDWARE INPUT/SOFTWARE BIT Hardware input Enables/disables the DAC OUTV and OUTI outputs. CNF0 Hardware input DESCRIPTION DETAILS CNF1, CNF0: 00 = both outputs disabled 01 = OUTI active, set to 0 to 20mA range 10 = OUTV active, set to bipolar mode 11 = outputs controlled by serial interface
OUTI4/0
Hardware input
Set the OUTI4/0EN bit to 0 (default power-up state) to enable the OUTI4/0 hardware input. Connect the OUTI4/0 hardware input to AGND to set the OUTI current range to 0 to 20mA. Sets the OUTI current range. Connect the OUTI4/0 hardware input to VDDI to set the OUTI current range to 4-20mA. Set the OUTI4/0EN bit to 1 to disable the OUT14/0 hardware input. Connect OUTI4/0 to AGND when controlling the current output through software. Enables and disables the OUTI4/0 input. Set the OUTI4/0EN bit to 0 (default power-up state) to enable the OUTI4/0 hardware input. Set to 1 to disable the OUTI4/0 hardware input. When the CNF1 and CNF0 hardware inputs are high, the OUTION and OUTVON bits control the DAC output OUTI and OUTV settings. OUTVON, OUTION: 00 = both outputs powered down 01 = OUTI active 10 = OUTV active 11 = both outputs powered down Set B/U to 0 to set the OUTV output to bipolar mode (10.48V). Set B/U to 1 to set the OUTV output to unipolar mode (0 to +10.48V). Set I4TO20BIT to 0 to set the OUTI current range from 0 to 20mA. Set I4TO20BIT to 1 to set the OUTI current range from 4-20mA.
OUTI4/0EN
Software bit
OUTVON
Software bit Enables and disables the DAC OUTV and OUTI outputs.
OUTION
Software bit
B/U
Software bit
Sets the voltage output to unipolar mode or bipolar mode. Sets the OUTI current range through software.
I4TO20BIT
Software bit
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules
CNF0/CNF1 Hardware Inputs The CNF0 and CNF1 inputs enable the DAC's voltage (OUTV) or current (OUTI) outputs. Drive CNF0 and CNF1 low to disable both the OUTV and OUTI outputs. Drive CNF0 high and CNF1 low to enable the OUTI output. Drive CNF0 low and CNF1 high to enable the OUTV output. Drive CNF0 and CNF1 high to control the OUTV and OUTI outputs through the serial interface. Table 14 summarizes the output behavior when programmed by the CNF0/CNF1 hardware inputs. OUTI Current-Output Configuration Drive CNF0 high and CNF1 low to enable the OUTI output through the hardware. Alternatively, drive CNF0 and CNF1 high to control OUTI with the serial interface. With CNF1 and CNF0 high, the control register's OUTION bit enables the OUTI output. Set OUTION to 1 to enable the OUTI output. Set OUTION to 0 (default power-up state) to disable the OUTI output. The OUTI current output derives power from VDDI and V DDCORE (+13.48V to +40V). Connect V DDCORE to VDDI when using the OUTI output. The control register's OUTI4/0EN bit (see Tables 4 and 13) determines whether the OUTI4/0 hardware input or the control register's I4TO20BIT bit controls the OUTI current range. Set the OUTI4/0EN bit to 0 (default power-up state) to control the current range through the OUTI4/0 hardware input. Connect the OUTI4/0 hardware input to AGND to select the 0 to 20mA mode. Connect the OUTI4/0 hardware input to VDDI to select the 4-20mA mode. Set the OUTI4/0EN bit to 1 to allow software control of the OUTI current range through the I4TO20BIT bit (see Table 13). Set I4TO20BIT to 0 to select the 0 to 20mA mode. Set I4TO20BIT to 1 to select the 4-20mA mode. OUTV Voltage-Output Configuration Drive CNF0 low and CNF1 high to enable the OUTV output through the hardware (see Table 14). Alternatively, drive CNF0 and CNF1 high to control OUTV with the serial interface. With CNF1 and CNF0 high, the control register's OUTVON bit enables the OUTV output. Set OUTVON to 1 to enable the OUTV output. Set OUTVON to 0 (default power-up state) to disable the OUTV output. The OUTV output derives power from VDDV, VSSV, and V DDCORE . Connect V DDCORE to V DDV (+13.48V to +15.75V) when using the OUTV output. Always connect a negative supply to VSSV (-13.48V to -15.75V) (see Table 16). The control register's B/U bit sets OUTV for bipolar or unipolar mode. Set B/U to 0 (default power-up state) to select the bipolar output range (10.48V). Set B/U to 1 to select the unipolar output range (0 to +10.48V).
MAX5661
Output Transfer Functions
The DAC output voltage/current is a function of the various hardware control inputs and digital inputs in the control register (see Table 13). The transfer functions below assume that the outputs are on, and a reference voltage of +4.096V is applied to the reference input. For the voltage output, the sense input is at the same potential as the DAC output (OUTV = SVP and AGND = SVN). Table 15a details the bipolar output voltage transfer function. Table 15b details the unipolar output voltage transfer function. Table 15c details the 0 to 20mA current-range transfer function. Table 15d details the 4mA to 20mA current-range transfer function.
Table 14. CNF1/CNF0 Hardware Settings
CNF1 DGND DGND VCC VCC CNF0 DGND VCC DGND VCC Both DAC outputs disabled. OUTI enabled. OUTV disabled. OUTV enabled. OUTI disabled. DAC outputs controlled by the serial interface. OUTV, OUTI SETTING
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Table 15a. Bipolar Voltage Output
DAC CODE (DECIMAL VALUE) 65535 64769 64768 64767 48769 48768 48767 35969 35968 35967 32769 32768 32767 29569 29568 29567 16769 16768 16767 769 768 767 0 OUTPUT VOLTAGE (V) 10.47984 10.23485 10.23453 10.23421 5.117585 5.117266 5.116946 1.023773 1.023453 1.023133 0.00032 0 -0.00032 -1.02313 -1.02345 -1.02377 -5.11695 -5.11727 -5.11759 -10.2342 -10.2345 -10.2349 -10.4802 RANGE Overrange Overrange Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Underrange Underrange
Table 15b. Unipolar Voltage Output
DAC CODE (DECIMAL VALUE) 65535 64001 64000 32001 32000 31999 6401 6400 6399 1 0 OUTPUT VOLTAGE (V) 10.48 10.23469 10.23453 5.117425 5.117266 5.117106 1.023613 1.023453 1.023293 0.00016 0 RANGE Overrange Overrange Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Table 15c. 0 to 20mA Current Output
DAC CODE (DECIMAL) 65535 64001 64000 63999 32001 32000 31999 12801 12800 12799 97 96 95 80 60 40 30 0 ACTUAL OUTPUT CURRENT (mA) 20.449688 19.970313 19.970000 19.969688 9.970313 9.970000 9.969688 3.970313 3.970000 3.969688 0.000313 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 RANGE Overrange Overrange Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Underrange Underrange Underrange Underrange Underrange Underrange EXTENSION OF OUTPUT CURRENT LINEAR RANGE (mA) 20.449688 19.970313 19.970000 19.969688 9.970313 9.970000 9.969688 3.970313 3.970000 3.969688 0.000313 0.000000 -0.000313 -0.005000 -0.011250 -0.017500 -0.020625 -0.030000
Table 15d. 4-20mA Current Output
DAC CODE (DECIMAL) 65535 64000 63634 60000 50000 40000 30000 20000 16000 5000 500 238 200 100 80 60 30 0 OUTPUT CURRENT (mA) 20.449688 20.063690 19.971655 19.057835 16.543196 14.028556 11.513917 8.999278 7.993423 5.227320 4.095732 4.029848 4.020293 3.970000 3.970000 3.970000 3.970000 3.970000 RANGE Overrange Overrange Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Nominal range Underrange Underrange Underrange Underrange Underrange Underrange
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33
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Measuring Zero-Code Current (0 to 20mA Mode)
After setting the MAX5661 for 0 to 20mA current-range mode, determine the LSB size as follows: 1) Measure IOUT at full scale (FS). 2) Measure IOUT at code 192. 3) Measure IOUT at code 193: ILSB = IOUT at FS - IOUT at 192 16
(2 - 1) - 192
Daisy Chaining Multiple MAX5661 Devices
In standard SPI-/QSPI-/MICROWIRE-compatible systems, a microcontroller (C) communicates with its slave devices through a 3- or 4-wire serial interface. The typical interface includes a chip select signal (CS), a serial clock (SCLK), a data input signal (DIN), and sometimes a data signal output (DOUT). In this system, the C allots an independent chip-select signal to each slave device so that they can be addressed individually (see Figure 10). Only the slaves with their CS inputs asserted low acknowledge and respond to the activity on the serial clock and data lines. This is simple to implement when there are very few slave devices in the system. An alternative programming method is daisy chaining. Daisy chaining, in serial-interface applications, is a method of propagating commands through multiple devices connected in series (see Figure 11). Daisy chaining reduces CS and DIN line routing, and saves board space when using the MAX5661. Daisy chain multiple MAX5661 devices by connecting the DOUT of one device to the DIN of the next. Connect the SCLK of all devices to a common clock and connect the CS from all devices to a common chip-select line. Data shifts out of DOUT 24.5 clock cycles after it is shifted into DIN on the falling edge of SCLK. Hold CS low until each slave in the chain receives its 24-bit word (8 command bits and 16 data bits). In this configuration, the C only needs three signals (CS, SCLK, and DIN) to control all the slaves in the network. The SPI-/QSPI/MICROWIRE-compatible serial interface normally works at up to 10MHz, but must be slowed to 6MHz if daisy chaining. DOUT is high impedance when CS is high. Figure 10 details a method of controlling multiple MAX5661 devices using separate CS lines. This method allows writes to and reads from each device without shifting data through the other device's shift register. Figure 10 shows the FAULT outputs shorted together. This configuration requires a read from each device to determine which one has the fault condition and saves an optocoupler in isolated applications. It is not necessary to short the FAULT outputs together.
If IOUT (code 193) - IOUT (code 192) > 0.5 ILSB, IOUT (code 192) is inside the linear region of the IOUT transfer curve. Obtain the straight-line equation from IOUT (FS) and IOUT (192) and substituting code 0 for IOUT (zero scale) in the equation:
I at FS - IOUT at 192 (I - IOUT at 192) = OUT x (code - 192) 65535 - 192 2 IOUT at ZS = (IOUT at 192 - IOUT at FS) x 0.0029383 + IOUT at 192
The expected current is -30A (typ).
Applications Information
Power-Supply Sequencing and Bypassing
After connecting all ground inputs, apply the analog supply voltages VSSV first followed by the most positive supply, the second most positive supply, etc. Before applying power, connect the VDDCORE supply to either VDDV or VDDI, as shown in Table 16, depending on whether the current output or voltage output is used. Do not apply V DDCORE separate from the main supply (V DDV /V SSV or V DDI ) in the preferred configuration (Table 16). Ensure that there are no unconnected power-supply connections when powering the MAX5661. If VSSV cannot be powered first, connect a Schottky diode between VSSV and AGND.
Table 16. Application Modes and Supply-Voltage Limits
APPLICATION MODE Voltage from OUTV Current from OUTI (Single Supply) Voltage from OUTV and Current from OUTI* VDDV +13.48V to +15.75V AGND +13.48V to +15.75V VSSV -13.48V to -15.75V AGND -13.48V to -15.75V VDDI VDDV +13.48V to +40V VDDV to +40V VDDCORE VDDV VDDI VDDV
*On-the-fly switching. Only one output is active at a time. 34 _______________________________________________________________________________________
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules
Figure 11 shows a method of daisy chaining multiple MAX5661 devices using a single CS and SCLK line with the FAULT outputs shorted together. Connect DOUT from IC1 to DIN of IC2, and DOUT from IC2 to DIN of IC3. Hold CS low for three 24-bit write cycles to load data into all three devices. Due to the latency of reading and writing to the different devices, using separate lines for each FAULT output does not save time.
MAX5661
CS1 DIN SCLK LDAC CLR
CS DIN SCLK LDAC CLR
MAX5661 IC1
FAULT DOUT
CS2
CS DIN SCLK LDAC CLR
MAX5661 IC2
FAULT DOUT
DOUT FAULT
Figure 10. Address Two MAX5661 Devices Through Separate CS Lines
Driving Inductive Loads from IOUT When driving inductive loads > 275H with the current output (IOUT), connect a 1nF capacitor between VDDI and IOUT for optimal performance.
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35
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
MAX5661 IC1
CS DIN SCLK LDAC CLR
CS DIN SCLK LDAC CLR
FAULT DOUT
CS DIN SCLK LDAC CLR
MAX5661 IC2
FAULT DOUT
CS DIN SCLK LDAC CLR
MAX5661 IC3
FAULT DOUT
DOUT FAULT
Figure 11. Address Three MAX5661 Devices Through Separate CS Lines
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Table 17. +4.096V Reference Selector Guide
PART MAX6341 MAX6241 MAX6174 MAX6133_41 MAX6126_41 MAX6043_41 MAX6143_41 MAX6033_41 MAX6041 MAX6064 MAX6220 MAX6037_41 MAX6034_41 MAX6029 SUPPLY VOLTAGE RANGE (V) +8 to +36 +8 to +36 +4.3 to +40 +4.3 to +12.6 +4.3 to +12.6 +6 to +40 +6 to +40 +4.3 to +12.6 +4.3 to +12.6 +4.3 to +12.6 +8 to +40 +4.3 to +5.5 +4.3 to +5.5 +4.3 to +12.6 TEMPERATURE DRIFT (ppm/C max) 1 3 3 3 3 3 8 10 20 20 20 25 30 30 INITIAL ACCURACY (%) 0.02 0.02 0.06 0.04 0.02 0.05 0.1 0.04 0.2 0.2 0.1 0.2 0.2 0.15 FEATURES Ultra-low drift, 2.4VP-P output noise Low drift, 2.4VP-P output noise High-precision reference with temperature sensor Ultra-low drift, MAX(R) Ultra-low noise, MAX High voltage, low drift High precision 10mA output current, ultra-low drift, SOT23 Low power, low drift, low dropout 5mA current output, precision SOT23 -40C to +125C, 15mA output SOT23 with shutdown Low supply current in SC70 Ultra-low supply current, SOT23
Chip Information
PROCESS: BiCMOS
Pin Configuration
OUTV
TOP VIEW
VDDV N.C. N.C. N.C. N.C. N.C. SVN I.C.
VSSV
N.C.
N.C.
64
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
N.C. OUTI N.C. VDDI N.C. COMPI N.C. N.C. OUTI4/0
1 2 3 4 5 6 7 8 9
+
N.C.
N.C.
48 N.C. 47 N.C. 46 N.C. 45 AGND 44 N.C. 43 COMPV 42 N.C. 41 DUTGND 40 DUTGNDS 39 VDDCORE 38 N.C. 37 CLR 36 N.C. 35 DOUT 34 N.C. 33 N.C.
MAX5661
N.C. 10 REF 11 DACGND 12 DACGNDS 13 CNF1 14 N.C. 15 N.C. 16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
N.C.
N.C.
LDAC
VCC
SVP
I.C.
N.C.
N.C.
N.C.
N.C.
N.C.
CNF0
SCLK
DGND
LQFP
MAX is a registered trademark of Maxim Integrated Products, Inc.
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FAULT
N.C.
DIN
CS
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Typical Operating Circuit
VDDV OR VDDI +4.75V TO +5.25V +13.48V TO +40V +13.48V TO +15.75V -13.48V TO -15.75V
VCC DOUT DIN SCLK CS SERIAL INTERFACE*
VDDCORE
VDDV
VSSV
UNIPOLAR CURRENT BLOCK (SOURCE ONLY) VDDI
CLR MICROCONTROLLER LDAC OUTI4/0 CNF0 CNF1 FAULT AGND FULL-SCALE OUTPUT ADJUST +5V +4.096V REFERENCE 1k R REF REFERENCE BUFFER VOLTAGETO-CURRENT CONVERTER R IDAC OUTI COMPI 16-BIT DAC
22nF
DETAIL OF OPTIONAL SURGE PROTECTION VDDV
VDDI
VSSV
LOUTI*
R
UNIPOLAR OR BIPOLAR VOLTAGE BLOCK R R
SVN
OPTIONAL SURGE PROTECTION
2.5R COMPV
VDDV
CCOMPV 3.3nF** OUTV OPTIONAL SURGE PROTECTION
VSSV
MAX5661
SVP R R OPTIONAL SURGE PROTECTION
DAC DACGNDS DACGND DUTGND DUTGNDS DGND AGND * SEE THE DAC FUNCTIONAL DIAGRAM IN FIGURE 7. ** REQUIRED TO DRIVE COUTV < 1nF.
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Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE 64 LQFP PACKAGE CODE C64-8 DOCUMENT NO. 21-0083
MAX5661
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39
Single 16-Bit DAC with Current and Voltage Outputs for Industrial Analog Output Modules MAX5661
Revision History
REVISION NUMBER 0 1 REVISION DATE 8/08 5/09 Initial release Clarified how the part operates in single supply mode DESCRIPTION PAGES CHANGED -- 18, 24
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
40 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

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