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LCD Driver IC
PT6520
DESCRIPTION
PT6520 is a dot matrix LCD driver IC. The bit addressable display data which is sent from a microcomputer is stored in a build-in display data RAM and generates the LCD signal. The PT6520 incorporates innovative circuit design strategies to assure very low current dissipation and a wide range of operating voltages. The PT6520 permits the user to implement high-performance handy systems operating from a miniature battery.
FEATURES
* * * * * * * * * * * CMOS Technology 8-bit data interface 61 Segment output 16 Common output Duty cycle - PT6520 - 1/16 ~ 1/32 2560 bits built-in display data RAM Master/Slave operation Low power: 30W LCD voltage: 3.5 ~ 13V Power supply: 2.4 ~ 7V Available in 100 pins, QFP
APPLICATIONS
* Peripheral Devices * LCD Modules * Electronic Instruments
PT6520 V1.6
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LCD Driver IC
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SYSTEM BLOCK DIAGRAM
CO M 0~ CO M 15 20 C HAR x 4 LINE S CO M 16~ CO M 31
S EG 0~ S EG 6 0
S EG 0~ S EG 6 0
FR V DD M /S Da ta P T 6520 CK P T 6520 M /S G ND
Co ntro l CP U (6 8x x, 80 xx )
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BLOCK DIAGRAM
OSC2 FR
Display Start Line Register
Command Decoder
Display TIming Generator
Common Counter
Line Counter
V2, V1, V5 CM0 - CM15
Line Address Decoder
D0 - D7
Column Address Register
Column Address Decoder
A0
Display data Latch Circuit
Column Address Counter
MPU Interface
LCD Driver Circuit
SG 0 - SG60
E, R/W (RD)(WR) RES
Display Data Ram 2560 bits
Status
I/O Buffer Bus Holder Low Address Register Internal Bus VDD VSS
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PIN CONFIGURATION
COM4 COM3 COM2 COM1 COM0 V1 V4 M/S V2 V3 V5 FR RES VDD DB7 DB6 DB5
COM5 COM6 COM7 COM8 COM9 CO M10 CO M11 CO M12 CO M13 CO M14 CO M15 SEG 60 SEG 59 SEG 58 SEG 57 SEG 56 SEG 55 SEG 54 SEG 53 SEG 52 SEG 51 SEG 50 SEG 49 SEG 48 SEG 47 SEG 46 SEG 45 SEG 44 SEG 43 SEG 42
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
DB4 DB3 DB2
DB1 DB0 VSS R/W (WR) E(RD) OSC2 OSC1 AO SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21
P T 65 2 0
PT6520 V1.6
SEG 41 SEG 40 SEG 39 SEG 38 SEG 37 SEG 36 SEG 35 SEG 34 SEG 33 SEG 32 SEG 31 SEG 30 SEG 29 SEG 28 SEG 27 SEG 26 SEG 25 SEG 24 SEG 23 SEG 22
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
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INPUT/OUPUT CONFIGURATIONS
The schematic diagrams of the input and output circuits of the logic section are shown below:
INPUT PIN: A0, E, R/W, DB0~DB7, M/S
VDD
VSS
INPUT/OUTPUT PIN: FR
VDD
VSS
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LCD Driver IC
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OUTPUT PIN: COM0 TO COM5
VDD V1
V5
V4
OUTPUT PIN: SG0~SG60
VDD V2
V5
V3
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PIN DESCRIPTION
Pin Name DB0 ~ DB7 A0 Function Data input Selection display data or instructions. High: Display data. Low: Instruction. Reset the system and selects the interface type for a 68 port/80 port MPU. High: 68 port MPU interface. Low: 80 port MPU interface. (edge trigger) Oscillation input pin Read/Write Enable signal when a 68 port MPU is connected. (Active-Low read enable signal when an 80 port MPU is connected) Read/Write select signal when a 68 port MPU is connected. High: read select. Low: write select. (Active-Low write enable input when an 80 port MPU is connected. Rising edge sensing) Oscillation output pin LCD Frame (AC-conversion) signal input/output Segment output for driving the LCD Common output for driving the LCD Common output for driving the LCD Master/Slave select signal 5V power supply 0V power supply (GND level) Power supplies for driving the LCD, VDD>V1>V2>V3>V4>V5
RES OSC1 E/RD RW/WR OSC2 FR SEG0 ~ SEG60 COM0 ~ COM15 COM31 ~COM16 M/S VDD VSS V1, V2, V3, V4, V5
Note: 1. This is an example of PT6520 family pin assignment. The modified pin names are given below. Product Name PT6520 74 OSC1 75 OSC2 Pin/Pad Number 96 ~ 100, 1~ 11 93 COM0 ~ COM15 M/S 94 V4 95 V1
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LCD Driver IC
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FUNCTION DESCRIPTION
DISPLAY COMMANDS
(Based on the 80 port MPU; the RD and WR commands differ for the 68 port MPU)
Command 1 2 3 4 Display ON/OFF Display START Line Page Address Set Column (segment) Address Set RD WR A0 D7 D6 D5 D4 D3 D2 D1 D0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 0 0 1 0 Function Switches the entire display ON or 1 0 1 1 1 0/1 OFF, regardless of the Display RAM's data or the internal status. * Determines the line of RAM data to Display START be displayed at the display's top 0 address (0-31) line (COM0) Page Sets the page of the Display RAM 1110 (0-3) in the page address register. Sets the column address of the Column address Display RAM in the column (0-79) address register. Read the status. Busy 1: Busy (internal processing) 0: Ready status ADC 1: Rightward (forward) output 0000 0: Leftward (reverse) output ON/OFF 1: Display OFF 0: Display ON RESET 1: Resetting. 0: Normal Writes the These commands data on the access a Write Data data bus to previously-specified address of the Display RAM Reads data RAM, after which the column address is from the incremented by one. Display Read Data RAM onto the data bus. Used to reverse the correspondence between the Display RAM's column address and 1 0 0 0 0 0/1 segment driver output ports 0: Rightward (forward)output 1: Leftward (reverse) output Selects normal display operation or static all-lit drive display operation. 1 0 0 1 0 0/1 1: Static drive (power save)* 0: Normal display operation RESET
5
Status Read
0
1
0
6
Write Display Data
1
0
1
7
Read Display Data
0
1
1
8
ADC Select
1
0
0
1
0
9
Static Drive ON/OFF
1
0
0
1
0
PT6520 V1.6
ON/OFF
BUSY
ACC
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LCD Driver IC
Command 10 Duty Select Read Modify Write End Reset RD WR A0 D7 D6 D5 D4 D3 D2 D1 D0 1 0 0 1 0 1 0 1 0 0
PT6520
Function Selects the duty factor for driving 0/1 LCD cells. 1: 1/32 duty, 0: 1/16 duty Increments column address counter by 1 when display is 0 written. (This is not done when data is read) Cancels the Ready Modify Write 0 mode. Resets the display START line to the 1st line in the register. 0 Resets the column address counter to 0 and page address to 0.
11 12 13
1 1 1
0 0 0
0 0 0
1 1 1
1 1 1
1 1 1
0 0 0
0 1 0
0 1 0
0 1 1
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RECOMMENDED SOFTWARE FLOWCHART
START
DELAY TIME>1ms
S ET C OMMAND 1 ("Display Off " S tatus)
CLEAR DISPLAY RAM (S ee Note 2) INIT IA L SET TING S ET C OMMAND 1 ("Display On" S tatus)
MA IN PROGRA M
MAIN LOOP
END
Notes: 1. Command 1: Display On/Off Commands 2. When IC power is applied for the first time, the contents of the Display RAM are not defined; thus, it is strongly suggested that the contents of the Display RAM must be cleared during the initial setting.
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LCD Driver IC
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CURSOR BLINKING SEQUENCE
Page Address Set
Column Address Set
Read Modify Write
Dummy Read
Data Read
Data Write
NO
Modify Ended
End
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END TIMING
R e t ur n C o lu m n A dd r e s s N N+1 N+2 N+m N
R e a d Mo d if y W r it e M o d e S e t
En d
MPU INTERFACE
(1)80-FAMILY MPU
VDD VCC A0 A0 VCC
MPU D 0 -D 7 RD WR GND RES /Reset D 0 -D 7 RD WR RES
PT6520
VSS VS
(2)68-FAMILY MPU
VDD VCC A0 A0 VCC
MPU D 0 -D 7 E R/W GND RES /Reset D 0 -D 7 E R/W RES
PT6520
VSS VS
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TYPICAL CONNECTIONS WITH LCD PANEL (FULL DOT LCD PANEL: 1 CHARACTER = 6 X 8 DOTS)
(1) DUTY 1/16, 10 CHARACTER X 2 LINES
1 LC D 16 X 61 16 1 61
S EG
CO M
P T 652 0
(2) DUTY 1/32, 20 CHARACTERS X 4 LINES
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LCD Driver IC
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LCD DRIVER INTERCONNECTIONS
PT6520 - PT6520
To LCD SEG To LCD SEG
To LCD COM OSC1 VDD M/S
PT6520 Master OSC2 OSC1 FR
PT6520 Slave OSC2 FR M/S
To LCD COM
VSS Rf
PT6520 V1.6
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02 03
04 05
06 07
3A 3B
D0=O 00H 01
3C
ADC
49 48
15 14
4D 4C
Column Adress
SEG 1
D0=I 4FH 4E
SEG 2
SEG 3 SEG 4
SEG 5
4B 4A
SEG 6
SEG 7
SEG58 SEG59
SEG Pin SEG 0
SEG60
13
PT6520 V1.6
Line address
LCD Driver IC
(Display Start Lin: 08)
Associated Line (ex.)
Common output
Assignment
Page 0
Start
Page 1
Display Area
RELATIONSHIP BETWEEN DISPLAY DATA RAM LOCATIONS AND ADDRESSES
- 15 Page 2 Page 3
Page Address DATA D0 D1 D2 D3 D1 , D2=0 , 0 D4 D5 D6 D7 D0 D1 D2 D3 0,1 D4 D5 D6 D7 D0 D1 D2 D3 1,0 D4 D5 D6 D7 D0 D1 D2 D3 1,1 D4 D5 D6 D7 00H 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F
1/16
COM 0 COM 1 COM 2 COM 3 COM 4 COM 5 COM 6 COM 7 COM 8 COM 9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 COM17 COM18 COM19 COM20 COM21 COM22 COM23 COM24 COM25 COM26 COM27 COM28 COM29 COM30 COM31 (In this example, the display star tline is set at address 08)
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PT6520
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TIMING CHART
READ/WRITE TIMING FOR THE 80-PORT MPU
tAH8 A0 tAW 8 WR, R D tDS8 D0~D7 (W RITE) tACC 8 D0~D7 (REA D) tOH8 tDH 8 tCYC 8 tCC
READ/WRITE TIMING FOR THE 68-PORT MPU
tCYC 6
E
tAW 6 tEW
R/W
tAH6
A0
tDS6 tAD6
D0~D7 (W RITE)
tACC 6 tOH6
D0~D7 (REA D)
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LCD Driver IC (3) RESET TIMING FOR 80-PORT/68-PORT DISPLAY
RES ( 80 - P o rt )
PT6520
tR
SE G ( 68 - P o rt )
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ABSOLUTE MAXIMUM RATING
(Unless otherwise stated, Ta=25, VDD=0V) Parameter Symbol Supply voltage (1) VSS Supply voltage (2) V5 Supply voltage (3) V1, V2, V3, V4 Input voltage VI Output voltage VO Power dissipation PD Operating temperature Topr Storage temperature Tstg Soldering temperature Tsol Rating -8.0 to 0.3 -16.5 to 0.3 V5 to 0.3 VSS -0.3 to 0.3 VSS -0.3 to 0.3 250 -40 to 85 -65 to 150 260C for 10 s (at leads) Unit V V V V V mW -
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DC CHARACTERISTICS
(Unless otherwise stated, VDD=0V, VSS=-5/-3V, Ta=25)
Parameter Operating Recommended voltage (1) Potential (Note 1) Recommended Operating Potential voltage (2) Potential Potential High input voltage Symbol VSS V5 V1, V2 V3, V4 VIHT VIHC VIHT VIHC VILT VILC VILT VILC VOHT VOHC1 VOHC2 VOHT VOHC1 VOHC2 VOLT VOLT1 VOLT2 VOLT VOLC1 VOLC2 ILI ILO RON IDDQ Condition Min -5.5 -7.0 -13 -13 0.6xV5 V5 VSS+2.0 0.2xVSS 0.2xVSS 0.2xVSS VSS VSS VSS VSS VSS+2.4 VSS+2.4 0.2xVSS 0.2xVSS 0.2xVSS 0.2xVSS Typ -5.0 Max -4.5 -2.4 -3.5 VDD 0.4xV5 VDD VDD VDD VDD VSS+0.8 0.8xVSS 0.85xVSS 0.8xVSS Unit V V V V V V Applicable Pin VSS V5 V1, V2 V3, V4 (Notes 2, 3) (Notes 2, 3) V (Notes 2, 3) (Notes 2, 3) V OSC2 (Notes 4, 5) OSC2 (Notes 4, 5) OSC2 (Notes 4, 5) OSC2 (Notes 4, 5) (Note 6) (Note 7) SEG0~60 COM0~15 (Note 9) VDD VDD (Notes 10, 11)
Low input voltage
VSS=-5V VSS=-5V VSS=-3V VSS=-3V VSS=-5V VSS=-5V VSS=-3V VSS=-3V VSS=-5V IOH=-3.0mA IOH=-2.0mA IOH=-120A IOH=-2mA IOH=-2mA IOH=-50A IOL=3.0mA IOL=2.0mA IOL=120A IOL=2mA IOL=2mA IOL=50A
High output voltage
VSS=-3V
V VSS+0.4 VSS+0.4 0.8xVSS 0.8xVSS 0.8xVSS 0.8xVSS 1 3 7.5 K 50 1 5.0 15 4.5 12 500 A 150 300 8 pF A A A
VSS=-5V
V
Low output voltage
VSS=-3V
V A A
Input leak current Output leak current LCD driver ON resistance Static current consumption
-1 -3 Ta=25C V5=-5.0V VSS=-5V V5=-3.5V VSS=-5V -
5 10 0.05 2.0 9.5 1.5 6.0 300
Dynamic current dissipation
CS=CL=VDD During display fCL=2KHz V5=-5.0V Rf=1M During VSS=-5V IDD (1) During display fCL=2KHz V5=-5V Rf=1M VSS =-3V During access Tcyc=200kHz, VS5=-5V IDD (2) VSS=-3V, During access Tcyc=200KHz, VSS=-3V CIN Ta=25C, f=1MHz - 19 -
VDD (Note 8) All input terminals
Input terminal capacity PT6520 V1.6
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LCD Driver IC
Parameter Oscillation frequency Hysteresis Symbol Fosc VH Condition Rf=1M 5% Rf=1M 5% VSS=-5.0V VSS=-3.0V Min 12 11 Typ 17 16 Max 21 21 Unit KHz V
PT6520
Applicable Pin OSC2 (Notes 5, 6) (Notes 2, 3, 4, 5)
0.05VSS 0.1VSS
Notes: 1. A wide range of operating voltages is guaranteed, except in case of abrupt voltage fluctuations during MPU access. 2. A0, D0~D7, E, R/W pins 3. CL, FR, M/S and RES pins 4. D0~D7 5. FR 6. A0, E (or RD), R/W (or WR), M/S and RES. 7. When D0 to D7 and FR are high impedance. 8. During continual writer access at a frequency of tcyc. Current consumption during access is effectively proportional to the access frequency. 9. For a voltage differential of 0.1V between input (V1, ..., V4) and output (COM, SEG) pins. All voltages within specified operating voltage range. 10. PT6520 only. Does not include transient currents due to stray and panel capacitances.
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AC CHARACTERISTICS
READ/WRITE TIMING FOR THE 80-PORT MPU
(Ta=25, VDD=0V, VSS=-5V) Parameter Signal Address hold time A0, CS Address set-up time System cycle time WR, RD Control pulse width Data set-up time Data hold time RD access time Output disable time D0~D7 tCC tDS8 tDH8 tACC8 tOH8 tAWB tCYC8 Symbol tAHB Condition VSS=-5V VSS=-3V VSS=-5V VSS=-3V VSS=-5V VSS=-3V VSS=-5V VSS=-3V VSS=-5V VSS=-3V VSS=-5V VSS=-3V VSS=-5V VSS=-3V CL=100pF CL=100pF, VSS=-3V Min. 10 20 20 40 1000 2000 200 400 80 160 10 20 10 20 Typ. Max 90 180 60 120 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
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READ/WRITE TIMING FOR THE 68-PORT MPU
(Ta=25, VDD=0V, VSS=-5V) Parameter System cycle time Address set-up time Address hold time Control pulse width Data set-up time Data hold time D0~D7 A0, CS R/W Signal Symbol tCYC6 tAW6 tAH6 tDS6 tDH6 tOH6 Condition VSS=-5V VSS=-3V VSS=-5V VSS=-3V VSS=-5V VSS=-3V VSS=-5V VSS=-3V VSS=-5V VSS=-3V CL=100pF VSS=-5V CL=100pF VSS=-3V CL=100pF VSS=-5V CL=100pF VSS=-3V VSS=-5V VSS=-3V tew VSS=-5V VSS=-3V Min. Typ. Max Unit 1000 ns 2000 ns 20 ns 40 ns 10 ns 30 ns 80 ns 160 ns 10 ns 20 ns 10 20 100 200 80 160 60 120 90 180 ns ns ns ns ns ns ns ns
RD access time READ Enable disable time WRITE
tACC6
E
Note: 1. tCYC6 indicates the cycle during which CS/E are high; it does not indicate are cycle of the E signal.
CONTROL TIMING FOR 80-PORT/68-PORT MPU
(Ta=25, VDD=0V, VSS=-5V) Parameter Signal Reset time Reset time (68-Port) Reset time (80-Port) RES RES RES Symbol tR tR1 tR2 Condition VSS=-5V VSS=-3V VSS=-5V VSS=-3V VSS=-5V VSS=-3V Min. 1 1.5 1 1.5 1 1.5 Typ. Max 750 1000 Unit s s s s s s
Note: 1. The input timing of the FR delay time is determined by the PT6520 (Slave) 2. The output timing of the FR delay time is determined by the PT6520 (Master)
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PAD LAYOUT
(PT6520D*A)
100 95 90 85
1
80
5 75
10
Y
70
15
X
65
4.07mm
20 60
25 55
30
35
40
45
50
3.44mm
AI PAD
Chip Specification Chip size Chip thickness Pad size Dimension (mm) 3.44 x 4.07 0.400+0.025 0.095 x 0.095
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PAD COORDINATES OF PT6520D*A
(Coordinate unit: um)
Pin no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Name COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 SEG60 SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 X 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 275.4 425.4 575.4 725.4 Y 3535.2 3420.2 3305.2 3190.2 3075.2 2960.2 2845.2 2730.2 2615.2 2500.2 2385.2 2270.2 2155.2 2040.2 1925.2 1810.2 1695.2 1580.2 1465.2 1350.2 1235.2 1120.2 1005.2 890.2 775.2 660.2 545.2 430.2 315.2 200.2 76.4 76.4 76.4 76.4 Pin no. 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 Name SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 X 875.4 1025.4 1175.4 1325.4 1475.4 1625.4 1775.4 1925.4 2075.4 2225.4 2375.4 2525.4 2675.4 2825.4 2975.4 3125.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 Y 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 76.4 200.2 315.2 430.2 545.2 660.2 775.2 890.2 1005.2 1120.2 1235.2 1350.2 1465.2 1580.2 1695.2 1810.2 1925.2 2040.2 2155.2 Pin no. 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Name SEG3 SEG2 SEG1 SEG0 A0 OSC1 OSC2 E(RD#) R/W(WR#) Vss DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 Vdd RES# FR V5 V3 V2 M/S V4 V1 COM0 COM1 COM2 COM3 COM4 X 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3365.4 3013.8 2833.8 2653.8 2473.8 2293.8 2113.8 1933.8 1753.8 1573.8 1282.7 1167.7 1052.7 937.7 822.7 707.7 592.7 477.7 362.7 247.7 132.7 Y 2270.2 2385.2 2500.2 2615.2 2781.9 2896.9 3011.9 3126.9 3241.9 3356.9 3471.9 3586.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9 3996.9
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LCD Driver IC
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ORDER INFORMATION
Order Part Number PT6520 (L) PT6520-H Package Type 100 Pin, QFP Dice Top Code PT6520 -
Notes: 1. (L), (C) or (S) = Lead Free. 2. The Lead Free mark is put in front of the date code.
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- 25 -
February, 2006
Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw
LCD Driver IC
PT6520
PACKAGE INFORMATION
100 PINS, QFP
D D1 D2 -DA A2
A1
E1 E2
E
-A-
-B-
L1 e
1
b C SEATING PLANE
c
0.10
C
2 R1 -HR2 GAUGE PLANE
0.25mm
S 3
L
PT6520 V1.6
- 26 -
February, 2006
Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw
LCD Driver IC
Symbol C L L1 A A1 A2 b R1 R2 2 3 S D D1 D2 E E1 E2 e Min. 0.11 0.73 0.25 2.50 0.22 0.13 0.13 0 0 5 5 0.20 Nom. 0.88 1.60 2.70 23.20 BSC. 20.00 BSC. 18.85 REF. 17.20 BSC. 14.00 BSC 12.35 REF. 0.65 BSC. Max. 0.23 1.03 3.40 0.50 2.90 0.40 0.30 7 16 16 -
PT6520
Notes: 1. All dimensioning and tolerancing conform to ASME Y14.5M-1994 2. Dimensions "D1" and "E1" do not include mold protrusion, allowable protrusion is 0.25 mm per side, dimensions "D1" and "E1" do include mold mismatch and are determined at datum plane "H". 3. Dimensions "D1" and "E1" do not include mold protrusion, allowable protrusion is 0.25 mm per side, dimensions "D1" and "E1" do include mold mismatch and are determined at datum plane "H". 4. Details of Pin 1 identifier are optional but must be located within the zone indicated. 5. Regardless of the relative size of the upper and lower body sections, dimensions "D1" and "E1" are determined at the largest feature of the body exclusive of mold flash and gate burrs but including any mismatch between the upper and lower sections of the molded body. 6. All dimensions are in millimeters. 7. Dimension "b" do not include dambar protrusion. The dambar protrusion(s) shall not cause the lead width to exceed "B" maximum by more than 0.08 mm. Dambar cannot be located on the lower radius or the lead foot. 8. "A1" is defined as the distance from the seating plane to the lowest point of the package body. 9. Refer to JEDEC MS-022 Variation GC-1. JEDEC is the registered trademark of JEDEC SOLID STATE TECHNOLOGY ASSOCIATION.
PT6520 V1.6
- 27 -
February, 2006

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