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SPF7302 Full Bridge DC Motor Driver
Features and Benefits
Supply voltage, VBB , 36 V maximum Maximum DC current 3 A continuous, 6 A pulsed (1 kHz, duty cycle < 1%, pulse width < 10 s) RDS(on) = 300 m maximum, at TJ = 125C Operation modes: forward, reverse, brake (high- or lowside freewheeling current circulation) Output disable pin (DI pin) Protections: Overvoltage protection (OVP), 36 V minimum Overcurrent protection (OCP), 3 A typical Overcurrent limitation (OCL), 6 A typical Externally adjustable delay timer to halt OCL Thermal shutdown protection (TSD), 151C minimum Undervoltage lockout on VBB (UVLO), 4.2 V minimum Open load detection at startup Diagnosis output linked to OVP, OCP, TSD, UVLO, and open load detection, at startup and in operation Package: 16 pin HSOP with exposed thermal pad and tabs
Description
The SPF7302 is a fully protected, single chip full-bridge driver IC for DC brush motor applications. The various protection circuits integrated are: overvoltage protection (OVP); overcurrent protection (OCP) with latch, which is adapted to the DMOSFETs in each full bridge; undervoltage lockout (UVLO); open load detection; and overcurrent limitation. The package is a thermally enhanced 16-pin HSOP power package with an exposed thermal pad on the bottom side of the package.
Not to scale
Functional Block Diagram
CP VBB VREF Diag High-Side OCL High-Side Gate Driver with OVP HS1 IN1 IN2 DI LS1 Low-Side Gate Driver Diag Low-Side OCL Diag Low-Side Gate Driver Low-Side OCP PGND LS2 Diag Open Circuit Detection Diag High-Side OCP High-Side Gate Driver with OVP HS2 Diag Open Circuit Detection OUT1 OUT2 VBB VBB VBB VBB
PreRegulator Diag
OVP UVLO TSD IN1 IN2 DI
DIAG
Diagnostics
Diag
DLY
LGND
PGND
28211
SPF7302
Full Bridge DC Motor Driver
Selection Guide
Part Number
SPF7302
Package
Thermally enhanced surface mount (HSOP), 16-pin
Packing
Minimum quantity 1400 pieces
Absolute Maximum Ratings at TA = 25C
Characteristic
Supply Voltage IN1, IN2, DI, and DLY Pin Input Voltage Output Current DIAG Pin Output Voltage DIAG Pin Input Current
Symbol
VBB Vx IO IOpeak VDIAG IDIAG DIAG pin sink current
Notes
Rating
-0.3 to 36 -0.3 to 6 3
Unit
V V A A V mA
Continuous: 1 kHz, duty cycle <1%; pulse: < 10 s
6 -0.3 to 6 -2
CP Pin Voltage Power Dissipation Junction Temperature Operating Ambient Temperature Storage Temperature Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient
VCP PD1 PD2 TJ TA Tstg RJC RJA Mounted on glass epoxy PCB, 50 mm x 74 mm x 1.6 mm; 0.5 oz copper (18 m thick) exposed copper area With infinite heatsink Mounted on glass epoxy PCB, 50 mm x 74 mm x 1.6 mm; 0.5 oz copper (18 m thick) exposed copper area
-0.3 to 36 39 4 -40 to 150 -40 to 105 40 to 150 3.2 31
V W C C C C/W C/W
Terminal List Table
Number Name
LGND IN2 IN1 DI VBB VBB OUT2 PGND PGND OUT1 VBB VBB CP DLY DIAG LGND
Description
Logic GND Input pin 2 Input pin 1 Disable pin Supply input voltage Supply input voltage Output 2 Power GND Power GND Output 1 Supply input voltage Supply input voltage Charge pump capacitor pin Overcurrent limitation delay setting input pin Diagnostics output pin Logic GND
Pin-out Diagram
LGND 1 IN2 2 IN1 3 DI 4 VBB 5 VBB 6 OUT2 7 PGND 8 16 LGND 15 DIAG 14 DLY 13 CP 12 VBB 11 VBB 10 OUT1 9 PGND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
All performance characteristics given are typical values for circuit or system baseline design only and are at the nominal operating voltage and an ambient temperature, TA, of 25C, unless otherwise stated.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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SPF7302
Full Bridge DC Motor Driver
ELECTRICAL CHARACTERISTICS1 valid at TJ = -30C to 125C, VBB = 14 V, VDI = 5 V, CCP = 47 nF, RDIAG = 5.1 k, unless otherwise specified
Characteristic Supply Voltage OUTx Pin Leakage Current Symbol VBB IleakHS IleakLS RDS(ON_1H IOUT = 1 A DMOSFET On Resistance RDS(ON)_2H IOUT = 3 A RDS(ON)_1L IOUT = 1 A RDS(ON)_2L IOUT = 3 A VF_H1 DMOSFET Body Diode Forward Voltage VF_H2 VF_L1 VF_L2 Quiescent Current IBB IOCL_H1 Overcurrent Limit (OCL) IOCL_H2 IOCL_L1 IOCL_L2 IOCP_H1 Overcurrent Protection (OCP) IOCP_H2 IOCP_L1 IOCP_L2 IN1, IN2, DI, and DLY Pin Input Voltage Vx_H Vx_L Ix_H Ix_L VDIAG_H VDIAG_L IDIAG_H IDIAG_L tINx_ON tINx_OFF trx tfx VDLY = 5 V VDLY = 0 V VCC = 5 V Isink = 2 mA VCC = 5 V, DIAG pin source current VCC = 5 V, DIAG pin sink current, VDIAG = 2 V Delay from VINx = 2 VVOUTx x 0.2 Delay from VINx = 1.5 VVOUTx x 0.8 Delay from VOUTx = 20%80% points, at IOUTx = 1 A Delay from VOUTx = 20%80% points, at IOUTx = 1 A TJ = -40C to 150C, IOCL < IOCP ; guaranteed by design TJ = -40C to 150C, IOCL < IOCP ; guaranteed by design IOUT1 = 1 A IOUT2 = 1 A IOUT1 = -1 A IOUT2 = -1 A Test Conditions Min. 6 -1 - - - - - - - - - - 2.0 2.0 2.0 2.0 4.5 4.5 4.5 4.5 3.0 -0.3 - -1 4.0 - -250 - - - - - Typ. - - - - - - - 1.0 1.0 1.0 1.0 7 3.0 3.0 3.0 3.0 6.0 6.0 6.0 6.0 - - 100 - - - - - 7 7 0.5 0.5 Max. 18 - 1 300 300 300 300 2.0 2.0 2.0 2.0 - 4.5 4.5 4.5 4.5 8.0 8.0 8.0 8.0 5.3 1.5 200 1 - 0.4 - 3 15 15 2 2 Unit V mA mA m m m m V V V V mA A A A A A A A A V V A A V V A mA s s s s
IN1, IN2, DI, and DLY Pin Input Current DIAG Pin Output Voltage
DIAG Pin Output Current IN1 and IN2 Pin Input Propagation Time Output Rise Time Output Fall Time
Continued on the next page...
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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SPF7302
Full Bridge DC Motor Driver
ELECTRICAL CHARACTERISTICS1 (continued) valid at TJ = -30C to 125C, VBB = 14 V, VDI = 5 V, CCP = 47 nF, RDIAG = 5.1 k, unless otherwise specified
Characteristic DLY Pin Threshold Voltage DLY Pin Sourcing Current2 UVLO Releasing Voltage UVLO Activating Voltage UVLO Hysteresis OVP Protection Activating Voltage OVP Protection Releasing Voltage OVP Hysteresis Thermal Shutdown Activating Temperature3 Thermal Shutdown Releasing Temperature3 Thermal Shutdown Hysteresis3
1The
Symbol VDLY(th) IDLY VUVLO_OFF VUVLO_ON VUVLOhys VOVP_ON VOVP_OFF VOVPhys TTSD_ON TTSD_OFF TTSDhys
Test Conditions Overcurrent limitation (OCL) activating voltage
Min. 1.4 15 - 4.2 - 36 32 -
Typ. 1.6 30 - - 0.2 - - 5 165 150 15
Max. 1.8 60 5.2 - - 42 38 - - - -
Unit V A V V V V V V C C C
Starts at 165C typical; guaranteed by design Guaranteed by design Guaranteed by design
151 136 -
parameters at TJ = -40C to 150C are specified by design. The actual production tests are done at 25C and 125C. 2The individual overcurrent limitation of each DMOSFET is masked during the delay period. Therefore, ensure proper thermal design for dissipating transient temperature increase caused by current during this period. 3TSD (thermal shutdown protection starts at 165C typical, and it is specified by design.
Motor Control Truth Table1
Reference Number Status DI
H H H H L H H H H H H H H X X L H X
Input IN1
H L L H X H X L X H X L X X X X X X
IN2
L H L H X X H X L X H X L X X X X X
Output OUT1 OUT2 DIAG
H L L H Z H X L X Z Z Z Z Z X X X Z L H L H Z X H X L Z Z Z Z Z X X X Z H H H H H H H H H L L L L L L L L L
DMOSFET status HS1 LS1 HS2 LS2
ON OFF OFF ON OFF ON X OFF X OFF OFF OFF OFF OFF X OFF X OFF OFF ON ON OFF OFF OFF X ON X OFF OFF OFF OFF OFF X OFF X OFF OFF ON OFF ON OFF X ON X OFF OFF OFF OFF OFF OFF X OFF X OFF ON OFF ON OFF OFF X OFF X ON OFF OFF OFF OFF OFF X OFF X OFF
1 Forward rotation2 2 Reverse rotation2 3 Low-side freewheeling 4 High-side freewheeling 5 Output disabled 6 Overcurrent limitation (OCL) active (HS1) 7 Overcurrent limitation (OCL) active (HS2) 8 Overcurrent limitation (OCL) active (LS1) 9 Overcurrent limitation (OCL) active (LS2) 10 Overcurrent protection with latch (OCP) active (HS1) 11 Overcurrent protection with latch (OCP) active (HS2) 12 Overcurrent protection with latch (OCP) active (LS1) 13 Overcurrent protection with latch (OCP) active (LS2) 14 Undervoltage lockout (UVLO) protection active 15 Overvoltage protection (OVP) active 16 Open load detected at startup 17 Open load detected in operation 18 Thermal shutdown protection (TSD) active 1X is "don't care," Z is high impedance. 2"Forward" and "reverse" only indicate opposite relative direction.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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SPF7302
Full Bridge DC Motor Driver
Switching Operation Timing Charts
INx
VINx_H
VINx_L
VOUTxx0.8 OUTx VOUTxx0.2 tINx_ON tINx_OFF
Figure 1. Output Delay Time
OUTx
VOUTxx0.8 VOUTxx0.2 tfx trx
Figure 2. Output Switching Time
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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SPF7302
Full Bridge DC Motor Driver
Characteristic Performance
TA = 25C unless otherwise specified
1.0
1.0
0.8 VBB to OUTx (V)
0.8
150C
0.6
OUTx to PGND (V)
150C
0.6
High-side DMOSFET RDS(on)
0.4
25C
Low-side DMOSFET RDS(on)
0.4
25C
0.2
0.2
TA= -40C
0 0 1.0 1 2 3 1.0 0 0 1 2
TA= -40C
3
IOUT (A)
IOUT (A)
0.8 OUTx to PGND (V) VBB to OUTx (V)
0.8
High-side DMOSFET RDS(on)
0.6
5.5 V 6V
0.4
Low-side DMOSFET RDS(on)
0.6
5.5 V 6V
0.4
VCC= 14 V
0.2 0.2
VCC= 14 V
0
0
1
2
3
0
0
1
2
3
IOUT (A) 12
150C 25C
50
IOUT (A)
40
8
Quiescent Current versus Supply Voltage
IQ (mA)
4
CP Pin Voltage versus Supply Voltage
VCP (V)
TA= -40C
30
20
10
0
0
10
20 VBB (V)
30
40
0
0
10
20 VBB (V)
30
40
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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SPF7302
Full Bridge DC Motor Driver
16
16
12 VOUT1 (V) VOUT1 (V)
12
DI Pin Threshold Characteristics
8
INx Pin Threshold Characteristics
8
4
4
0
0
1
2
3
4
5
0
0
1
2
3
4
5
VDI (V)
200 200
VIN (V)
150C
IDI(SINK) (A) IIN(SINK) (A)
150C 25C
100
25C
100
DI Pin Current Characteristics
TA= -40C
INx Pin Current Characteristics
TA= -40C
0
0
2
4
6
8
10
0
0
2
4
6
8
10
VDI (V) 0.6 0.5 0.4 VDIAG (V)
150C 25C
VUVLO (V) 4 6
VIN (V)
DIAG Output versus DI SInk Current
0.3 0.2 0.1 0
UVLO Voltage versus Supply Voltage
TA= -40C
2
0
1
IDI(SINK) (mA)
2
3
0
0
2
4 VBB (V)
6
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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SPF7302
Full Bridge DC Motor Driver
6
6
DIAG Output Voltage with OVP Activated (IC continues operation)
4 VDIAG (V)
2
DIAG Output Voltage with TSD Activated (IC stops operation)
4 VDIAG (V) 2 0 100
0 25
30
35
40
45
120
140
160
180
VBB (V)
TJ (C)
VINX = 2 V/div VINX = 2 V/div
Input to Output On Propagation Delay, tINx_ON
VOUTX = 2 V/div 7.8 s t = 2 s/div
Input to Output Off Propagation Delay, tINx_OFF
VOUTX = 2 V/div 7.9 s t = 2 s/div
VINX = 2 V/div VOUTX = 2 V/div VINX = 2 V/div
Output Rise Time, tRX
Output Fall Time, tFX
160 ns
VOUTX = 2 V/div t = 50 ns/div 140 ns t = 100 ns/div
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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SPF7302
Full Bridge DC Motor Driver
VINX = 5 V/div
DLY Voltage versus INx Pin Voltage
1.6 V VDLY = 0.5 V/div
t = 10 s/div
4.0 A 3.4 A IOUTX = 1 A/div IOUTX = 1 A/div
High-side DMOSFET OCL Operation Example
VOUTX = 10 V/div t = 100 s/div
Low-side DMOSFET OCL Operation Example
VOUTX = 10 V/div t = 100 s/div
6.9 A IOUTX = 2 A/div IOUTX = 2 A/div
7.1 A
High-side DMOSFET OCP Operation Example
Low-side DMOSFET OCP Operation Example
VOUTX = 10 V/div t = 100 s/div
VOUTX = 10 V/div t = 100 s/div
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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SPF7302
Full Bridge DC Motor Driver
Protection Function Operation
Current Limitation and Overcurrent Protection The overcurrent limit is adapted to each DMOSFET, and is activated when the drain current reaches 3 A typical. After that, it is followed by a 3 s typical off-time, and then it restarts automatically. Overcurrent protection is activated when the drain current reaches 6 A typical within 3 s, as shown in figure 3. It shuts down the IC in a latch mode. Setting the DI pin to logic low level resets the internal logic circuit and releases the latch. DIAG Pin and Open Load Detection Behavior Open load detection does not operate until after the output voltage of OUT1 (VOUT1) reaches about VBB - 2 V. If an open load is detected, the DIAG signal goes high. The process of open load detection is shown in figure 4: A. During this period, UVLO is activated and DIAG stays low. B. If a filtering capacitor is used at the outputs, it causes a delay of open load detection. (Refer to figure 5 for the relationship of the delay versus the filtering capacitor value.) C. The open load detection period starts functioning. Raising DI input above VDI_H(threshold), that is, by activating the IC, clears the DIAG signal. Therefore, the open load condition must be checked before the time of that event.
VUVLO_OFF VBB VUVLO_ON VBB - 2 V VOUT1 VDI_H(threshold)
DI
DIAG
A
B
C
Figure 4. Open Load Detection
Open Load Detection Delay Time versus Output Filtering Capacitance VBB = 14 V 1000 Maximum Typical Minimum
100
6 A (typ.) Overcurrent
Delay (ms)
10
3A (typ.) Current Limit
1
3 s (typ.)
0.1
0.01 0.001
0.01
0.1
1
Capacitance of Filter Capacitor on VOUT1 (F)
Figure 3. Behavior of Current Limitation and Overcurrent Protection function
Figure 5. Delay to Open Load protection activation versus value of external capacitor on the output pins
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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SPF7302
Full Bridge DC Motor Driver
Open load detection during normal operation of the IC is done by checking the negative potential of the output. Referring to figure 6, during normal operation, recirculation current causes the output to be below GND. The IC checks the output voltage during 2.5 s typical, just after the falling edge of the corresponding IN signal, and if it does not detect the negative potential, DIAG is asserted after the 2.5 s detection period. During the 2.5 s period, the DIAG pin is set to high because the internal circuit is reset during that period (see the arrows marked A in figure 6). Open load detection operates differently during startup of the IC. The overcurrent limitation deactivated period occurs immediately after DI is asserted. Therefore, in order to repeat OCL deactivation, recycle DI. During this period, overcurrent protection (OCP) is still active. (With regard to OCL delay, see also note 2 to the Electrical Characteristics table.)
DI
VDI_H(threshold)
INx
OUTx Normal Operation DIAG DIAG (high)
OUTx At Open Load DIAG A A A 2.5 s
Figure 6. Open load detection in normal operation
DI
OCL deactivated VDLY(th)
DLY
INx
VINx(threshold)
IOUTX OCP activated 3 A (typ.) current limit
Figure 7. DLY pin effect at startup
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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SPF7302
Full Bridge DC Motor Driver
Application Information
VCC RDIAG DIAG VBB CIN DLY CP CCP CDLY
SPF7302
IN1 IN2 DI PGND OUT1 OUT2 LGND
M
Figure 8. Typical application circuit. Recommended components are: CCP CDLY RDIAG 48 nF 0.1 F 3.3 k
0.87
0.40
Pin 16
12.5
4.6
2.2 1.75
Pin 1
Figure 9. Recommended Solder Pad Layout, dimensions in mm
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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SPF7302
Full Bridge DC Motor Driver
Thermal Design
45 40 Power Dissipation, PD (W) 35
60 50 40 30 20 10 0 10 Exposed copper area thickness 18 m
25 20 15 Mounted on 1000 mm2 PCB 10 Exposed copper area thickness 18 m 5 0 -40 -20 0 20 40 60 80 100 120 140 160
R
JA
(C/W)
03
With infinite heatsink
100
1000 Copper Area (mm2)
10000
100000
Ambient Temperature, TA (C)
Figure 10. Power Dissipation Derating Curve
Figure 11. Thermal Resistance versus PCB Copper Area
125 100 TJ (C) 75 50 25 0 0
Figure 12. Test PCB Land Pattern
TJC TJA on PCB with exposed copper area = 1000 mm2
1
2 PD (W)
3
4
5
Figure 13. Thermal Performance
Approximate power dissipation, PD , in normal operation is calculated by equation 1, and the junction temperature, TJ, is estimated by equation 2 or 3. Figure 13 shows example data of TJ versus PD . Note: a final thermal evaluation should be done under actual application conditions, taking into account actual PCB and load conditions. PD VBB IBB1 (VsatH VsatL) IOM DON (VsatL(H) VF) IOM DOFF where: VBB is the supply voltage (battery voltage), IBB1 is the circuit current during operation, VsatH is the high-side saturation voltage, VsatL is the low-side saturation voltage,
VF is the freewheeling diode forward voltage, IOM is the motor current, DON is the IN1 and IN2 duty cycle (proportion on) , and DOFF is the IN1 and IN2 proportion off (DON + DOFF = 100%). To calculate TJ: TJ = RJA x PD + TA or TJ = TP + RJC (3.2C/W) x PD where: RJA can be obtained from figure 11, and TP is the temperature at the exposed thermal pad of the device. (3) (2)
(1)
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
13
SPF7302
Full Bridge DC Motor Driver
Package Outline Drawing, 16 Pin HSOP
12.2 0.2 10.5 0.2 16 0.25 +0.15 -0.05
XXXXXXXX
2 0.2
XXXXXXXX
7.50 0.2
10.5 0.3
Tab from exposed thermal pad
Branding Area
1 2 View A 1.35 0.2 2.5 0.2 0.4 +0.15 -0.05 1.270.25 0.1 0
Exposed thermal pad
(3.05) (4.7) A 1 0.3
( 0.8) (8.89)
8 0 Enlargement View A
Package: HSOP-16 Dimensions in millimeters
Branding codes (exact appearance at manufacturer discretion): 1st line, type: SPF7302 2nd line, lot: YMDD Where: Y is the last digit of the year of manufacture M is the month (1 to 9, O, N, D) DD is the date
Leadframe plating Pb-free. Device composition complies with the RoHS directive.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
14
SPF7302
Full Bridge DC Motor Driver
WARNING -- These devices are designed to be operated at lethal voltages and energy levels. Circuit designs that embody these components must conform with applicable safety requirements. Precautions must be taken to prevent accidental contact with power-line potentials. Do not connect grounded test equipment. The use of an isolation transformer is recommended during circuit development and breadboarding.
Because reliability can be affected adversely by improper storage environments and handling methods, please observe the following cautions. Cautions for Storage * Ensure that storage conditions comply with the standard temperature (5C to 35C) and the standard relative humidity (around 40 to 75%); avoid storage locations that experience extreme changes in temperature or humidity. * Avoid locations where dust or harmful gases are present and avoid direct sunlight. * Reinspect for rust on leads and solderability of products that have been stored for a long time. Cautions for Testing and Handling When tests are carried out during inspection testing and other standard test periods, protect the products from power surges from the testing device, shorts between adjacent products, and shorts to the heatsink. Soldering * When soldering the products, please be sure to minimize the working time, and any soldering iron should be kept at a distance from the body of the product. * The number of reflow procedures is restricted to two only. Device reliability and appearance are guaranteed within the temperature profile below, after storage conditions of up to 168 hours at TA = 85C and RH = 85%.
30s
245 230
Electrostatic Discharge * When handling the products, operator must be grounded. Grounded wrist straps worn should have at least 1 M of resistance to ground to prevent shock hazard. * Workbenches where the products are handled should be grounded and be provided with conductive table and floor mats. * When using measuring equipment such as a curve tracer, the equipment should be grounded. * When soldering the products, the head of soldering irons or the solder bath must be grounded in other to prevent leak voltages generated by them from being applied to the products. * The products should always be stored and transported in our shipping containers or conductive containers, or be wrapped in aluminum foil.
Temperature (C)
200
60s
150 90 to 120 s
4 C/s
Duration (s)
Solder Reflow Profile
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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SPF7302
Full Bridge DC Motor Driver
The products described herein are manufactured in Japan by Sanken Electric Co., Ltd. for sale by Allegro MicroSystems, Inc. Sanken and Allegro reserve the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Therefore, the user is cautioned to verify that the information in this publication is current before placing any order. When using the products described herein, the applicability and suitability of such products for the intended purpose shall be reviewed at the users responsibility. Although Sanken undertakes to enhance the quality and reliability of its products, the occurrence of failure and defect of semiconductor products at a certain rate is inevitable. Users of Sanken products are requested to take, at their own risk, preventative measures including safety design of the equipment or systems against any possible injury, death, fires or damages to society due to device failure or malfunction. Sanken products listed in this publication are designed and intended for use as components in general-purpose electronic equipment or apparatus (home appliances, office equipment, telecommunication equipment, measuring equipment, etc.). Their use in any application requiring radiation hardness assurance (e.g., aerospace equipment) is not supported. When considering the use of Sanken products in applications where higher reliability is required (transportation equipment and its control systems or equipment, fire- or burglar-alarm systems, various safety devices, etc.), contact a company sales representative to discuss and obtain written confirmation of your specifications. The use of Sanken products without the written consent of Sanken in applications where extremely high reliability is required (aerospace equipment, nuclear power-control stations, life-support systems, etc.) is strictly prohibited. The information included herein is believed to be accurate and reliable. Application and operation examples described in this publication are given for reference only and Sanken and Allegro assume no responsibility for any infringement of industrial property rights, intellectual property rights, or any other rights of Sanken or Allegro or any third party that may result from its use. Anti radioactive ray design is not considered for the products listed herein.
Copyright (c) 2006-2009 Allegro MicroSystems, Inc.
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