View L9380-TR_4768161.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

L9380
Triple high-side MOSFET driver
Features

Overvoltage charge pump shut off For VS > 25 V Reverse battery protection (referring to the application circuit diagram) Programmable overload protection function for channel 1 and 2 Open ground protection function for channel 1 and 2 Constant gate charge/discharge current
SO20
Description
The L9380 device is a controller for three external N-channel power MOS transistors in "High-Side Switch" configuration. Table 1. Device summary
Order code L9380 L9380-TR Package SO20 SO20 Packing Tube Tape and reel
It is intended for relays replacement in automotive electric control units.
March 2008
Rev 2
1/18
www.st.com 1
Contents
L9380
Contents
1 2 3 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 3.2 3.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1 Typical characteristics curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1.1 Electromagnetic emission classification (EME) . . . . . . . . . . . . . . . . . . . 15
5 6
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2/18
L9380
List of tables
List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pins function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electromagnetic emission classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3/18
List of figures
L9380
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pins connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Timing characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Drain, source input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Comparator hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Charge loading time as function of VS (Vcp = 8 V +VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Charge pump current as function of the charge voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Ground loss protection gate discarge current for source voltage . . . . . . . . . . . . . . . . . . . . 13 Input current as function of the input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Overvoltage shutdown of the charge pump with hysteresis . . . . . . . . . . . . . . . . . . . . . . . . 13 Measured circuit (The EMS of the device was verified in the below described setup) . . . . 14 Printed circuit board (PCB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SO20 mechanical data and package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4/18
L9380
Block diagram
1
Block diagram
Figure 1. Block diagram
VS
CHARGE PUMP OVERVOLTAGE VSI
CP GND
T1
VSI 1 +
IPR
D1
S1 CP 1
IN1 DRIVER 1 VSI T2
ENN
G1
VSI 1 +
IPR
D2
S2 CP 1
IN2 DRIVER 2 VSI
ENN
G2
CP ENN IN3 DRIVER 3 EN VS VSI 2V IPR
D98AT390
1
G3
ENN
REG.
PR
REFERENCE
5/18
Pins description
L9380
2
Figure 2.
Pins description
Pins connection (top view)
T1 VS N.C. T2 PR IN3 IN2 IN1 EN GND 1 2 3 4 5 6 7 8 9 10
D98AT391
20 19 18 17 16 15 14 13 12 11
CP D1 N.C. D2 G1 S1 S2 N.C. G2 G3
Table 2.
N 1 2 4 5 6 7 8 9 10 11 12 14 15 16 17 19
Pins function
Pin name T1 VS T2 PR IN3 IN2 IN1 EN GND G3 G2 S2 S1 G1 D2 D1 Function Timer capacitor; the capacitor defines the time for the channel 1 shut down, after overload of the external MOS transistor has been detected. Supply voltage. Timer capacitor; the capacitor defines the time for the channel 2 shut down, after overload of the external MOS transistor has been detected. Programming resistor for overload detetcion threshold; the resistor from this pin to ground defines the drain pin current and the charging of the timer capacitor. Input 3; equal to IN1. Input 2; equal to IN1. Input 1; logic signal applied to this pin controls the driver 1; this pin features a current source to assure defined high status when the pin is open. Enable logic signal high on this pin enables all channels Ground Gate 3 driver output; current source from CP or ground Gate 2 driver output; current source from CP or ground Source 2 sense input; monitors the source voltage. Source 1 sense input; monitors the source voltage. Gate 1 driver output; current source from CP or ground Drain 2 sense input; a programmable input bias current defines the drop across the external resistor RD1; this drop fixes the overload threshold of the external MOS. Drain 1 sense input; a programmable input bias current defines the drop across the external resistor RD1; this drop fixes the overload threshold of the external MOS. Charge pump capacitor; a alternating current source at this pin charges the connected capacitor CCP to a voltage 10V higher than VS; the charge stored in this capacitor is than used to charge all the three gates of the power MOS transistors. Not connected
20 3, 13, 18
CP NC
6/18
L9380
Electrical specifications
3
3.1
Electrical specifications
Absolute maximum ratings
Table 3.
Symbol VS VS
VS/dt
Absolute maximum ratings
Parameter DC supply voltage Supply voltage pulse (t 400 ms) Supply voltage slope Input / enable voltage Timer voltage Drain, gate, source voltage Drain, gate, source voltage pulse (t 400 ms) Drain, gate, source current (t 2 ms) Operating junction temperature Storage temperature Value -0.3 to +27 45 -10 to +10 -0.3 to +7 -0.3 to 27 -15 to +27 45 0 to +4 -40 to 150 -65 to 150 Unit V V V/s V V V V mA C C
VIN,EN VT VD, G, S VD, G, S ID, G, S Tj Tstg
Note:
ESD for all pins, except the timer pins, are according to MIL 883C, tested at 2 kV, corresponds to a maximum energy dissipation of 0.2 mJ. The timer pins are tested with 800 V.
3.2
Thermal data
Table 4.
Symbol Rth j-amb
Thermal data
Parameter Thermal resistance junction to ambient Value 100 Unit C/W
3.3
Table 5.
Symbol Supply IVS
Electrical characteristics
Electrical characteristics (7 V VS 18.5 V; -40 C TJ 150 C, unless otherwise specified.)
Parameter Test condition Min. Typ. Max. Unit
Static operating supply current
VS = 14 V
2.5
mA
Charge pump VCP ICP Charge pump voltage above VS Charge pump current VS = 7 V, VCP = 15 V, Tj 25 C VS = 7 V, VCP = 15 V, Tj < 25 C 8 -23 -23 17 -12 -10 V A A
7/18
Electrical specifications Table 5.
Symbol ICP tCP VSCP off
L9380
Electrical characteristics (continued) (7 V VS 18.5 V; -40 C TJ 150 C, unless otherwise specified.)
Parameter Charge pump current Charging time Overvoltage shut down
(1)
Test condition VS = 12 V, VCP = 20 V, Tj 25 C VS = 12 V, VCP = 20 V, Tj < 25 C VCP = VS + 8 V CCP = 100 pF
Min. -70 -70
Typ.
Max. -45 -38 200
Unit A A s V mV KHz
20 50 100 200 250
30 1000 400
VSCP hys Overvoltage shut down hysteresis fCP Charge pump frequency (1)
Gate drivers IGSo IGSi IGCP Gate source current Gate sink current Charge pump current on the gate VG = VS VG 0.8 V VS = 12 V, VG = 20 V, Tj 25 C VS = 12V, VG = 20 V, Tj < 25 C -5 1 -60 -60 -3 3 -1 5 -35 -28 mA mA A A
Drain - source sensing VPR ID Leak ID ISmax VHYST Timer VTHi VTLo IT Inputs VLOW VHIGH VINhys IIN IEN td Input enable low voltage Input enable high voltage Input enable hysteresis Input source current Enable sink current Transfer time IN/ENABLE
(1)
Bias current programming voltage 10 A IPR 100 A; VD 4 V Drain pin leakage current Drain pin bias current Source pin input current Comparator hysteresis VS = 0 V; VD =14 V VS VD + 1 V; VD 5 V VS VD + 1 V; VD 7 V
1.8 0 0.9 IPR 10
2
2.2 5 1.1 IPR 60
V A
A mV
20
Timer threshold high Timer threshold low Timer current IN = 5 V; VT = 2 V IN = 0 V; VS < VD; VD 5 V; VT = 2 V
4 0.3 0.4 IPR -0.6 IPR
4.4 0.4
4.8 0.5 0.6 IPR -0.4 IPR
V V
-0.3 3 50 VIN 3 V VEN 1 V VS = 14 V VG = VS; Open Gate -30 5 200
1 7 500 -5 30 2.5
V V mV A A s
1. Not measured guaranteed by design.
Function is given for supply voltage down to 5.5V. Function means: the channels are controlled from the inputs, some other parameters may exceed the limit. In this case the programming voltage and timer threshold will be lower. This leads to a lower protection threshold and time.
8/18
L9380
Functional description
4
Functional description
The triple high-side Power-MOS Driver features all necessary control and protection functions to switch on three Power-MOS transistors operating as High-Side switches in automotive electronic control units. The key application field is relays replacement in systems where high current loads, usually motors with nominal currents of about 40 A connected to ground, has to be switched. A high signal at the EN pin enables all three channels. With enable low gates are clamped to ground. In this condition the gate sink current is higher than the specified 3 mA. An enable low signal makes also a reset of the timer. A low signal at the inputs switch on the gates of the external MOS. A short circuit at the input leads to permanent activation of the concerned channel. In this case the device can be disabled with the enable pin. The charge pump loading is not influenced due to the enable input. An external N-channel MOS driver in high side configuration needs a gate driving voltage higher than VS. It is generated by means of a charge pump with integrated charge transfer capacitors and one external charge storage capacitor CCP. The charge pump is dimensioned to load a capacitor CCP of 33 nF in less than 20 ms up to 8V above VS. The value of CCP depends on the input capacitance of the external MOS and the decay of the charge pump voltage down to that value where no significant influence on the application occurs. The necessary charging time for CCP has to be respected in the sequence of the input control signals. As a consequence the lower gate to source voltage can cause a higher drop across the Power-MOS and get into overload condition. In this case the overload protection timer will start. After the protection time the concerned channel will be switched off. Channel 3 is not equipped with an overload protection. The same situation can occur due to a discharge of the storage capacitor caused by the gate short to ground. The gate driver that is supplied from the pin CP, which is the charge pump output, has a sink and source current capability of 3 mA. For a short-circuit of the load (source to ground) the L9380 has no gate to source limitation. The gate source protection must be done externally. Channel 1 and 2 provide drain to source voltage sensing possibility with programmable shut-off delay when the activation threshold was exceeded. This threshold VDSmin is set by the external resistor RD. The bias current flowing through this resistor is determined by the programming resistor RPR. This external resistor RPR defines also the charge and discharge current of the timer capacitor CCT. The drain to source threshold VDSmin and the timer shut off delay time Toff can be calculated: RD V DSmin = V PR ----------- R PR Toff = 4.4 CT RPR
9/18
Functional description
L9380
In application which don't use the overload protection or if one channel is not used, the Timer pin of this channel must be connected to ground and the drain pin with a resistor to Vbat. The timing characteristic illustrates the function and the meaning of VDSmin and Toff (see Figure 6). The input current of the overload sense comparator is specified as ISmax. The sum IPR + IDmax generates a drop across the external resistor RD if the drain pin voltage is higher than the source pin (see Figure 4). In the switching point the comparator input source pin currents are equal and the half of the specified current ISmax. For an offset compensation equal external resistors (RD = RS) at drain and source pin are imperative. The drain sense comparator, which detects the overload, has a symmetrical hysteresis of 20 mV (see Figure 5). Exceeding the source pin voltage by 10 mV with respect to the drain voltage forces the timer capacitor to discharge. Decreasing the source pin voltage 10 mV lower than the drain pin voltage an overload of the external MOS is detected and the timer capacitor will be loaded. After reaching a voltage at pin CT higher than the timer threshold VThi the influenced channel is switched off. In this case the overload is stored in the timer capacitor. The timer capacitor will be discharged with a 'High' signal at the input (see Figure 3). After reaching the lower timer threshold VTLo the overload protection is reset and the channel is able to switch on again. Figure 3. Timing characteristic
VIN
VG td VS td
VDSmin
VT
4.4V 0.4V
D98AT392
Toff
Figure 4.
Drain, source input current.
ID
IPR + IDmax
VS = VD
VD > VS
VS > VD
IPR 0
D98AT393
ISmax
IS
10/18
L9380 Figure 5. Comparator hysteresis
VT
Functional description
D98AT394
-10mV
VDr
+10mV
VSo
The application diagram is shown in Figure 6. Because of the transients present at the power lines during operation and possible disturbances in the system the external resistors are necessary. Positive ISO-Pulses at Drain, Gate Source are clamped with an active clamping structure. The clamping voltage is less than 60V. Negative Pulses are only clamped with the ESDStructure less than -15 V. This transients lower than -15 V can influence the other channels. In order to protect the transistor against overload and gate breakdown protection diodes between gate and source and gate and drain has to be connected. In case of overvoltage into VS (VS > 20 V) the charge pump oscillation is stopped. Then the charge pump capacitor will be loaded by a diode and a resistor in series up to VS (see Figure 1). In this case the channels are not influenced. In reverse battery condition the pins D1, D2, S1, S2 follow the battery potential down to -13 V (high impedance) and the gate driver pins G1, G2 is referred to S1, S2. In this way it is assured that M1 and M2 will not be driven into the linear conductive mode. This protection function is operating for VS1, VS2 down to -15 V. The gate driver output G3 is referred to the D1 in this case. This function guarantees that the source to source connected N-Channel MOS transistors M3 and M4 remains OFF. All the supplies and the in- and output of the PC Board are supplied with a 40 wires flat cable (not used wires are left open). This cable is submitted to the RF in the strip-line like described in DIN 40839-4 or ISO 11456-5. The measured circuit was build up on a PCB board with ground plane. In the frequency range from 1 MHz to 400 MHz and 80 % AM-modulation of 1 kHz with field strength of 200 V/m no influence to the basic function was detected on a typical device. The failure criteria is an envelope of the output signal with 20 % in the amplitude and 2 % in the time.
11/18
Functional description Figure 6. Application circuit
L9380
D1
VS
CHARGE PUMP OVERVOLTAGE VSI
CP C4
VBAT
D2
C1
GND D1
T1 C2 VSI 1
+
IPR G1 CP
R1 D3 M1 R2 D4 S1 R3
IN1 ENN DRIVER 1 VSI T2 C3 VSI 1
1
+
D2 IPR G2 CP R5 D6 S2 R6 M M1 R4 D5 M2
IN2
MICROCONTROLLER
ENN DRIVER 2 VSI
1
CP IN3 DRIVER 3 EN ENN VS VSI 2V IPR PR ENN 1 G3 R7
D7 M3
D8 REG. R8 M4 M M2
REFERENCE
L1 LOAD CONTROL
L2
L3
L4
VALUE DRIVER U405
D98AT395A
Recommendations to the application circuit: The timer and the charge capacitors are loaded with an alternating current source. A short ground connection of the charge capacitor is indispensable to avoid electromagnetic emigrations. The dimension of the resistors RD, RG and RS have to respect the maximum current during transients at each pin.
12/18
L9380
Functional description
4.1
Typical characteristics curve
Depending on production spread, certain deviations may occure. For limits see Table 5.
Figure 7.
tCH (ms)
Charge loading time as function of Figure 8. VS (Vcp = 8 V +VS)
D98AT396
Charge pump current as function of the charge voltage
D98AT397
ICP (A)
20
100
12V 10V 16V
10
68nF
50
33nF 10nF
7V
0 6 8 10 12 14 16 VS(V)
0 7 17 27 VC(V)
Figure 9.
Ground loss protection gate Figure 10. Input current as function of the discarge current for source voltage input voltage
D98AT398
IG (A) -200
IC (A)
D98AT399
-5
-400
-10
-600
-800
-15
-1000 -15 -10 -5 VS(V)
-20 0 1 2 3 4 VI(V)
Figure 11. Overvoltage shutdown of the charge pump with hysteresis
VCH (V)
D98AT400
30
20 24 24.5 25 25.5 VS(V)
13/18
Functional description
L9380
Figure 12. Measured circuit (The EMS of the device was verified in the below described setup)
3.125Hz 9 f 2 8 6.25Hz f 2 U(t) 7 12.5Hz f 2 25Hz 6 + CAR-BATTERY 3 4 5 10 1 2
ANECHOIC CHAMBER 2m
STRIPLINE
VBAT
1 BNC
VS
2 BNC SMB7W01-200
VS
CHARGE PUMP OVERVOLTAGE VSI
CP 33nF 2K 33V 5 B60N06 10K 3 1K
SMT_39A
100nF
33F
GND D1
T1 10nF VSI 1
+
IPR STD17N06 G1 CP 10K 18V S1 2K
IN1
6 2.2nF
1K
IN1 ENN DRIVER 1 VSI T2 10nF VSI 1
1
OUT1 2.2nF
5.6V
4.7nF
+
D2 IPR
2K 33V 5 B60N06 10K 2K 1K 4
STD17N06 G2 CP 10K
18V IN2 7 2.2nF 1K IN2 ENN 5.6V 4.7nF VSI DRIVER 2 1 S2
OUT2 2.2nF
CP IN3 8 2.2nF EN 9 2.2nF 10 PC-BOARD IN RF BOX 1K IN3 DRIVER 3 EN ENN 5.6V 4.7nF VS VSI 2V IPR ENN 1
STD17N06 G3 10K
33V B60N06 10K 18V 5 1K OUT3 2.2nF
5.6V 1K
4.7nF
REG.
20K PR
REFERENCE
D98AT401
14/18
L9380 Figure 13. Printed circuit board (PCB)
Functional description
4.1.1
Electromagnetic emission classification (EME)
Electromagnetic emission classes presented below are typical data found on bench test. For detailes test description please refer to "Electromagnetic Emission (EME) Measurement of Integrated Circuits, DC to 1 GHz" of VDE/ZVEI work group 767.13 and VDE/ZVEI work group 767.14 or IEC project number 47A 1967Ed. This data is targeted to board designers to allow an estimation of emission filtering effort required in application. All measurements are done with the EMS-board (See Figure 12 and 13). Table 6.
Pin VCP G
Electromagnetic emission classification
EME class w Remark
Note:
Electromagnetic Emission and Susceptivity is not tested in production.
15/18
Package information
L9380
5
Package information
In order to meet environmental requirements, ST (also) offers these devices in ECOPACK(R) packages. ECOPACK(R) packages are lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 14. SO20 mechanical data and package dimensions
mm DIM. MIN. A A1 B C D (1) E e H h L k ddd 10.0 0.25 0.40 2.35 0.10 0.33 0.23 12.60 7.40 1.27 10.65 0.75 1.27 0.394 0.010 0.016 TYP. MAX. 2.65 0.30 0.51 0.32 13.00 7.60 MIN. 0.093 0.004 0.013 0.009 0.496 0.291 0.050 0.419 0.030 0.050 TYP. MAX. 0.104 0.012 0.200 0.013 0.512 0.299 inch
OUTLINE AND MECHANICAL DATA
0 (min.), 8 (max.) 0.10 0.004
(1) "D" dimension does not include mold flash, protusions or gate burrs. Mold flash, protusions or gate burrs shall not exceed 0.15mm per side.
SO20
0016022 D
16/18
L9380
Revision history
6
Revision history
Table 7.
Date 20-May-2003 05-Mar-2008
Document revision history
Revision 1 2 Initial release. Document reformatted. Modified Figure 6: Application circuit. Changes
17/18
L9380
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
(c) 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
18/18

▲Up To Search▲

Price & Availability of L9380-TR

	To Download L9380-TR Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .