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| FAN7318A -- LCD Backlight Inverter Drive IC August 2009 FAN7318A LCD Backlight Inverter Drive IC Features High-Efficiency, Single-Stage Power Conversion Wide Input Voltage Range: 6V to 30V Backlight Lamp Ballast and Soft Dimming Minimal External Components Required Precision Voltage Reference Trimmed to 2% Half-Bridge Topology Soft-Start PWM Control at Fixed Frequency Analog Dimming Function Burst Dimming Function Programmable Striking Frequency Open-Lamp Protection (OLP) Open-Lamp Regulation (OLR) Over-Voltage Protection (OVP) Short-Lamp Protection (SLP) CMP-High Protection (CHP) Thermal Shutdown (TSD) 16-Pin SOIC Package Description The FAN7318A is a LCD backlight inverter drive IC that controls P-N half-bridge topology. The FAN7318A provides a low-cost solution and reduces external components by integrating proprietary wave rectifiers for open-lamp protection and regulation. The operating voltage range is wide, so an external regulator isn't necessary to supply voltage to the IC. The FAN7318A provides various protections, such as open-lamp regulation, over-voltage protection, openlamp protection, short-lamp protection, and CMP-HIGH protection, to increase the system reliability. The FAN7318A provides burst dimming and analog dimming. The FAN7318A is available in a 16-SOIC package. Applications LCD TV LCD Monitor Ordering Information Part Number FAN7318AM FAN7318AMX Operating Temperature -25 to +85C Package 16-Lead, Small Outline Integrated Circuit (SOIC) Eco Status RoHS Packing Method Rail Tape & Reel For Fairchild's definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. Protected under U.S. patent no. 5,652,479. (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com FAN7318A -- LCD Backlight Inverter Drive IC Block Diagram Short-Lamp Protection Min. 0.3V + Over-Voltage Protection Protection 50A @ OVP,SLP 2A @ OLP.CMP high 3V/1V @ striking/normal TIMER OLR1 Min. & Max. Detector /Full Wave Recifier Max. 1.34V + + 2V TSD 150oC OLR2 0A OUTA Output Driver 3A Error. Amp. source current change + 1.34V - OUTB Gm Amp. 2.2V + Open-Lamp Regulation max. 2V On @ striking min. 0.5V Oscillator Control Logic CT CMP + Error. Amp. source current change + GND ADIM Negative Analog Dimming Vref Error Amp. UVLO 5.5V + + 3.5V VIN 1.35V 52A burst sink current on OLP max. Striking off Voltage Reference & Internal Bias 5V, max. 3mA OLP1 OLP min. 0.7V/0.5V Striking/normal + 150s Delay 52A burst sink current on If ENA>2.5V, OLP & SLP disable. If ENA<2.1V, OLP & SLP enable. Figure 1. Internal Block Diagram (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 2 - OLP2 Min. & Max. Detector /Full or Half Wave Rectifier 17 Pulses Counter And OLR<1.4V OLP max. 2V min. 0.5V disable @ striking + High CMP Protection disable @ striking + - High_CMP Hys. 0.45V ENA 200k REF BCT BDIM www.fairchildsemi.com FAN7318A -- LCD Backlight Inverter Drive IC Pin Configuration 16 15 14 13 12 11 10 9 F PXYTT FAN7318A 1 2 3 4 5 6 7 8 Figure 2. Package Diagram (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 3 FAN7318A -- LCD Backlight Inverter Drive IC Pin Definitions Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Name TIMER CMP ADIM CT REF BCT BDIM ENA GND OUTB OUTA VIN OLR2 OLP2 Description This pin is for protection delay time setting. Error amplifier output. Typically, a compensation capacitor is connected to this pin from the ground. This pin is the input for negative analog dimming. This pin is for programming the switching frequency. Typically, a capacitor is connected to this pin from ground and a resistor is connected to this pin from the REF pin. This pin is 5V reference output. Typically, resistors are connected to this pin from the CT pin and the BCT pin. This pin is for programming the frequency of the burst dimming. Typically, a capacitor is connected to this pin from ground and a resistor is connected to this pin from the REF pin. This pin is the input for negative burst dimming. The voltage range of 0.5 to 2V at this pin controls burst mode duty cycle from 0% to 100%. This pin is for turning on/off the IC. This pin is the ground. This pin is NMOS gate-drive output. This pin is PMOS gate-drive output. This pin is the supply voltage of the IC. This pin is for open-lamp regulation. Its functions are the same as the OLR1 pin. This pin is for open-lamp protection and feedback control of lamp currents. Its functions are the same as the OLP1 pin. This pin is for open-lamp regulation and short-lamp protection. It is connected to the fullwave rectifier internally. When the maximum of rectified OLR inputs is between 1.34V and 2V, the error amplifier output current is limited to 3.0A. When the maximum of rectified OLR inputs reaches 2V, the error amplifier output current is 0A and its output voltage maintains constant. The maximum of rectified OLR inputs is inputted to the negative of another error amplifier for feedback control of lamp voltage. When the maximum of rectified OLR inputs is more than 2.2V, another error amplifier for OLR is operating and lamp voltage is regulated. In normal mode, if the maximum of rectified OLR inputs is higher than 1.34V or if the minimum of rectified OLR inputs is lower than 0.3V for a predetermined time by the TIMER pin capacitor and an internal current source 50A, the IC shuts down to protect the system in over-voltage condition or short-lamp condition, respectively. This pin is for open-lamp protection and feedback control of lamp currents. It is connected to the half-wave rectifier and the full-wave rectifier internally. In striking mode, if the minimum of rectified OLP inputs is less than 0.7V for a predetermined time by the TIMER pin capacitor and an internal current source or; in normal mode, if the minimum of rectified OLP inputs is less than 0.5V for another predetermined time by the TIMER pin capacitor and another internal current source; the IC shuts down to protect the system in open-lamp condition. The maximum of rectified OLP inputs is inputted to the negative of the error amplifier for feedback control of lamp current. 15 OLR1 16 OLP1 (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 4 FAN7318A -- LCD Backlight Inverter Drive IC Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VIN TA TJ TSTG JA PD IC Supply Voltage Parameter Operating Temperature Range Operating Junction Temperature Storage Temperature Range Thermal Resistance Junction-Air Power Dissipation (1,2) Min. 6 -25 -65 Max. 30 +85 +150 +150 90 1.4 Unit V C C C C/W W Notes: 1. Thermal resistance test board; size: 76.2mm x 114.3mm x 1.6mm (1S0P); JEDEC standard: JESD51-2, JESD51-3. 2. Assume no ambient airflow. Pin Breakdown Voltage Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Name TIMER CMP ADIM CT REF BCT BDIM ENA GND OUTB OUTA VIN OLR2 OLP2 OLR1 OLP1 Value 7 7 7 7 7 7 7 7 30 30 30 7 7 7 7 Unit V (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 5 FAN7318A -- LCD Backlight Inverter Drive IC Electrical Characteristics For typical values, TA=25C, VIN=15V, and -25C TA 85C, unless otherwise specified. Specifications to -25C ~ 85C are guaranteed by design based on final characterization results. Symbol Vth Vthhys Ist Iop Parameter Start Threshold Voltage Start Threshold Voltage Hysteresis Startup Current Operating Supply Current Test Conditions Increase VIN Decrease VIN VIN=4.5V VIN=15V, Not Switching Min. 4.9 0.20 10 0.5 Typ. 5.2 0.45 70 2.0 Max. 5.5 0.60 100 3.5 Unit V V A mA Under-Voltage Lockout Section (UVLO) ON/OFF Section Von Voff Isb RENA On-State Input Voltage Off-State Input Voltage Standby Current Pull-Down Resistor ENA=0V ENA=2V 50 120 120 200 1.4 5.0 0.7 190 280 V V A k Reference Section (Recommend 1F X7R Capacitor) V5 V5line V5load 5V Regulation Voltage 5V Line Regulation 5V Load Regulation 6 VIN 30V 10A I5 3mA 4.9 5.0 4 4 5.1 50 50 V mV mV Oscillator Section (Main) fosc Oscillation Frequency TA=25C, CT=220pF, RT=100k CT=220pF, RT=100k fstr Ictdcs Ictdc Ictcs Vcth Vctl Oscillator Frequency in Striking Mode TA=25C, CT=220pF, RT=100k CT=20pF, RT=100k CT Discharge Current CT Charge Current CT High Voltage CT Low Voltage Striking Normal Striking 101.3 101.0 126.5 126.0 1.03 770 -15 105.0 105.0 131.0 131.0 1.18 870 -12 2 0.45 108.3 109.0 135.5 136.0 1.33 970 -9 mA A A V V kHz kHz Oscillator Section (Burst) foscb Ibctdc Vbcth Vbctl Burst Oscillation Frequency BCT Discharge current BCT High Voltage BCT Low Voltage TA=25C, BCT=4.7nF, BRT=1.4M BCT=4.7nF, BRT=1.4M 321 317 20 330 330 26 2 0.5 342 Hz 343 32 A V V Continued on the following page... (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 6 FAN7318A -- LCD Backlight Inverter Drive IC Electrical Characteristics (Continued) For typical values, TA=25C, VIN=15V, and -25C TA 85C, unless otherwise specified. Specifications to -25C ~ 85C are guaranteed by design based on final characterization results. Symbol Analog Dimming Section Parameter Test Conditions ADIM=0V, TA=25C Min. 1.244 1.231 Typ. 1.329 1.329 1.178 1.008 Max. 1.421 1.427 Unit AVrexx Reference Voltage ADIM=0V ADIM=0.5V ADIM=1.0V V Error Amplifier Section lsin lsur1 lsur2 Ibsin Iolpi Iolpo Vlpfx Volpr Iolr1 Iolr2 Volr1 Volr2 Volr3 GmOLR Iors Iolri Iolro Volrr Output Sink Current Output Source Current 1 Output Source Current 2 Burst CMP Sink Current OLP Input Current OLP Output Current Rectifiers Output of OLP OLP Input Voltage Range (3) OLP=2.5V, ADIM=2.5V OLP=0V, ADIM=0V CMP=3V BDIM=5V, BCT=0V OLP=2V OLP=-2V OLP=0.3V OLP=1.5V 63 -65 -1.4 41 76 -50 -1.0 52 0 94 -35 -0.6 63 A A A A A -30 -20 0.34 1.55 -10 A V V -4 Striking, OLR=1.6V OLR Sweep OLR Sweep Striking, OLR Sweep 1.24 1.88 2.1 180 Normal, OLR=2.5V OLR=2.5V OLR=-2.5V -35 -4 40 -3.4 -2.8 0 1.34 1.98 2.2 310 60 0 -25 4 -2.3 1.44 2.08 2.3 440 80 -15 4 V A A V V V mho A A A V Open-Lamp Regulation Section Error Amplifier Source Current for Open-Lamp Regulation Open-Lamp Regulation Voltage 1 Open-Lamp Regulation Voltage 2 Open-Lamp Regulation Voltage 3 OLR Error Amplifier Transconductance OLR Error Amplifier Sink Current OLR Input Current OLR Output Current OLR Input Voltage Range (3) Note: 3. These parameters, although guaranteed, are not 100% tested in production. (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 7 FAN7318A -- LCD Backlight Inverter Drive IC Electrical Characteristics (Continued) For typical values, TA=25C, VIN=15V, and -25C TA 85C, unless otherwise specified. Specifications to -25C ~ 85C are guaranteed by design based on final characterization results. Symbol Protection Section Volp0 Volp1 Vcmpr Vslp Vtmr1 Vtmr2 Itmr1 Itmr2 TSD Vovp dcr Parameter Open-Lamp Protection Voltage 0 Open-Lamp Protection Voltage 1 CMP-High Protection Voltage Short-Lamp Protection Voltage Timer Threshold Voltage 1 Timer Threshold Voltage 2 Timer Current 1 Timer Current 2 Thermal Shutdown (4) (4) Test Conditions Striking Sweep OLP Sweep CMP Sweep TIMER Striking, Sweep TIMER Sweep TIMER OLP=0V OLR=1.8V Sweep OLR Min. 0.65 0.42 3.40 0.22 2.87 1.00 1.7 40 1.24 2.1 Typ. 0.70 0.49 3.50 0.30 3.02 1.10 2.1 50 150 1.34 2.3 Max. 0.75 0.56 3.60 0.38 3.17 1.20 2.5 60 1.44 2.5 Unit V V V V V V A A C V V Over-Voltage Protection Voltage ENA2.3V OLP Disable/Enable Change Voltage (4) Output Section Vpdhv Vpdlv Vndhv Vndlv Vpuv Vnuv Ipdsur Ipdsin Indsur Indsin PMOS Gate High Voltage PMOS Gate Low Voltage NMOS Gate High Voltage NMOS Gate Low Voltage (4) VIN=15V VIN=15V VIN=15V VIN=15V VIN=4.5V VIN=4.5V (4) VIN VIN-9.0 7.5 VIN-7.5 8.5 0 VIN-0.3 0.3 -300 400 300 -400 VIN-6.5 10.0 V V V V V V mA mA mA mA PMOS Gate Voltage with UVLO Activated NMOS Gate Voltage with UVLO Activated PMOS Gate Drive Source Current PMOS Gate Drive Sink Current (4) (4) VIN=15V VIN=15V VIN=15V VIN=15V NMOS Gate Drive Source Current NMOS Gate Drive Sink Current (4) (4) (4) Maximum / Minimum Duty Cycle DCMIN DCMAX Minimum Duty Cycle fosc=100kHz fosc=100kHz 45 0 49 % % Maximum Duty Cycle Note: 4. These parameters, although guaranteed, are not 100% tested in production. (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 8 FAN7318A -- LCD Backlight Inverter Drive IC Typical Performance Characteristics Figure 3. Start Threshold Voltage vs. Temperature Figure 4. Start Threshold Voltage Hysteresis vs. Temperature Figure 5. Startup Current vs. Temperature Figure 6. Operating Current vs. Temperature Figure 7. Standby Current vs. Temperature Figure 8. 5V Regulation Voltage vs. Temperature (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 9 FAN7318A -- LCD Backlight Inverter Drive IC Typical Performance Characteristics (Continued) Figure 9. Oscillation Frequency vs. Temperature Figure 10. Oscillation Frequency in Striking vs. Temperature Figure 11. CT High Voltage vs. Temperature Figure 12. CT Low Voltage vs. Temperature Figure 13. Burst Dimming Frequency vs. Temperature Figure 14. BCT Discharge Current vs. Temperature (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 10 FAN7318A -- LCD Backlight Inverter Drive IC Typical Performance Characteristics (Continued) Figure 15. BCT High Voltage vs. Temperature Figure 16. BCT Low Voltage vs. Temperature Figure 17. Analog Dimming Reference Voltage 00 vs. Temperature Figure 18. Analog Dimming Reference Voltage 05 vs. Temperature Figure 19. Error Amplifier Source Current 1 vs. Temperature Figure 20. Error Amplifier Source Current 2 vs. Temperature (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 11 FAN7318A -- LCD Backlight Inverter Drive IC Typical Performance Characteristics (Continued) Figure 21. Error Amplifier Source Current for OLR vs. Temperature Figure 22. Error Amplifier Sink Current vs. Temperature Figure 23. Burst CMP Sink Current vs. Temperature Figure 24. OLR Error Amplifier Sink Current vs. Temperature Figure 25. Open-Lamp Protection Voltage 1 vs. Temperature (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 Figure 26. High-CMP Protection Voltage vs. Temperature www.fairchildsemi.com 12 FAN7318A -- LCD Backlight Inverter Drive IC Typical Performance Characteristics (Continued) Figure 27. Short-Lamp Protection Voltage vs. Temperature Figure 28. Open-Lamp Regulation Voltage 1 vs. Temperature Figure 29. Open-Lamp Regulation Voltage 2 vs. Temperature Figure 30. Open-Lamp Regulation Voltage 3 vs. Temperature Figure 31. TIMER Threshold Voltage 1 vs. Temperature (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 Figure 32. TIMER Threshold Voltage 2 vs. Temperature www.fairchildsemi.com 13 FAN7318A -- LCD Backlight Inverter Drive IC Typical Performance Characteristics (Continued) Figure 33. TIMER Current 1 vs. Temperature Figure 34. TIMER Current 2 vs. Temperature (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 14 FAN7318A -- LCD Backlight Inverter Drive IC Functional Description UVLO The under-voltage lockout (UVLO) circuit guarantees the stable operation of the IC's control circuit by stopping and starting it as a function of the VIN value. The UVLO circuit turns on the control circuit when VIN exceeds 5.2V. When VIN is lower than 4.75V, the IC startup current is less than 100A. 1 [Hz] 13.65 + ( 3I1 - 4.55I2 ) RT -I I RT 2 RT CT ln 1 2 13.65 + ( 4.55I1 - 3I2 ) RT -I I RT 2 12 -6 -3 Q I1 = 12 x 10 A, I2 = 1.128 x 10 A fstr = (2) ENA Applying voltage higher than 1.4V to the ENA pin enables the IC. Applying voltage lower than 0.7V to the ENA pin disables the IC. In terms of the protections, applying voltage higher than 2.5V to the ENA pin disables OLP and SLP. Applying voltage lower than 2.1V to the ENA pin enables the OLP and the SLP. Burst Dimming Oscillator The burst dimming timing capacitor (BCT) is charged by the current flowing from the reference voltage source, which is formed by the burst dimming timing resistor (BRT) and the burst dimming timing capacitor (BCT). The sawtooth waveform charges up to 2V. Once the BCT voltage reaches 2V, the capacitor begins discharging down to 0.5V. Next, the BCT starts charging again and a new burst dimming cycle begins, as shown in Figure 36. The burst dimming frequency is programmed by adjusting the BCT and BRT values. The burst dimming frequency is calculated as: Main Oscillator In normal mode, the external timing capacitor (CT) is charged by the current flowing from the reference voltage source, which is formed by the timing resistor (RT) and the timing capacitor (CT). The sawtooth waveform charges up to 2V. Once CT voltage reaches 2V, the CT begins discharging down to 0.4V. Next, the CT starts charging again and a new switching cycle begins, as shown in Figure 35. The main frequency is programmed by adjusting the RT and CT value. The main frequency is calculated as: fOSCB = 1 [Hz] 0.039 BRT - 4500 (3) BRT BCT ln 0.026 BRT - 4500 To avoid visible flicker, the burst dimming frequency should be greater than 120Hz. fOSC = 1 [Hz] 3.9585 RT - 13650 RT CT ln 2.61 RT - 13650 (1) Figure 36. Burst Dimming Oscillator Circuit Analog Dimming For analog dimming, the lamp intensity is controlled with the external dimming signal (VADIM) and resistors. Figure 37 shows how to implement an analog dimming circuit. CMP Negative Analog Dimm ing VREF Error Amp. Figure 35. Main Oscillator Circuit In striking mode, the external timing capacitor (CT) is charged by the current flowing from the reference voltage source and 12A current source, which increases the frequency. If the product of RT and CT value is constant, the striking frequency is depending on CT and is calculated as: V ADIM ADIM + - OLP max . Figure 37. Analog Circuit Implementation (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 15 FAN7318A -- LCD Backlight Inverter Drive IC In full brightness, the maximum rms value of the lamp current is calculated as: max i rms = Vref _ max 2 2RS1 [ A] (4) The lamp intensity is inversely proportional to VADIM. As VADIM increases, the lamp intensity decreases and the rms value of the lamp current is calculated as: max i rms = Vref 2 2Rs [ A] (5) Vref = Vref _ max - 0.30VADIM [ A] Figure 38 shows the lamp current waveform vs. VADIM in an analog dimming mode. 2.0 1.5 1.0 0.5 0 0.5 0.5 15mA 10mA 5mA 0 -5mA -10mA -15mA 1.0 1.0 1.5 1.5 2.0 2.5 V REF Figure 39. Negative Burst Dimming Waveform Using DC Voltage Burst dimming can be implemented, not only DC voltage, but also using PWM pulse as the BDIM signal. Figure 40 shows how to implement burst dimming using PWM pulse as BDIM signal. ADIM 2.0 2.5 Lamp Current Figure 38. Analog Dimming Waveforms Figure 40. Negative Burst Dimming Implementation Circuit Using an External Pulse Burst Dimming Lamp intensity is controlled with the BDIM signal over a wide range. FAN7318A provide polarity selection. When BDIM is inputted, the DC voltage or PWM pulse signal and BCT is setting sawtooth waveform or DC voltage, respectively. This structure can be implemented as negative dimming polarity. When BDIM voltage is lower than BCT voltage, the lamp current is turned on; 0V on BDIM commands full brightness. The duty cycle of the PWM pulse determines the lamp brightness. The lamp intensity is inversely proportional to BDIM voltage. As BDIM voltage increases, the lamp intensity decreases. Figure 39 shows the lamp current waveform vs. DIM in negative burst dimming mode. Figure 41 shows the lamp current waveform vs. an external pulse in negative burst dimming mode. Figure 41. Negative Burst Dimming Waveform Using an External Pulse (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 16 FAN7318A -- LCD Backlight Inverter Drive IC During striking mode, burst dimming operation is disabled to guarantee continuous striking time. Figure 42 shows burst dimming disabled during striking mode. 2.5 2 1.5 1 0.5 0 2 3 4 5 6 7 8 9 10 11 x 10 2 1.5 1 0.5 0 12 -3 Soft-Start A soft-start circuit ensures a gradual increase in the input and output power. FAN7318A has no soft-start pin, but provides soft-start function using the first BCT waveform. The first BCT waveform limits CMP voltage at initial operation, so lamp current increases gradually. BCT BDIM CMP 2 3 4 5 6 7 8 9 10 11 x 10 12 -3 0.01 0.005 0 -0.005 -0.01 -0.015 2 Striking mode normal mode iLamp Figure 45. Soft-Start in Normal Mode 3 4 5 6 7 8 9 10 11 x 10 12 -3 Figure 42. Burst Dimming During Striking Mode When BDIM is setting over 2.2VDC and BCT is inputted PWM pulse signal, this structure can be implemented as positive dimming polarity. Figure 43 shows burst dimming using PWM pulse as BDIM signal. Figure 46. Soft-Start in Burst Dimming Mode Output Drives FAN7318A is designed to drive P-N half-bridge MOSFETs with symmetric duty cycle. FAN7318A can drive a P-MOSFET directly without a level-shift capacitor and a Zener diode. A fixed dead time of 500ns is introduced between two outputs at maximum duty cycle, as shown in Figure 47. Figure 43. Positive Burst Dimming Implementation Circuit Using an External Pulse Dead time 500ns at max. duty CT CMP Figure 44 shows the lamp current waveform vs. an external pulse in positive burst dimming mode. SYNC T OUTA OUTB Figure 47. MOSFETs Gate Drive Signal Figure 44. Positive Burst Dimming Waveform Using an External Pulse (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 17 FAN7318A -- LCD Backlight Inverter Drive IC Lamp Current Feedback Circuit FAN7318A has two OLP pins for lamp current feedback and protections. The inputs of two OLP pins are connected to the internal half-wave and full-wave rectifier circuits. The half-wave rectified signals of two OLP inputs are connected the maximum detector circuit. The full-wave rectified signals of two OLP inputs are connected to the minimum detector circuit. The two inputs of the OLP pins should be inverse phase. Lamp Voltage Feedback Circuit FAN7318A has two OLR pins for lamp voltage feedback and protections. The inputs of two OLR pins are connected to the internal full-wave rectifier circuit. The full-wave rectified signals of two OLR inputs are connected to the maximum detector circuit for lamp voltage feedback and protections. They are connected to the minimum detector circuit for protections. Open-Lamp Regulation When the maximum of the rectified OLR input voltages max ( VOLR ) is more than 2V, the IC enters regulation mode and controls CMP voltage. The IC limits the lamp max voltage by decreasing CMP source current. If VOLR is between 1.34V and 2V, CMP source current decreases max to 2.8A. Then, if VOLR reaches 2V, CMP source current decreases to 0A, so the CMP voltage remains constant and the lamp voltage also remains constant, as shown in Figure 49. Protections The FAN7318A provides the following latch-mode protections: Open-Lamp Regulation (OLR), Open-Lamp Protection (OLP), Short-Lamp Protection (SLP), CMPHigh Protection (CHP), and Thermal Shutdown (TSD). The latch is reset when VIN falls to the UVLO voltage or ENA is pulled down to GND. The protection delay time can be adjusted by a capacitor between the TIMER pin and GND. Figure 49. Open-Lamp Regulation in Striking Mode max Finally, if VOLR is more than 2.2V, the error amplifier for OLR is operating and CMP sink current increases, so CMP voltage decreases and the lamp voltage maintains the determined value, as shown in Figure 50. Figure 48. Protection Timing Delay Assume that the TIMER pin capacitor is 1F. The striking time is calculated as: tstrike = C Vstr 1 F * 3V = = 1.5s Isur 1 2 A C Vnor 1 F * 1 V = = 20ms Isur 2 50 A (6) Figure 50. 2.2V Open-Lamp Regulation The OVP and SLP delay time are calculated as: tOVP _ SLP = (7) Over-Voltage Protection V max In normal mode, while OLR is higher than 1.34V, the TIMER pin capacitor is charged by an internal current source of 50A. Once the TIMER reaches 1V, the IC enters shutdown, as shown in Figure 51. This protection is disabled in striking mode to ignite lamps reliably. The CMP-high protection and OLP delay time are calculated as: tOLP _ CMPH = C Vnor 1F * 1 V = = 500ms Isur 1 2 A (8) (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 18 FAN7318A -- LCD Backlight Inverter Drive IC The IC starts operating in striking mode and remains in min striking mode until 17 pulses of VOLP higher than 0.7V and OLR<1.34V occur. If more than 17 pulses and OLR<1.34V, the IC changes from striking mode into normal mode, as shown in Figure 54. Figure 51. Over-Voltage Protection in Normal Mode max In burst dimming mode, while VOLR is higher than 1.34V, burst dimming is disabled, so that the TIMER pin capacitor is charged continuously by an internal current source of 50A. Once the TIMER reaches 1V, the IC enters shutdown, as shown in Figure 52. Figure 54. Mode Change from Striking to Normal min After ignition, if VOLP is less than 0.5V for a time predetermined by the TIMER pin capacitor and an internal current source, 2A in normal mode; the IC is shut down, as shown in Figure 55 and Figure 56. Figure 52. Over-Voltage Protection in Burst Dimming Mode Open-Lamp Protection min If the minimum of the rectified OLP voltages ( VOLP ) is less than 0.7V during initial operation, the IC operates in striking mode for a time predetermined by the TIMER pin capacitor and an internal current source, 2A, as shown in Figure 53. OLP OLP1 OLP2 Min. & Max. Detector /Full or Half Wave Rectifier OLP min. 0.5V + 150s Delay Figure 55. Open-Lamp Protection in Normal Mode O LP 1 O LP 2 Ti er m Figure 53. Open-Lamp Protection in Striking Mode (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 19 FAN7318A -- LCD Backlight Inverter Drive IC Ti er m O LP 1 Lam p o p en O LP 1 O LP 2 O LP 2 Figure 58. Open-Lamp Protection Disable in DCR Mode Ti er m O LP1 O LP2 Short-Lamp Protection min If the minimum of the rectified OLR voltages ( VOLR ) is less than 0.3V for a time predetermined by the TIMER pin capacitor and an internal current source of 50A in normal mode; the IC is shut down, as shown in Figure 59. This protection is disabled in striking mode to ignite lamps reliably. Figure 56. Open-Lamp Protection in Normal Mode min In burst dimming mode, if VOLP is less than 0.5V for another time predetermined by the TIMER pin capacitor and an internal current source, 2A; the IC is shut down, as shown in Figure 57. The open-lamp protection delay in burst dimming mode is shorter than in full-brightness because short-lamp condition is detected at rising interval of lamp voltage in burst dimming, then another internal current source is turned on during the interval. TI ER M Figure 59. Short-Lamp Protection in Normal Mode O LP 1 Z o o m o f O LP 2 O LP 2 min In burst dimming mode, if VOLR is less than 0.3V for a time predetermined by the TIMER pin capacitor and a internal current source of 50A turned on only burst dimming on time; the IC is shut down, as shown in Figure 60. SLP protection delay changes, depending on burst dimming on duty ratio. Figure 57. Open-Lamp Protection in Burst Dimming Mode Applying voltage lower than 2.1V to the ENA pin enables OLP. Applying voltage higher than 2.5V to the ENA pin disables OLP and is called as DCR mode. Regardless of DCR mode, OLP is enabled in striking mode. Figure 60. Short-Lamp Protection in Burst Dimming Mode (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 20 FAN7318A -- LCD Backlight Inverter Drive IC Applying voltage higher than 2.5V to the ENA pin disables SLP. Applying voltage lower than 2.1V to the ENA pin enables SLP. Figure 63. CMP-High Protection Disable by a Pull- Down Resistor Figure 61. Short-Lamp Protection Disable in DCR Mode CMP-High Protection If CMP is more than 3.5V for a time predetermined by the TIMER pin capacitor and a internal current source of 50A in normal mode; the IC is shut down, as shown in Figure 62. Thermal Shutdown The IC provides the function to detect the abnormal over-temperature. If the IC temperature exceeds approximately 150C, the thermal shutdown triggers. Figure 62. CMP-High Protection This protection is disabled by a pull-down resistor (a few M) between CMP and GND. If CMP voltage reaches 2.5V, CMP source current decreases to 2A. Determine a pull-down resistor value such that the whole of this current can flow through the resistor. If so, CMP-high protection can be disabled, as shown Figure 63. This protection is disabled in striking mode to ignite the lamps reliably. (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 21 FAN7318A -- LCD Backlight Inverter Drive IC Typical Application Circuit (LCD Backlight Inverter) Application 22-Inch LCD Monitor Device FAN7318A Input Voltage Range 15V10% Number of Lamps 2 1. Features High-Efficiency, Single-Stage Power Conversion P-N Half-Bridge Topology Reduces Required External Components Enhanced System Reliability through Protection Functions 16 15 14 13 12 11 10 BDIM 7 OUTB OLP1 OLR1 OLP2 OLR2 VIN IC1 TIMER ADIM CMP OUTA 1 2 3 4 5 6 Figure 64. Typical Application Circuit (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 8 ENA REF BCT CT GND 9 BDIM www.fairchildsemi.com 22 FAN7318A -- LCD Backlight Inverter Drive IC Physical Dimensions 10.00 9.80 8.89 16 9 A B 1.75 6.00 4.00 3.80 5.6 PIN ONE INDICATOR 1 8 1.27 (0.30) 0.51 0.35 0.25 M 1.27 CBA 0.65 LAND PATTERN RECOMMENDATION 1.75 MAX 1.50 1.25 0.25 0.10 C 0.10 C SEE DETAIL A 0.25 0.19 0.50 0.25 X 45 (R0.10) (R0.10) 8 0 0.36 GAGE PLANE NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AC, ISSUE C. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR PROTRUSIONS D) CONFORMS TO ASME Y14.5M-1994 E) LANDPATTERN STANDARD: SOIC127P600X175-16AM F) DRAWING FILE NAME: M16AREV12. 0.90 0.50 (1.04) SEATING PLANE DETAIL A SCALE: 2:1 Figure 65. -Lead, Small Outline Integrated Circuit (SOIC) Package Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 23 FAN7318A -- LCD Backlight Inverter Drive IC (c) 2009 Fairchild Semiconductor Corporation FAN7318A * 1.0.0 www.fairchildsemi.com 24 |
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