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MP3/USB 2.0 High Speed Switch with Negative Signal Handling/Click and Pop Suppression ISL54210 The Intersil ISL54210 dual SPDT (Single Pole/Double Throw) switch combines low distortion audio and accurate USB 2.0 high-speed data (480Mbps) signal switching in the same low voltage device. When operated with a 2.7V to 3.6V single supply, these analog switches allow audio signal swings below-ground, allowing the use of a common USB and audio headphone connector in Personal Media Players and other portable battery powered devices. The ISL54210 incorporates circuitry for the detection of the USB VBUS voltage, which is used to switch between the audio and USB signal sources. It has an enable pin (CTRL) to open all switches and activate the audio click/pop (C/P) circuitry. The high off-isolation and special C/P circuitry of the audio switches eliminates click and pops in the head-phones when the audio CODEC drivers are powering up/down or when a headphone is inserted or removed from the jack. It's available in a tiny 10 Ld 1.8mmx1.4mm ultra-thin TQFN package and a 10 Ld 3mmx3mm TDFN package. It operates over a temperature range of -40C to +85C. ISL54210 Features * High Speed (480Mbps) and Full Speed (12Mbps) Signaling Capability per USB 2.0 * Detection of VBUS Voltage on USB Cable * Low Distortion Negative Signal Capability * Clickless/Popless Audio Switches * Enable Pin to Open all Switches * Low Distortion Headphone Audio Signals - THD+N at 1mW into 32 Load. . . . . . . . . 0.014% * Crosstalk (20Hz to 20kHz). . . . . . . . . . . . . -100dB * Off-Isolation (20Hz to 100kHz) . . . . . . . . . . . 95dB * Single Supply Operation (VDD) . . . . . . 2.7V to 3.6V * -3dB Bandwidth USB Switch . . . . . . . . . . . . 700MHz * Low ON Capacitance @ 240MHz. . . . . . . . . . . 4.2pF * Available in TQFN and TDFN Packages * Compliant with USB 2.0 Short Circuit Requirements Without Additional External Components * Pb-Free (RoHS Compliant) Applications* * PDA's * Audio/USB Switching (see page 19) Related Literature (see page 19) * MP3 and other Personal Media Players * Cellular/Mobile Phones * Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)" * Application Note AN1407 "ISL54210EVAL1Z Evaluation Board User's Manual" Application Block Diagram 3.3V VDD ISL54210 LOGIC CONTROL CONTROLLER VBUS USB/HEADPHONE JACK VBUS 4M COM - CTRL 4M DUSB HIGH-SPEED TRANSCEIVER 200k COM + 200k CLICK AND POP GND D+ R L AUDIO CODEC March 18, 2010 FN6661.2 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2008, 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL54210 Pin Configurations D+ 7 L 6 (Note 1) ISL54210 (10 LD 3.0mmx3.0mm TDFN) TOP VIEW ISL54210 (10 LD 1.8mmx1.4mm TQFN) TOP VIEW VDD 5 4 3 R GND COM + VBUS COM COM + GND 1 2 3 PD 4M LOGIC CONTROL 10 9 8 CTRL DD+ L R D- LOGIC CONTROL 8 9 10 CLICK/POP 4M CTRL 200k 4 200k 5 CLICK/ POP 7 6 VDD 1 VBUS 2 COM - NOTE: 1. Switches Shown for VBUS = Logic "0" and CTRL = Logic "1". Truth Table ISL54210 VBUS 0 0 1 CTRL 0 1 X L, R OFF ON OFF D+, DOFF OFF ON Pin Descriptions ISL54210 TQFN TDFN NAME 1 2 3 4 5 6 7 8 9 10 2 3 4 5 6 7 8 9 10 1 PD VBUS COMGND R L D+ DCTRL VDD PD FUNCTION Digital Control Input Voice and Data Common Pin Ground Connection Audio Right Input Audio Left Input USB Differential Input USB Differential Input Digital Control Input (Audio Enable) Power Supply Thermal Pad. Tie to Ground or Float COM+ Voice and Data Common Pin CTRL: Logic "0" when 0.5V or Floating, Logic "1" when 1.4V VBUS: Logic "0" when VDD + 0.2V or Floating, Logic "1" when VDD + 0.8V 2 FN6661.2 March 18, 2010 ISL54210 Ordering Information PART NUMBER (Note 5) ISL54210IRTZ (Note 3) ISL54210IRTZ-T (Notes 2, 3) ISL54210IRUZ-T (Notes 2, 4) ISL54210EVAL1Z NOTES: 2. Please refer to TB347 for details on reel specifications. 3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 4. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 5. For Moisture Sensitivity Level (MSL), please see device information page for ISL54210. For more information on MSL please see techbrief TB363. PART MARKING 4210 4210 0 Evaluation Board TEMP. RANGE (C) -40 to +85 -40 to +85 -40 to +85 PACKAGE (Pb-Free) 10 Ld 3mmx3mm TDFN 10 Ld 3mmx3mm TDFN 10 Ld 1.8mmx1.4mm TQFN PKG. DWG. # L10.3x3A L10.3x3A L10.1.8x1.4A 3 FN6661.2 March 18, 2010 ISL54210 Absolute Maximum Ratings VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 5.5V Input Voltages D+, D-, L, R (Note 6). . . . . . . . . . . -2V to ((VDD) + 0.3V) VBUS (Note 6) . . . . . . . . . . . . . . . . . . . . . . . -2V to 5.5V CTRL (Note 6) . . . . . . . . . . . . . . -0.3V to ((VDD) + 0.3V) Output Voltages COM-, COM+ (Note 6) . . . . . . . . . . -2V to ((VDD) + 0.3V) Continuous Current (Audio Switches) . . . . . . . . . . 150mA Peak Current (Audio Switches) (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . 300mA Continuous Current (USB Switches) . . . . . . . . . . . . 40mA Peak Current (USB Switches) (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . 100mA ESD Rating: Human Body Model, COM Pins. . . . . . . . . . . . . . . . . >6kV Human Body Model, All Pins . . . . . . . . . . . . . . . . . . >4kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . >300V Charged Device Model . . . . . . . . . . . . . . . . . . . . . >1.5kV Latch-up Tested per JEDEC; Class II Level A . . . . . at +85C Thermal Information Thermal Resistance (Typical) JA (C/W) JC (C/W) 10 Ld TQFN Package (Notes 8, 10) 160 105 10 Ld 3x3 TDFN Package (Notes 7, 9) 55 18 Maximum Junction Temperature (Plastic Package). . +150C Maximum Storage Temperature Range. . . . . -65C to +150C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . -40C to +85C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 6. Signals on D+, D-, L, R, COM-, COM+, CTRL, VBUS exceeding VDD or GND by specified amount are clamped. Limit current to maximum current ratings. 7. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with "direct attach" features. See Tech Brief TB379. 8. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 9. For JC, the "case temp" location is the center of the exposed metal pad on the package underside. 10. For JC, the "case temp" location is taken at the package top center. Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VBUSH = 3.8V, VBUSL = 3.2V, VCTRLH = 1.4V, VCTRLL = 0.5V, (Note 11), Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40C to +85C. TEMP MIN (C) (Notes 12, 13) TYP PARAMETER Audio Switches (L, R) Analog Signal Range, VANALOG ON-Resistance, rON TEST CONDITIONS MAX (Notes 12, 13) UNITS ANALOG SWITCH CHARACTERISTICS VDD = 2.7V to 3.6V, VBUS = float, CTRL = 1.4V VDD = 3.0V, VBUS = 3.2V, CTRL = 1.4V, ICOMx = 40mA, VL or VR = -0.85V to 0.85V (see Figure 2, Note 15) VDD = 3.0V, VBUS = 3.2V, CTRL = 1.4V, ICOMx = 40mA, VL or VR = Voltage at max rON over signal range of -0.85V to 0.85V (Notes 15, 16) Full +25 Full -1.5 2.4 1.5 2.8 3.8 V rON Matching Between Channels, rON +25 Full - 0.1 - 0.32 0.4 rON Flatness, RFLAT(ON) +25 VDD = 3.0V, VBUS = 3.2V, CTRL = 1.4V, ICOMx = 40mA, VL or Full VR = -0.85V to 0.85V, (Notes 14, 15) VDD = 3.0V, VBUS = 0V, CTRL = VDD, RLOAD = 32 VDD = 3.0V, VBUS = 0V, CTRL = VDD, RLOAD = 15 +25 +25 - 0.02 -0.78 -1.5 0.06 0.07 - dB dB Insertion Loss, GON Insertion Loss, GON 4 FN6661.2 March 18, 2010 ISL54210 Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VBUSH = 3.8V, VBUSL = 3.2V, VCTRLH = 1.4V, VCTRLL = 0.5V, (Note 11), Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40C to +85C. (Continued) TEMP MIN (C) (Notes 12, 13) +25 TYP 40 PARAMETER Discharge Pull-Down Resistance, RL, RR TEST CONDITIONS VDD = 3.6V, VBUS = 3.2V, CTRL = 0.5V, VCOM- or VCOM+ = -0.85V, 0.85V, VL or VR = -0.85V, 0.85V, VD+ and VD- = floating; measure current through the discharge pull-down resistor and calculate resistance value. VDD = 2.7V to 3.6V, VBUS = 5.0V, CTRL = 0V or VDD VDD = 3.3V, VBUS = 4.4V, CTRL = 1.4V, ICOMx = 1mA, VD+ or VD- = 3.3V (see Figure 3, Note 15) VDD = 3.3V, VBUS = 4.4V, CTRL = 0V or VDD, ICOMx = 40mA, VD+ or VD-= 0V to 400mV (see Figure 3, Note 15) VDD = 3.3V, VBUS = 4.4V, CTRL = 0V or VDD, ICOMx = 40mA, VD+ or VD-= Voltage at max rON (Notes 15, 16) VDD = 3.3V, VBUS = 4.4V, CTRL = 0V or VDD, ICOMx = 40mA, VD+ or VD-= 0V to 400mV (Notes 14, 15) VDD = 3.6V, VBUS = 0V, CTRL = 3.6V, VCOM- or VCOM+ = 0.5V, 0V, VD+ or VD- = 0V, 0.5V, VL and VR = float VDD = 3.6V, VBUS = 5.25V, CTRL = 0V or VDD, VD+ or VD- = 2.7V, VCOM- or VCOM+ = Float, VL and VR = float; measuring current through 200k resistor at COM side VDD = 2.7V, RL = 50, CL = 10pF (see Figure 1) VDD = 2.7V, RL = 50, CL = 10pF (see Figure 1) VDD = 2.7V, RL = 50, CL = 10pF (see Figure 1) VDD =2.7V, RL = 50, CL = 10pF (see Figure 1) VDD = 3.0V, VBUS = 5.0V, CTRL = 0V or 3V, RL = 45, CL = 10pF, tR = tF = 750ps at 480Mbps, (Duty Cycle = 50%) (see Figure 6) VDD =3.0V, VBUS = 5.0V, CTRL = 0V or 3V, RL = 50, CL = 10pF, tR = tF = 750ps at 480Mbps VDD = 3.0V, VBUS = 5.0V, CTRL = 0V or 3V, RL = 45, CL = 10pF (see Figure 6) MAX (Notes 12, 13) UNITS USB Switches (D+, D-) Analog Signal Range, VANALOG ON-Resistance, rON Full +25 Full 25 Full 0 25 5.4 VDD 35 40 6 7.5 V ON-Resistance, rON rON Matching Between Channels, rON 25 Full - 0.02 - 0.25 0.25 rON Flatness, RFLAT(ON) 25 Full 25 Full 25 Full -10 -50 -20 -30 0.45 4 11 - 0.55 0.6 10 50 20 30 nA nA A A OFF Leakage Current, ID+(OFF) or ID-(OFF) ON Leakage Current, IDX DYNAMIC CHARACTERISTICS USB Turn-ON Time, tON USB Turn-OFF Time, tOFF Audio Turn-ON Time, tON Audio Turn-OFF Time, tOFF Skew, tSKEW 25 25 25 25 25 43 14.5 7.5 130 50 ns ns s ns ps Total Jitter, tJ 25 - 210 - ps Propagation Delay, tPD 25 - 250 - ps 5 FN6661.2 March 18, 2010 ISL54210 Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VBUSH = 3.8V, VBUSL = 3.2V, VCTRLH = 1.4V, VCTRLL = 0.5V, (Note 11), Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40C to +85C. (Continued) TEMP MIN (C) (Notes 12, 13) 25 TYP -100 PARAMETER Audio Crosstalk R to COM-, L to COM+ TEST CONDITIONS VDD = 3.0V, VBUS = float, CTRL = 3.0V, RL = 32, f = 20Hz to 20kHz, VR or VL = 0.707VRMS (2VP-P) (see Figure 5) MAX (Notes 12, 13) UNITS dB Crosstalk VDD = 3.0V, RL = 50, f = 100kHz (Audio to USB, USB to Audio) (see Figure 5) OFF-Isolation OFF-Isolation OFF-Isolation OFF-Isolation OFF-Isolation OFF-Isolation Total Harmonic Distortion VDD = 3.0V, RL = 50, f = 100kHz VDD = 3.0V, RL = 15, f = 20Hz to 20kHz VDD = 3.0V, RL = 32, f = 20Hz to 20kHz VDD = 3.0V, RL = 1k, f = 20Hz to 20kHz VDD = 3.0V, RL = 10k, f = 20Hz to 20kHz VDD = 3.0V, RL = 100k, f = 20Hz to 20kHz f = 20Hz to 20kHz, VDD = 3.0V, VBUS = Float, CTRL = 3.0V, VL or VR = 180mVRMS (509mVP-P) RL = 32 f = 20Hz to 20kHz, VDD = 3.0V, VBUS = Float, CTRL = 3.0V, VL or VR = 0.707VRMS (2VP-P), RL = 32 f = 20Hz to 20kHz, VDD = 3.0V, VBUS = 0V, CTRL = 3.0V, VL or VR = 180mVRMS (509mVP-P), RL = 15 f = 20Hz to 20kHz, VDD = 3.0V, VBUS = 0V, CTRL = 3.0V, VL or VR = 0.707VRMS (2VP-P), RL = 15 VDD = 3.3V, CTRL = 0V, VBUS = float, RL = 1k, VL or VR = 0 to 1.25V DC step or 1.25V to 0V DC step (see Figure 7) VDD = 3.3V, CTRL = 0.5Hz square wave, VBUS = float, RL = 1k, VL or VR = AC-coupled to ground (see Figure 8) 25 25 25 25 25 25 25 25 - -100 95 111 105 75 57 45 0.014 - dB dB dB dB dB dB dB % Total Harmonic Distortion 25 - 0.056 - % Total Harmonic Distortion 25 - 0.043 - % Total Harmonic Distortion 25 - 0.19 - % Click and Pop 25 - 60 - Vp Click and Pop 25 - 500 - Vp USB Switch -3dB Bandwidth Signal = 0dBm, 0.2VDC offset, RL = 50, CL = 5pF D+/D- OFF Capacitance, CD+OFF, CD-OFF COM ON Capacitance, CCOM-(ON), CCOM+(ON) COM ON Capacitance, CCOM-(ON), CCOM+(ON) f = 1MHz, VDD = 3.0V, VBUS = float, CTRL = 3.0V, VD- or VD+ = VCOMx = 0V (see Figure 4) f = 1MHz, VDD = 3.0V, VBUS = 5.0V, CTRL = 0V, VD- or VD+ = VCOMx = 0V (see Figure 4) f = 240MHz, VDD = 3.0V, VBUS = 5.0V, CTRL = 0V, VD- or VD+ = VCOMx = 0V (see Figure 4) 25 25 - 700 4 - MHz pF 25 - 9 - pF 25 - 4.2 - pF 6 FN6661.2 March 18, 2010 ISL54210 Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.0V, GND = 0V, VBUSH = 3.8V, VBUSL = 3.2V, VCTRLH = 1.4V, VCTRLL = 0.5V, (Note 11), Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40C to +85C. (Continued) TEMP MIN (C) (Notes 12, 13) Full 25 Full 25 Full 25 Full 25 2.7 TYP 7 2.4 2.4 - PARAMETER Power Supply Range, VDD TEST CONDITIONS MAX (Notes 12, 13) UNITS 3.6 10 12 4 5 4 5 1 V A A A A A A A POWER SUPPLY CHARACTERISTICS Positive Supply Current, IDD VDD = 3.6V, VBUS = 0V, CTRL = 3.6V (Audio Mode) Positive Supply Current, IDD VDD = 3.6V, VBUS = 5.25V, CTRL = 3.6V (USB Mode) Positive Supply Current, IDD VDD = 3.6V, VBUS = 0V, CTRL = 0V (Mute Mode) VBUS Current, IVBUS VDD = 0V, VBUS = 5.25V, CTRL = Float VDD = 2.7V to 3.6V VDD = 2.7V to 3.6V VDD = 2.7V to 3.6V VDD = 3.6V, VBUS= 0V or float, CTRL = 0V or Float VDD = 3.6V, VBUS = 5.25V, CTRL = 0V or float VDD = 3.6V, VBUS = 0V or float, CTRL = 3.6V VDD = 3.6V, VBUS = 5.25V, CTRL = 0V or float, measure current through the internal pull-down resistor and calculate resistance value. VDD = 3.6V, VBUS = 0V or float, CTRL = 3.6V, measure current through the internal pull-down resistor and calculate resistance value. DIGITAL INPUT CHARACTERISTICS VBUS Voltage Low, VVBUSL CTRL Voltage Low, VCTRLL CTRL Voltage High, VCTRLH Input Current, IVBUSL, ICTRLL Input Current, IVBUSH Input Current, ICTRLH VBUS Pull-Down Resistor, RVBUS Full Full Full Full Full Full Full Full VDD + 0.8V 1.4 -50 -2 -2 2 1 1 4 VDD + 0.2V 0.5 50 2 2 V V V V nA A A M VBUS Voltage High, VVBUSH VDD = 2.7V to 3.6V CTRL Pull-Down Resistor, RCTRL Full - 4 - M NOTES: 11. VLOGIC = Input voltage to perform proper function. 12. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum. 13. Parameters with MIN and/or MAX limits are 100% tested at +25C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 14. Flatness is defined as the difference between maximum and minimum value of ON-resistance over the specified analog signal range. 15. Limits established by characterization and are not production tested. 16. rON matching between channels is calculated by subtracting the channel with the highest max rON value from the channel with lowest max rON value, between L and R or between D+ and D-. 7 FN6661.2 March 18, 2010 ISL54210 Test Circuits and Waveforms VBUSH LOGIC INPUT VBUSL 50% tr < 20ns tf < 20ns VINPUT SWITCH INPUT VDD C CTRL tOFF AUDIO OR USB COMx VBUS 90% VBUS GND RL 50W CL 10pF VOUT SWITCH INPUT VINPUT 90% SWITCH OUTPUT 0V tON VOUT Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1A. MEASUREMENT POINTS Repeat test for all switches. CL includes fixture and stray capacitance. RL V OUT = V (INPUT) ----------------------R L + r ON FIGURE 1B. TEST CIRCUIT FIGURE 1. SWITCHING TIMES VDD C VDD C rON = V1/40mA L OR R VL OR R V1 40mA COMx rON = V1 / Icom CTRL VD- OR D+ VBUSL ICOM GND V1 CTRL D- OR D+ VBUS VBUS VBUSH COMx GND REPEAT TEST FOR ALL SWITCHES REPEAT TEST FOR ALL SWITCHES FIGURE 2. AUDIO rON TEST CIRCUIT VDD C FIGURE 3. USB rON TEST CIRCUIT VDD C CTRL AUDIO OR USB SIGNAL GENERATOR CTRL L OR R COMx 32 VBUS IMPEDANCE ANALYZER COMx GND ANALYZER RL REPEAT TEST FOR ALL SWITCHES VBUSL OR VBUSH 0V OR FLOAT VBUS COMx GND R OR L NC REPEAT TEST FOR ALL SWITCHES FIGURE 4. CAPACITANCE TEST CIRCUIT FIGURE 5. AUDIO CROSSTALK TEST CIRCUIT 8 FN6661.2 March 18, 2010 ISL54210 Test Circuits and Waveforms (Continued) VDD tri 90% DIN+ DIN90% 50% 10% tfi tro 90% 10% OUT+ OUT90% tf0 50% tskew_o 50% 10% GND |tro - tri| Delay Due to Switch for Rising Input and Rising Output Signals. |tfo - tfi| Delay Due to Switch for Falling Input and Falling Output Signals. |tskew_0| Change in Skew through the Switch for Output Signals. |tskew_i| Change in Skew through the Switch for Input Signals. DIN143 DIN+ 143 15.8 COMDCL 10% 50% tskew_i 15.8 COM+ D+ CL OUT+ 45 OUT45 VBUSH CTRL VBUS C FIGURE 6A. MEASUREMENT POINTS FIGURE 6. SKEW TEST FIGURE 6B. TEST CIRCUIT 3.3V AUDIO PRECISION SYSTEM II CASCADE ANALYZER CHA CHB FLOAT VBUS COMCOM+ VDD CLICK AND POP L R RLOAD RLOAD GND CTRL 0V TO 1.25V DC STEP OR 1.25V TO 0V DC STEP SET AUDIO ANALYZER FOR PEAK DETECTION, 32 SAMPLES/SEC, A WEIGHTED FILTER, MANUAL RANGE 1X/Y, UNITS TO DBV FIGURE 7. CLICK AND POP TEST CIRCUIT 9 FN6661.2 March 18, 2010 ISL54210 Test Circuits and Waveforms (Continued) 3.3V AUDIO PRECISION SYSTEM II CASCADE ANALYZER CHA CHB FLOAT C VBUS VDD COMCOM+ CLICK AND POP L R RLOAD RLOAD GND CTRL 0V TO VDD SQUARE WAVE SET AUDIO ANALYZER FOR PEAK DETECTION, 32 SAMPLES/SEC, A WEIGHTED FILTER, MANUAL RANGE 1X/Y, UNITS TO DBV FIGURE 8. CLICK AND POP TEST CIRCUIT VDD L CLICK AND POP R 220F 20k GND VBUS CTRL 220F 0V TO 3.0V DC STEP OR 3.0V TO 0V DC STEP 1Hz COMCOM+ 20k 1.5V OR 0V POWER SUPPLY TURN-ON/TURN-OFF CLICK AND POP TRANSIENT TEST FIGURE 9. CLICK AND POP TEST CIRCUIT #2 10 FN6661.2 March 18, 2010 ISL54210 Typical Application Block Diagram 3.3V VBUS VBUS USB/HEADPHONE JACK VDD ISL54210 LOGIC CONTROL CTRL 4M D- CONTROLLER 4M COM 200k COM + 200k CLICK AND POP R L D+ USB HIGH-SPEED TRANSCEIVER AUDIO CODEC GND Detailed Description The ISL54210 device is a dual single pole/double throw (SPDT) analog switch that operates from a single DC power supply in the range of 2.7V to 3.6V. It was designed to function as a dual 2-to-1 multiplexer to select between USB differential data signals and audio L and R stereo signals. It comes in tiny TQFN and TDFN packages for use in MP3 players, PDAs, cellphones, and other personal media players. The part consists of two 2.5 audio switches and two 5.5 USB switches. The audio switches can accept signals that swing below ground. They were designed to pass audio left and right stereo signals, that are ground referenced, with minimal distortion. The USB switches were designed to pass high-speed USB differential data signals with minimal edge and phase distortion. The ISL54210 was specifically designed for MP3 players, personal media players and cellphone applications that need to combine the audio headphone jack and the USB data connector into a single shared connector, thereby saving space and component cost. A "Typical Application Block Diagram" of this functionality is shown on page 11. The ISL54210 incorporates circuitry for the detection of the USB VBUS voltage, which is used to switch between the audio CODEC drivers and USB transceiver of the MP3 player or cellphone. The ISL54210 contains a logic control pin (CTRL) that when driven low while VBUS is low, opens all switches and activates the audio click and pop circuitry. A detailed description of the two types of switches are provided in the following sections. In a typical application, the USB transmission and audio playback are intended to be mutually exclusive operations. Audio Switches The two audio switches (L, R) are 2.5 switches that can pass signals that swing below ground. Crosstalk between the audio switches is <-100dB over the audio band. These switches have excellent off-isolation >105dB over the audio band with a 32 load. Over a signal range of 1V (0.707VRMS) with VDD > 2.7V, these switches have an extremely low rON resistance variation. They can pass ground referenced audio signals with very low distortion (<0.06% THD+N) when delivering 15.6mW into a 32 headphone speaker load. See Figures 16, 17, 18, and 19 THD+N in "Typical Performance Curves" beginning on page 14. The audio drivers should be connected at the L and R side of the switch (pins 5 and 6 for TQFN, pins 6 and 7 for TDFN) and the speaker loads should be connected at the COM side of the switch (pins 2 and 3 for TQFN, pins 3 and 4 for TDFN). The audio switches have click and pop circuitry on the L and R side that is activated when the VBUS voltage is VDD + 0.2V or floating and the CTRL voltage to 0.5V or floating. The ISL54210 should be put in this mode before powering down or powering up of the audio CODEC drivers. In this mode, both the audio and USB in-line switches will be OFF and the audio click and pop circuitry will be ON. The high off-isolation of the audio switches along with the click and pop circuitry will isolate the transients generated during power-up and power-down of the audio CODECs from getting through to the headphones, thus eliminating click and pop noise in the headphones. The audio switches are active (turned ON) whenever the VBUS voltage is VDD + 0.2V or floating and the CTRL voltage to 1.4V. 11 FN6661.2 March 18, 2010 ISL54210 USB Switches The two USB switches (D+, D-) are 5.5 bidirectional switches that were specifically designed to pass high-speed USB differential signals typically in the range of 0V to 400mV. The switches have low capacitance and high bandwidth to pass USB high-speed signals (480Mbps) with minimum edge and phase distortion to meet USB 2.0 signal quality specifications. See Figure 20 for high-speed eye pattern taken with switch in the signal path. These switches can also swing rail-to-rail and pass USB full-speed signals (12Mbps) with minimal distortion. See Figure 21 for full-speed eye pattern taken with switch in the signal path. The maximum signal range for the USB switches is from -1.5V to VDD. The signal voltage at D- and D+ should not be allowed to exceed the VDD voltage rail or go below ground by more than -1.5V. The USB switches are active (turned ON) whenever the VBUS voltage is to VDD + 0.8V. VBUS is internally pulled low, so when VBUS is floating the USB switches are OFF. or tri-stated. The CTRL control pin is only active when VBUS is logic "0". Logic Control Voltage Levels: VBUS = Logic "0" (Low) when VBUS VDD + 0.2V or Floating. VBUS = Logic "1" (High) when VBUS VDD + 0.8V CTRL = Logic "0" (Low) when 0.5V or Floating. CTRL = Logic "1" (High) when 1.4V Audio Mode If the VBUS pin = Logic "0" and CTRL pin = Logic "1", the part will be in the Audio mode. In Audio mode, the L (left) and R (right) 2.5 audio switches are ON, the Dand D+ 5.5 switches are OFF (high impedance) and the audio click and pop circuitry is OFF (high impedance). In a typical application, VDD will be in the range of 2.7V to 3.6V and will be connected to the battery or LDO of the MP3 player or cellphone. When a headphone is plugged into the common connector, nothing gets connected at the VBUS pin (its internally pulled low) and as long as the CTRL = Logic "1" the ISL54210 part remains in the audio mode and the audio drivers of the player can drive the headphones and play music. ISL54210 Operation The following discusses using the ISL54210 in the "Typical Application Block Diagram" on page 11. VDD SUPPLY The DC power supply connected at VDD (Pin 10 for TQFN, Pin 1 for TDFN) provides the required bias voltage for proper switch operation. Its voltage should be kept in the range of 2.7V to 3.6V when used in a USB/Audio application to ensure you get proper switching when the VBUS voltage is at its lower limit of 4.4V. In a typical USB/Audio application for portable battery powered devices, the VDD voltage will come from a battery or an LDO and be in the range of 2.7V to 4.3V. For best possible USB full-speed operation (12Mbps), it is recommended that the VDD voltage be 2.7V in order to get a USB data signal level above 2.7V. Before power-up and power-down of the ISL54210 part, the VBUS and CTRL control pins should be driven to ground or tri-stated. This will put the switch in the mute state which turns all switches OFF and activates the click and pop circuitry. Which will minimize transients at the speaker loads during power-up and power-down. LOGIC CONTROL The state of the ISL54210 device is determined by the voltage at the VBUS pin (Pin 1 for TQFN, Pin 2 for TDFN) and the CTRL pin (Pin 9 for TQFN, Pin 10 for TDFN). The part has three states or modes of operation: Audio Mode, USB Mode and Mute Mode. Refer to the "Truth Table" on page 2. The VBUS pin and CTRL pin are internally pulled low through 4M resistors to ground and can be left floating USB Mode If the VBUS pin = Logic "1" and CTRL pin = Logic "0" or Logic "1" the part will go into USB mode. In USB mode, the D- and D+ 5.5 switches are ON and the L and R 2.5 audio switches are OFF (high impedance). When a USB cable from a computer or USB hub is connected at the common connector, the voltage at the VBUS pin will be driven with the USB VBUS voltage which will be in the range of 4.4V to 5.25V. The ISL54210 part will go into the USB mode. In USB mode, the computer or USB hub transceiver and the MP3 player or cellphone USB transceiver are connected and digital data will be able to be transmitted back and forth. When the USB cable is disconnected the ISL54210 automatically turns the D+ and D- switches OFF. Mute Mode If the VBUS pin = Logic "0" and CTRL pin = Logic "0", the part will be in the Mute mode. In the Mute mode, the audio switches and the USB switches are OFF (high impedance) and the audio click and pop circuitry is ON. Before powering down or powering up of the audio CODECs drivers, the ISL54210 should be put in the Mute mode. In Mute mode transients present at the L and R signal pins due to the changing DC voltage of the audio drivers will not pass to the headphones preventing clicks and pops in the headphones. See "AC-Coupled click and pop operation" on page 13. Before power-up and power-down of the ISL54210 part, the VBUS and CTRL control pins should be driven to ground or tri-stated. This will put the switch in the mute state, which turns all switches OFF and activates the click and pop circuitry. This will minimize transients at the 12 FN6661.2 March 18, 2010 ISL54210 speaker loads during power-up and power-down. See Figure 30 in the "Typical Performance Curves" on page 18. AC-COUPLED CLICK AND POP OPERATION Single supply audio drivers have their signal biased at a DC offset voltage (usually at 1/2 the DC supply voltage of the driver). As this DC bias voltage comes up or goes down during power-up or power-down of the driver, a transient can be coupled into the speaker load through the DC blocking capacitor (see the"Typical Application Block Diagram" on page 11). When a driver is OFF and then turned ON, the rapidly changing DC bias voltage at the output of the driver will cause an equal voltage at the input side of the switch due to the fact that the voltage across the blocking capacitor cannot change instantly. If the switch is in the Audio mode or there is no low impedance path to discharge the blocking capacitor voltage at the input of the switch, before turning on the audio switch, a transient discharge will occur in the speaker, generating a click/pop noise. Proper elimination of a click/pop transient at the speaker loads while powering up or down of the audio drivers requires that the ISL54210 have its click/pop circuitry activated by putting the part in the Mute mode. This allows the transients generated by the audio drivers to be discharged through the click and pop shunt circuitry. Once the driver DC bias has reached VDD/2 and the transient on the switch side of the DC blocking capacitor has been discharged to ground through the click/pop shunt circuitry, the audio switches can be turned ON and connected through to the speaker loads without generating any undesirable click/pop noise in the speakers. With a typical DC blocking capacitor of 220F and the click/pop shunt circuitry designed to have a resistance of 20 to 70, allowing a 100ms wait time to discharge the transient before placing the switch in the Audio mode will prevent the transient from getting through to the speaker load. See Figures 28 and 29 in the "Typical Performance Curves" page 17. Typical Performance Curves 2.70 ICOM = 40mA VDD = 3.0V 2.65 TA = +25C, Unless Otherwise Specified 4.0 ICOM = 40mA 3.6 VDD = 2.5V rON () rON () VDD = 3.6V 2.60 VDD = 4.3V 2.55 3.2 VDD = 3.3V 2.8 VDD = 2.7V VDD = 3.6V 2.4 2.50 -1.5 -1.0 -0.5 0 VCOM (V) 0.5 1.0 1.5 2.0 -1.5 -1.0 -0.5 0 VCOM (V) 0.5 1.0 1.5 FIGURE 10. AUDIO ON-RESISTANCE vs SUPPLY VOLTAGE vs SWITCH VOLTAGE FIGURE 11. AUDIO ON-RESISTANCE vs SUPPLY VOLTAGE vs SWITCH VOLTAGE 13 FN6661.2 March 18, 2010 ISL54210 Typical Performance Curves 4 +85C TA = +25C, Unless Otherwise Specified (Continued) 25 VDD = 3.0V ICOM = 40mA 20 3 rON () 15 +25C rON () 10 2 -40C VDD = 3.0V ICOM = 40mA 1 -1.5 -1.0 -0.5 0 VCOM (V) 0.5 1.0 1.5 5 +85C +25C 0 -1.5 -40C -1.0 -0.5 0 0.5 1.0 VCOM (V) 1.5 2.0 2.5 3.0 FIGURE 12. AUDIO ON-RESISTANCE vs SWITCH VOLTAGE vs TEMPERATURE FIGURE 13. AUDIO ON-RESISTANCE vs SWITCH VOLTAGE vs TEMPERATURE 7.0 ICOM = 40mA 6.5 7 VDD = 3.3V ICOM = 40mA 6 +85C 6.0 5.5 rON () 5.0 4.5 4.0 VDD = 5V 3.5 3.0 VDD = 4.3V 2 VDD = 3.3V VDD = 3.6V VDD = 2.7V rON () 5 +25C -40C 4 3 0 0.1 0.2 VCOM (V) 0.3 0.4 1 0 0.1 0.2 VCOM (V) 0.3 0.4 FIGURE 14. USB ON-RESISTANCE vs SUPPLY VOLTAGE vs SWITCH VOLTAGE FIGURE 15. USB ON-RESISTANCE vs SWITCH VOLTAGE vs TEMPERATURE 0.058 VDD = 2.7V 0.08 RLOAD = 32 VDD = 3V PEAK-TO-PEAK VOLTAGES AT LOAD 3VP-P 2.5VP-P THD+N (%) VDD = 3.0V VDD = 3.3V THD+N (%) 0.056 0.06 2VP-P 0.054 VDD = 3.6V 0.04 1VP-P 510mVP-P 20 200 FREQUENCY (Hz) 2k 20k 0.052 RLOAD = 32 VLOAD = 0.707VRMS 200 2k FREQUENCY (Hz) 20k 0.02 20 FIGURE 16. THD+N vs SUPPLY VOLTAGE vs FREQUENCY FIGURE 17. THD+N vs SIGNAL LEVELS vs FREQUENCY 14 FN6661.2 March 18, 2010 ISL54210 Typical Performance Curves 0.14 0.12 0.10 RLOAD = 32 FREQ = 1kHz VDD = 3V TA = +25C, Unless Otherwise Specified (Continued) 0.30 0.20 0.10 THD+N (%) 0.08 RLOAD = 32 FREQ = 1kHz VDD = 3V THD+N (%) 0.08 0.06 0.04 0.02 0 0.3 0.06 0.04 0.02 0.6 0.9 1.2 1.5 1.8 2.1 2.3 2.6 2.9 0 5 10 15 20 25 30 OUTPUT VOLTAGE (VP-P) OUTPUT POWER (mW) FIGURE 18. THD+N vs OUTPUT VOLTAGE FIGURE 19. THD+N vs OUTPUT POWER VDD = 3.3V VOLTAGE SCALE (0.1V/DIV) TIME SCALE (0.2ns/DIV.) FIGURE 20. EYE PATTERN: 480Mbps WITH USB SWITCHES IN THE SIGNAL PATH 15 FN6661.2 March 18, 2010 ISL54210 Typical Performance Curves TA = +25C, Unless Otherwise Specified (Continued) VDD = 3.3V VOLTAGE SCALE (0.5V/DIV) TIME SCALE (10ns/DIV) FIGURE 21. EYE PATTERN: 12Mbps USB SIGNAL WITH USB SWITCHES IN THE SIGNAL PATH -40 -45 VDD = 3.3V VSIGNAL = 0.707VRMS -50 -55 RL = 10k -60 -65 -70 -75 RL = 1k -80 -85 -90 -95 -100 RL = 32 -105 -110 -115 -120 20 50 100 200 500 1k 2k FREQUENCY (Hz) -60 -65 -70 -75 CROSSTALK (dB) -80 -85 -90 -95 -100 -105 -110 -115 5k 10k 20k -120 20 50 100 200 500 1k 2k FREQUENCY (Hz) 5k 10k 20k R TO L L TO R VDD = 3V RLOAD = 32 VSIGNAL = 0.707VRMS OFF- ISOLATION (dB) FIGURE 22. OFF-ISOLATION AUDIO SWITCHES vs LOADING FIGURE 23. AUDIO CHANNEL-TO-CHANNEL CROSSTALK 16 FN6661.2 March 18, 2010 ISL54210 Typical Performance Curves -60 -70 -80 -90 -100 CROSSTALK (dB) -110 -120 -130 -140 -150 -160 -170 -180 20 50 100 200 500 1k 2k 5k FREQUENCY (Hz) 10k 20k AUDIO TO USB USB TO AUDIO VDD = 3V RLOAD = 50 VSIGNAL = 0.707VRMS TA = +25C, Unless Otherwise Specified (Continued) 0 -20 NORMALIZED GAIN (dB) -40 -60 -80 -100 -120 -140 0.001 RL = 50 VSIGNAL = 0.2VP-P to 2VP-P 50k 100k 0.01 0.1 1M FREQUENCY (Hz) 10M 100M 500M FIGURE 24. CHANNEL-TO-CHANNEL CROSSTALK FIGURE 25. OFF-ISOLATION USB SWITCHES 0 -10 NORMALIZED GAIN (dB) -20 -30 -40 -50 -60 -70 -80 -90 -100 0.001 0.01 0.1 1M FREQUENCY (Hz) 10M 100M 500M RL = 50 VSIGNAL = 0.2VP-P to 2VP-P NORMALIZED GAIN (dB) 1 USB SWITCH 0 -1 -2 -3 -4 RL = 50 VSIGNAL = 0.2VP-P TO 2VP-P 1M 10M 100M FREQUENCY (Hz) 1G FIGURE 26. OFF-ISOLATION AUDIO SWITCHES FIGURE 27. FREQUENCY RESPONSE MUTE 2V/DIV MUTE 2V/DIV VDD/2 2V/DIV VOLTAGE (V) VOLTAGE (V) VDD/2 2V/DIV LIN 200mV/DIV LIN 200mV/DIV LOUT 50mV/DIV LOUT 50mV/DIV TIME (s) 100ms/DIV TIME (s) 100ms/DIV FIGURE 28. 32 AC-COUPLED CLICK AND POP REDUCTION FIGURE 29. 1k AC-COUPLED CLICK AND POP REDUCTION 17 FN6661.2 March 18, 2010 ISL54210 Typical Performance Curves VDD 1V/DIV TA = +25C, Unless Otherwise Specified (Continued) Die Characteristics VOLTAGE (V) SUBSTRATE AND TDFN THERMAL PAD POTENTIAL (POWERED UP): GND VIN = 1.5V OR 0V VBUS = CTRL = 0V VOUT 10mV/DIV TRANSISTOR COUNT: 98 PROCESS: Submicron CMOS TIME (s) 200ms/DIV FIGURE 30. POWER-UP/POWER-DOWN CLICK AND POP TRANSIENT 18 FN6661.2 March 18, 2010 ISL54210 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE 3/18/10 REVISION FN6661.2 CHANGE Converted to New Intersil Template Replaced note, page 3: "JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details." with "direct attached note" Added "Boldface limits apply over the operating temperature range, -40C to +85C." to Electrical Specifications table. On page 1 in "Related Literature" section added App Note AN1407. On page 1 in "Features" section added "Low On Capacitance at 240MHz 4.2pF" On page 2 added thermal pad (PD) to TDFN pinout and added PD column to "Pin Descriptions" table. Page 4 in "Abs Max Rating" section added HBM rating for COM pins of 6kV and Latchup level. Thermal information Tjc for uTQFN changed from "61.9" to "105" and note for Tja was added to reference no direct attach, added Tjc to show the case temp location at top center. Page 4 in Electrical Spec Table - Removed Note Reference from Typical Column and Added to specific specs in Audio Switches and USB Switches as follows: On Resistance, rON Matching Between Channels and rON Flatness. Page 6 in electrical specifications table added "On Capacitance at 240MHz parameter. Page 15 Figure 20 Change from USB far end mask to USB near end mask. Page 18 in "Die Characteristics" section added TDFN thermal pad potential. Corrected Order Information. Initial Release to web 1/6/09 7/2/08 FN6661.1 FN6661.0 Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. *For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL54210 To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at http://rel.intersil.com/reports/search.php For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 19 FN6661.2 March 18, 2010 ISL54210 Thin Dual Flat No-Lead Plastic Package (TDFN) 2X 0.10 C A A D 2X 0.10 C B L10.3x3A 10 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS SYMBOL A A1 E MIN 0.70 - NOMINAL 0.75 0.20 REF MAX 0.80 0.05 NOTES - 6 INDEX AREA TOP VIEW B A3 b D D2 E // A 0.10 C 0.08 C 0.20 2.95 2.25 2.95 1.45 0.25 3.0 2.30 3.0 1.50 0.50 BSC 0.30 3.05 2.35 3.05 1.55 5, 8 7, 8 7, 8 - E2 e k 0.25 0.25 0.30 10 5 0.35 8 2 3 Rev. 4 8/09 C SEATING PLANE SIDE VIEW A3 L N D2 (DATUM B) 1 2 D2/2 7 8 Nd NOTES: 6 INDEX AREA (DATUM A) 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. NX k E2 E2/2 2. N is the number of terminals. 3. Nd refers to the number of terminals on D. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. NX L N 8 N-1 NX b e (Nd-1)Xe REF. BOTTOM VIEW C L NX (b) 5 SECTION "C-C" CC e TERMINAL TIP (A1) L1 9L 5 0.10 M C A B 7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Compliant to JEDEC MO-229-WEED-3 except for D2 dimensions. ( 2.30 ) ( 2.00 ) FOR ODD TERMINAL/SIDE ( 10X 0.50) (1.50) ( 2.90 ) Pin 1 (8x 0.50) ( 10X 0.25) TYPICAL RECOMMENDED LAND PATTERN 20 FN6661.2 March 18, 2010 ISL54210 Package Outline Drawing L10.1.8x1.4A 10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 4, 9/09 (DATUM A) 1.80 A B PIN #1 ID 0.50 1.40 1 2 NX 0.40 NX 0.20 5 10X 0.10 M C A B 0.05 M C 5 1 2X 0.10 C TOP VIEW 6 INDEX AREA 2X 0.10 C 2 (DATUM B) 7 0.40 BSC BOTTOM VIEW 0.10 C 0.05 C SEATING PLANE 0.05 MAX 2.20 1.00 0.60 SIDE VIEW 0.5 C 1.00 0.50 1.80 0.40 0.20 0.40 10 LAND PATTERN TYPICAL RECOMMENDED LAND PATTERN DETAIL "X" 5 NX (0.20) 0.127 REF CL (0.05 MAX) 0.40 e CC 0.40 BSC TERMINAL TIP 0.20 SECTION "C-C" NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. Total 10 leads. 3. Nd and Ne refer to the number of terminals on D (4) and E (6) side, respectively. 4. All dimensions are in millimeters. Tolerances 0.05mm unless otherwise noted. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Maximum package warpage is 0.05mm. 8. Maximum allowable burrs is 0.076mm in all directions. 9. JEDEC Reference MO-255. 10. For additional information, to assist with the PCB Land Pattern Design effort, see Intersil Technical Brief TB389. 21 FN6661.2 March 18, 2010 |
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