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| FQD3N50C / FQU3N50C 500V N-Channel MOSFET March 2008 QFET FQD3N50C / FQU3N50C 500V N-Channel MOSFET Features * * * * * * * 2.5A, 500V, RDS(on) = 2.5 @VGS = 10 V Low gate charge ( typical 10 nC) Low Crss ( typical 8.5pF) Fast switching 100% avalanche tested Improved dv/dt capability RoHS compliant (R) Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies, active power factor correction, electronic lamp ballast based on half bridge topology. D D G G S D-PAK FQD Series I-PAK GDS FQU Series S Absolute Maximum Ratings Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL Drain-Source Voltage Drain Current - Continuous (TC = 25C) - Continuous (TC = 100C) Drain Current - Pulsed (Note 1) Parameter FQD3N50C/FQU3N50C 500 2.5 1.5 10 30 (Note 2) (Note 1) (Note 1) (Note 3) Units V A A A V mJ A mJ V/ns W W/C C C Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25C) - Derate above 25C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8 from case for 5 seconds 200 2.5 3.5 4.5 35 0.28 -55 to +150 300 Thermal Characteristics Symbol RJC RJA RJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient* Thermal Resistance, Junction-to-Ambient Typ ---- Max 3.5 50 110 Units C/W C/W C/W * When mounted on the minimum pad size recommended (PCB Mount) (c)2008 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FQD3N50C / FQU3N50C Rev. B FQD3N50C / FQU3N50C 500V N-Channel MOSFET Package Marking and Ordering Information Device Marking FQD3N50C FQD3N50C FQU3N50C Device FQD3N50CTM FQD3N50CTF FQU3N50CTU Package D-PAK D-PAK I-PAK Reel Size 380mm 380mm - Tape Width 16mm 16mm - Quantity 2500 2500 70 Electrical Characteristics Symbol Off Characteristics BVDSS BVDSS/ TJ IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd TC = 25C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Test Conditions VGS = 0 V, ID = 250 A ID = 250 A, Referenced to 25C VDS = 500 V, VGS = 0 V VDS = 400 V, TC = 125C VGS = 30 V, VDS = 0 V VGS = -30 V, VDS = 0 V VDS = VGS, ID = 250 A VGS = 10 V, ID = 1.25 A VDS = 40 V, ID = 1.25 A VDS = 25 V, VGS = 0 V, f = 1.0 MHz (Note 4) Min 500 ------ Typ -0.7 ----- Max Units --1 10 100 -100 V V/C A A nA nA Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse On Characteristics Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance 2.0 ---2.1 1.5 4.0 2.5 -V S Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance ---280 50 8.5 365 65 11 pF pF pF Switching Characteristics Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time (Note 4, 5) VDD = 250 V, ID = 2.5A, RG = 25 ----- 10 25 35 25 10 1.5 5.5 30 60 80 60 13 --- ns ns ns ns nC nC nC Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 400 V, ID = 2.5A, VGS = 10 V (Note 4, 5) ---- Drain-Source Diode Characteristics and Maximum Ratings IS ISM VSD trr Qrr NOTES: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 58mH, IAS =2.5A, VDD = 50V, RG = 25 , Starting TJ = 25C 3. ISD 2.5A, di/dt 200A/s, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse width 300s, Duty cycle 2% 5. Essentially independent of operating temperature Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 2.5 A VGS = 0 V, IS = 3 A, dIF / dt = 100 A/s (Note 4) ------ ---170 0.7 2.5 10 1.4 --- A A V ns C 2 FQD3N50C / FQU3N50C Rev. B www.fairchildsemi.com FQD3N50C / FQU3N50C 500V N-Channel MOSFET Typical Performance Characteristics Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 10 VGS 1 1 10 ID , Drain Current [A] ID, Drain Current [A] 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V Bottom : 5.0 V Top : 150C 10 0 10 0 25C -55C 10 -1 Notes : 1. 250s Pulse Test 2. TC = 25C -1 Note 1. VDS = 40V 2. 250s Pulse Test 10 -1 10 10 0 10 1 2 4 6 8 10 VDS, Drain-Source Voltage [V] VGS , Gate-Source Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperatue 8.0 7.5 RDS(ON) [], Drain-Source On-Resistance 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 0 2 4 6 8 10 Note : TJ = 25C VGS = 10V IDR, Reverse Drain Current [A] 10 0 VGS = 20V 150C 25C Notes : 1. VGS = 0V 2. 250s Pulse Test 10 -1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 ID, Drain Current [A] VSD, Source-Drain voltage [V] Figure 5. Capacitance Characteristics Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Figure 6. Gate Charge Characteristics 12 600 Crss = Cgd 10 VGS, Gate-Source Voltage [V] VDS = 100V VDS = 250V VDS = 400V Capacitances [pF] Ciss 400 8 Coss 6 200 Crss Note ; 1. VGS = 0 V 2. f = 1 MHz 4 2 Note : ID = 3A 0 -1 10 0 10 0 10 1 0 5 10 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] 3 FQD3N50C / FQU3N50C Rev. B www.fairchildsemi.com FQD3N50C / FQU3N50C 500V N-Channel MOSFET Typical Performance Characteristics (Continued) Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 1.2 3.0 BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.1 RDS(ON), (Normalized) Drain-Source On-Resistance 2.5 2.0 1.0 1.5 1.0 0.9 Notes : 1. VGS = 0 V 2. ID = 250A 0.5 Notes : 1. VGS = 10 V 2. ID = 1.5 A 0.8 -100 -50 0 50 100 150 200 0.0 -100 -50 0 50 100 150 200 TJ, Junction Temperature [C] TJ, Junction Temperature [C] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature 3 10 2 Operation in This Area is Limited by R DS(on) ID, Drain Current [A] 10 0 100 s 1 ms 10 ms 100 ms DC Notes : 1. TC = 25C 2. TJ = 150C 3. Single Pulse ID, Drain Current [A] 10 3 10 1 2 1 10 -1 10 -2 10 0 10 1 10 2 0 25 50 75 100 125 150 VDS, Drain-Source Voltage [V] TC, Case Temperature [C] Figure 11. Transient Thermal Response Curve ZJC(t), Thermal Response D = 0 .5 10 0 0 .2 0 .1 0 .0 5 N o te s : 1 . Z JC (t) = 3 .5 C /W M ax. 2 . D uty F ac to r, D = t 1 /t 2 3 . T JM - T C = P D M * Z JC (t) 10 -1 0 .0 2 0 .0 1 sin gle p u ls e PDM t1 t2 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a ve P u ls e D u ra tio n [s e c ] 4 FQD3N50C / FQU3N50C Rev. B www.fairchildsemi.com FQD3N50C / FQU3N50C 500V N-Channel MOSFET Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms 5 FQD3N50C / FQU3N50C Rev. B www.fairchildsemi.com FQD3N50C / FQU3N50C 500V N-Channel MOSFET Peak Diode Recovery dv/dt Test Circuit & Waveforms 6 FQD3N50C / FQU3N50C Rev. B www.fairchildsemi.com FQD3N50C / FQU3N50C 500V N-Channel MOSFET Mechanical Dimensions D-PAK Dimensions in Millimeters 7 FQD3N50C / FQU3N50C Rev. B www.fairchildsemi.com FQD3N50C / FQU3N50C 500V N-Channel MOSFET Mechanical Dimensions (Continued) I-PAK Dimensions in Millimeters 8 FQD3N50C / FQU3N50C Rev. B www.fairchildsemi.com FQD3N50C / FQU3N50C 500V N-Channel MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidianries, and is not intended to be an exhaustive list of all such trademarks. ACEx(R) Build it NowTM CorePLUSTM CorePOWERTM CROSSVOLTTM CTLTM Current Transfer LogicTM EcoSPARK(R) EfficentMaxTM EZSWITCHTM * TM (R) Fairchild(R) Fairchild Semiconductor(R) FACT Quiet SeriesTM FACT(R) FAST(R) FastvCoreTM FlashWriter(R) * tm FPSTM F-PFSTM FRFET(R) Global Power ResourceSM Green FPSTM Green FPSTM e-SeriesTM GTOTM IntelliMAXTM ISOPLANARTM MegaBuckTM MICROCOUPLERTM MicroFETTM MicroPakTM MillerDriveTM MotionMaxTM Motion-SPMTM OPTOLOGIC(R) OPTOPLANAR(R) (R) tm PDP-SPMTM Power-SPMTM PowerTrench(R) Programmable Active DroopTM QFET(R) QSTM Quiet SeriesTM RapidConfigureTM Saving our world 1mW at a timeTM SmartMaxTM SMART STARTTM SPM(R) STEALTHTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SuperMOSTM (R) The Power Franchise(R) tm TinyBoostTM TinyBuckTM TinyLogic(R) TINYOPTOTM TinyPowerTM TinyPWMTM TinyWireTM SerDesTM UHC(R) Ultra FRFETTM UniFETTM VCXTM VisualMaxTM * EZSWITCHTM and FlashWriter(R) are trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. This datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I34 Preliminary First Production No Identification Needed Obsolete Full Production Not In Production 9 FQD3N50C / FQU3N50C Rev. B www.fairchildsemi.com |
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