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LTC3499/LTC3499B 750mA Synchronous Step-Up DC/DC Converters with Reverse-Battery Protection
FEATURES

DESCRIPTIO
Reverse-Battery Protection for DC/DC Converter and Load High Efficiency: Up to 94% Generates 5V at 175mA from a 1.8V Input Operates from 1.8V to 5.5V Input Supply 2V to 6V Adjustable Output Voltage Inrush Current Controlled During Start-Up Output Disconnnect in Shutdown Low Noise 1.2MHz PWM Operation Tiny External Components Automatic Burst Mode(R) Operation (LTC3499) Continuous Switching at Light Loads (LTC3499B) Overvoltage Protection 8-Lead (3mm x 3mm x 0.75mm) DFN and MSOP Packages
The LTC(R)3499/LTC3499B are synchronous, fixed frequency step-up DC/DC power converters with integrated reverse battery protection that protect and disconnect the devices and load when the battery polarity is reversed while delivering high efficiency in a small (3mm x 3mm) DFN package. True output disconnect eliminates inrush current and allows zero load current in shutdown. The devices feature an input voltage range of 1.8V to 5.5V enabling operation from two alkaline or NiMH batteries. The switching frequency is internally set at 1.2MHz allowing the use of tiny surface mount inductors and capacitors. A minimal number of external components are required to generate output voltages ranging from 2V to 6V. The LTC3499 features automatic Burst Mode operation to increase efficiency at light loads, while the LTC3499B features continuous switching at light loads. The soft-start time is externally programmable through a small capacitor. Anti-ring circuitry reduces EMI emissions by damping the inductor in discontinuous mode. The devices feature <1A shutdown supply current, integrated overvoltage protection and are available in both 8-pin (3mm x 3mm) DFN and 8-pin MSOP packages.
APPLICATIO S

Medical Equipment Digital Cameras MP3 Players Handheld Instruments
, LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
VIN 1.8V TO 3.2V
Two AA Cells to 5V Synchronous Boost Converter
4.7H
Battery Current vs VIN
1.0 SHDN = 0V VOUT = 0V
2.2F
VIN LTC3499
SW VOUT 5V 175mA 1M FB 10F 324k
BATTERY CURRENT (A)
+
0.5
ON OFF
SHDN VC
VOUT
0
100k 330pF
-0.5
SS 0.01F
GND
-1.0 -6
3499 TA01
-4
U
-2 0 2 4 VIN AND SW VOLTAGE (V) 6
3499 TA01b
U
U
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1
LTC3499/LTC3499B
ABSOLUTE
AXI U RATI GS
VIN to GND ..................................................... - 7V to 7V VOUT to GND ............................................... - 0.3V to 7V SW to VOUT .................................................... - 7V to 1V SW to GND DC .............................................................. -7V to 7V Pulsed < 100ns .......................................... -7V to 8V SHDN to GND ................................................ - 7V to 7V
PACKAGE/ORDER I FOR ATIO
TOP VIEW SHDN VIN SW GND 1 2 3 4 9 8 7 6 5 VC FB VOUT SS
DD PACKAGE 8-LEAD PLASTIC DFN TJMAX = 125C, JA = 45C EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER LTC3499EDD LTC3499BEDD
DD PART MARKING LBRB LCDZ
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
The denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 2.4V, VOUT = 5V, SHDN = 2.4V, TA = TJ unless otherwise noted.
SYMBOL Supply VIN VOUT VFB IFB IVIN ISD IBURST Minimum Start-Up Voltage Output Voltage Adjust Range FB Voltage FB Input Current VIN Quiescent Current VIN Quiescent Current in Shutdown Quiescent Current - Burst Mode Operation VFB = 1.22V No Output Load SHDN = 0V, VOUT = 0V VIN Current at 2.4V (LTC3499 Only) VOUT Current at 5V (LTC3499 Only)

ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
2
U
U
W
WW U
W
(Note 1)
FB, SS to GND ............................................ - 0.3V to 7V Operating Temperature Range (Notes 3, 4) ........................................ -40C to 85C Storage Temperature Range ................ - 65C to 125C Lead Temperature (Soldering, 10 sec) MSOP .............................................................. 300C
TOP VIEW SHDN VIN SW GND 1 2 3 4 8 7 6 5 VC FB VOUT SS
MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 125C, JA = 160C/W
ORDER PART NUMBER LTC3499EMS8 LTC3499BEMS8
MS8 PART MARKING 1250 LTBRC LTCFB
MIN
TYP 1.6
MAX 1.8 6 1.245 50 600 1
UNITS V V V nA A A A A
2 1.195 1.220 3 300 0.1 20 1.5
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LTC3499/LTC3499B
ELECTRICAL CHARACTERISTICS
SYMBOL INMOS IPMOS RNMOS RPMOS ILIM tDLY, ILIM DMAX DMIN fOSC GmEA ISOURCE ISINK ISS VOV VOV(HYST) Shutdown VSHDN(LOW) VSHDN(HIGH) ISD Reverse Battery IVOUT,REVBATT IVIN,REVBATT ISHDN,REVBATT VOUT Reverse-Battery Current VIN and VSW Reverse-Battery Current SHDN Reverse-Battery Current SHDN Input Low SHDN Input High SHDN Input Current PARAMETER NMOS Switch Leakage PMOS Switch Leakage NMOS Switch On Resistance PMOS Switch On Resistance NMOS Current Limit Current Limit Delay to Output Maximum Duty Cycle Minimum Duty Cycle Frequency Accuracy Error Amplifier Transconductance Error Amplifier Source Current Error Amplifier Sink Current SS Current Source VOUT Overvoltage Threshold VOUT Overvoltage Hysteresis
The denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 2.4V, VOUT = 5V, SHDN = 2.4V, TA = TJ unless otherwise noted.
CONDITIONS VSW = 6V VOUT = 6V, VSW = 0V VOUT = 3.3V VOUT = 5V VOUT = 3.3V VOUT = 5V
MIN
TYP 0.1 0.1 0.45 0.4 0.58 0.45
MAX 5 5
UNITS A A A ns %
0.75 60 80 1 85 0 1.2 40 -5 5 1.4
Note 2

% MHz mhos A A A V mV
VSS = 1V
-3 6.8 400
0.2 1.2 1
V V A A A A
Measured at SW
VOUT = 0V, VIN = VSHDN = VSW = -6V VOUT = 0V, VIN = VSHDN = VSW = -6V VOUT = 0V, VIN = VSHDN = VSW = -6V

5 -5 -5
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Specification is guaranteed by design and not 100% tested in production. Note 3:The LTC3499E/LTC3499BE are guaranteed to meet device specifications from 0C to 85C. Specifications over the -40C to 85C operating temperature are assured by design, characterization and correlation with statistical process controls.
Note 4: These ICs include overtemperature protection that is intended to protect the devices during momentary overload conditions. Junction temperatures will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum operating temperature range may impair device reliability.
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3
LTC3499/LTC3499B TYPICAL PERFOR A CE CHARACTERISTICS
2-Cell to 5V Efficiency vs Load Current (LTC3499 Only)
100 90 EFFICIENCY
EFFICIENCY (%)
EFFICIENCY (%)
EFFICIENCY (%)
80 70 60 50 40 0.1 1 POWER LOSS
VIN = 3.2V VIN = 2.4V VIN = 1.8V 10 100 LOAD CURRENT (mA)
Current Limit Accuracy vs Temperature
1.04 1.03 1.02 100 90
Burst Mode OUTPUT CURRENT THRESHOLD (mA)
CURRENT LIMIT (A)
1.01 1.00 0.99 0.98 0.97 0.96 -50 -25 50 25 TEMPERATURE (C) 0 75 100
3499 G04
EFFICIENCY (%)
Maximum Output Current Capability vs VIN
800 VIN > VOUT 700 VIN > VOUT
INPUT CURRENT (A)
Burst Mode QUIESCENT CURRENT (A)
OUTPUT CURRENT (mA)
600 500 400 300 VOUT = 5V 200 100 0 1.5 2.5 3.5 VIN (V)
3499 G06
VOUT = 3.3V
4.5
4
UW
1
3499 G01
TA = 25C unless noted. 2-Cell to 5V Efficiency vs Load Current (LTC3499B Only)
100000 10000
Li-Ion to 5V Efficiency vs Load Current (LTC3499 Only)
100000 10000
POWER LOSS (mW)
100 90 EFFICIENCY 80 70 POWER LOSS 60 50 40 30 0.1 VIN = 4.2V VIN = 3.6V VIN = 3V 1 100 LOAD CURRENT (mA) 10 10 1 100
100 90 80 70 60 50 40 30 20 10 0 0.1 1 VIN = 3.2V VIN = 2.4V VIN = 1.8V 10 100 LOAD CURRENT (mA) 1000
3499 G17
POWER LOSS (mW)
1000 100 10
1000
0.1 1000
0.1 1000
3499 G03
2-Cell to 3.3V Efficiency vs Load Current (LTC3499 Only)
100000 10000 EFFICIENCY
POWER LOSS (mW)
Burst Mode Output Current Threshold vs Input Voltage (LTC3499 Only)
60 VOUT = 5V 50 40 30 20 10 0
80 70 60 POWER LOSS 50 40 0.1 1 VIN = 3V VIN = 2.4V VIN = 1.8V 10 100 LOAD CURRENT (mA)
1000 100 10 1
0.1 1000
1.8
2.3
2.8 3.3 3.8 INPUT VOLTAGE (V)
4.3
4.8
3499 G05
3499 G02
No Load Input Current vs VIN (LTC3499 Only)
200 180 160 140 120 100 80 60 40 20 0 VOUT = 3.3V VOUT = 5V
Burst Mode Quiescent Current vs Temperature (LTC3499 Only)
30 25 20 15 10 5 0 -50
5.5
1.5
2.5
3.5 VIN (V)
4.5
5.5
3499 G07
-25
0 25 50 TEMPERATURE (C)
75
100
3499 G08
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LTC3499/LTC3499B TYPICAL PERFOR A CE CHARACTERISTICS
FB Voltage vs Temperature
1.2225
OSCILLATOR FREQUENCY (MHz)
REVERSE-BATTERY CURRENT (A)
1.2220 1.2215 FB VOLTAGE (V) 1.2210 1.2205 1.2200 1.2195 1.2190 1.2185 -50 -25 50 25 TEMPERATURE (C) 0 75 100
3499 G09
Burst Mode Operation (LTC3499 Only)
VOUT 50mV/DIV
IL 50mA/DIV 20s/DIV VIN = 2.4V VOUT = 5V L = 4.7H COUT = 10F CFF = 10pF (FEEDFORWARD CAPACITOR FROM VOUT TO FB)
3499 G12
Soft-Start into 25 Load
VIN 2V/DIV SS 2V/DIV VOUT 2V/DIV IL 200mA/DIV VIN = 2.4V VOUT = 5V L = 4.7H CSS = 0.01F COUT = 10F 1ms/DIV
34991G15
UW
TA = 25C unless noted. VIN and SW Reverse-Battery Current vs VIN and SW Voltage
1.0 SHDN = 0V VOUT = 0V 0.5
Oscillator Frequency vs Temperature
1.4
1.3
1.2
0
1.1
-0.5
1.0 -50
-1.0
-25 0 25 50 TEMPERATURE (C) 75 100
3499 G08
-6
-4
-2 0 2 4 VIN AND SW VOLTAGE (V)
6
3499 G11
Load Transient 50mA to 200mA
Fixed Frequency Discontinous Mode Operation
VOUT 200mV/DIV 200mA 50mA VIN = 2.4V 200s/DIV VOUT = 5V ILOAD = 50mA to 200mA RZ = 100k CF = 680pF COUT = 10F L = 4.7H
3499 G13
SW 2V/DIV
ILOAD 100mA/DIV
IL 100mA/DIV VIN = 2.4V VOUT = 5V L = 4.7H 200ns/DIV
3499 G14
Fixed Frequency Operation
SW 2V/DIV IL 100mA/DIV
VIN = 2.4V VOUT = 5V L = 4.7H
200ns/DIV
3499 G16
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5
LTC3499/LTC3499B
PI FU CTIO S
SHDN (Pin 1): Shutdown Input for IC. Connect to a voltage greater than 1.2V to enable and a voltage less than 0.2V to disable the LTC3499/LTC3499B. VIN (Pin 2): Input Supply Voltage. The valid operating voltage is between 1.8V to 5.5V. VIN has reverse battery protection. Since the LTC3499/LTC3499B use VIN as the main bias source, bypass with a low ESR ceramic capacitor of at least 2.2F. SW (Pin 3): Switch Pin. Connect an inductor from VIN to this pin with a value between 2.2H and 10H. Keep PCB trace lengths as short and wide as possible to minimize EMI and voltage overshoot. If the inductor current falls to zero or SHDN is low an internal 250 antiringing switch is connected from VIN to SW to minimize EMI. GND (Pin 4): Signal and Power Ground for the IC. SS (Pin 5): Soft-Start Input. Connect a capacitor from SS to ground to control the inrush current at start-up. An internal 3A current source charges this pin. SS will be discharged if SHDN is pulled low, thermal shutdown occurs or VIN is below the minimum operating voltage. VOUT (Pin 6): Power Supply Output. Connect a low ESR output filter capacitor from this pin to the ground plane. FB (Pin 7): FB Input to Error Amplifier. Connect a resistor divider tap from VOUT to this pin to set the output voltage. The output voltage can be adjusted between 2V and 6V. Referring to the Functional Block Diagram, the output voltage is given by:
R1 VOUT = 1.22 * 1+ R2
6
U
U
U
VC (Pin 8): Error Amplifier Output. A frequency compensation network is connected from this pin to GND to compensate the boost converter loop. See Closing the Feedthrough Loop section for guidelines. Exposed Pad--DD Only (Pin 9): Ground. Must be soldered to the PCB power ground plane for electrical connection and rated thermal performance.
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LTC3499/LTC3499B
FU CTIO AL BLOCK DIAGRA
VIN 1.8V TO 5.5V
+
CIN L 2 3
REVERSE-BATTERY COMPARATOR
ANTI-RING 250 1 = CLOSED
VIN
+
1 = CLOSED 0.7V
-
VSELECT OV COMPARATOR VOUT
+ +
VOUT 6 CFF (OPTIONAL) 7 R2 R1
+
1 = OFF ERROR AMPLIFIER
6.8V
-
ENABLE PWM LOGIC AND DRIVERS
THERMAL SD SLEEP
IZERO
1.2MHz OSCILLATOR
SLOPE COMPENSATION
3A
+
PWM COMPARATOR
-
ENABLE TSD
+
SLEEP CURRENT LIMIT COMPARATOR 1
Burst Mode CONTROL (LTC3499 ONLY)
-
0.8V
+
-
SHDN
1A TYP
REFERENCE BIAS UVLO SD
ENABLE
GND 4
Figure 1. Functional Block Diagram
-
W
SW
U
U
-
+ -
1.22V FB
COUT
-
+
VC 8 CC1 RZ CC2 SS 5k 5 CSS
34991 F01
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7
LTC3499/LTC3499B
OPERATIO U
In the event of a commanded shutdown or thermal shutdown (TSD), CSS is discharged through a nominal 5k impedance to GND. Once the condition is removed and SS is discharged near ground, a soft-start will automatically be re-initiated. Error Amplifier A transconductance amplifier generates an error voltage from the difference between the positive input internally connected to the 1.22V reference and the negative input connected to FB. A simple compensation network is placed from VC to ground. Internal clamps limit the minimum and maximum error amplifier output voltage for improved large signal transient response. A voltage divider from VOUT to GND programs the output voltage via FB from 2V to 6V and is defined by the following equation:
R1 VOUT = 1.22 * 1+ R2
The LTC3499/LTC3499B provide high efficiency, low noise power for boost applications with output voltages up to 6V. Operation can be best understood by referring to the Functional Block Diagram in Figure 1. The synchronous boost converters are housed in either an 8-lead (3mm x 3mm) DFN or MSOP package and operates at a fixed 1.2MHz. With a 1.6V typical minimum VIN voltage these devices are well suited for applications using two or three alkaline or nickel-metal hydride (NiMH) cells or one Lithium-Ion (Li+) cell. The LTC3499/LTC3499B have integrated circuitry which protects the battery, IC, and circuitry powered by the device in the event that the input batteries are connected backwards (reverse battery protection). The true output disconnect feature eliminates inrush current and allows VOUT to be zero volts during shutdown. The current mode architecture simplifies loop compensation with excellent load transient response. The low RDS(ON), low gate charge synchronous switches eliminate the need for an external Schottky diode rectifier, and provide efficient high frequency pulse width modulation (PWM). Burst Mode quiescent current to the LTC3499 is only 20A from VIN, maximizing battery life. The LTC3499B does not have Burst Mode operation and the device continues switching at constant frequency. This results in the absence of low frequency output ripple at the expense of light load efficiency. LOW NOISE FIXED FREQUENCY OPERATION Shutdown The LTC3499/LTC3499B are shut down by pulling SHDN below 0.2V, and activated by pulling the pin above 1.2V. SHDN can be driven above VIN or VOUT as long as it is limited to less than the absolute maximum rating. Soft-Start The soft-start time is programmed with an external capacitor to ground on SS. An internal current source charges the capacitor, CSS, with a nominal 3A. The voltage on SS is used to clamp the voltage on VC. The soft-start time is given by t(msec) = CSS (F) * 200
Current Sensing Lossless current sensing converts the peak current signal into a voltage which is summed with the internal slope compensation. This summed signal is compared to the error amplifier output to provide a peak current control command for the PWM. Peak switch current is limited to 750mA minimum. Antiringing Control The antiringing control connects a resistor across the inductor to damp the ringing on SW in discontinuous conduction mode. The LC resonant ringing (L = inductor, CSW = capacitance on SW) is low energy, but can cause EMI radiation if antiringing control is not present. Zero Current Comparator The zero current comparator monitors the inductor current to the output and shuts off the synchronous rectifier once this current reduces to approximately 40mA, preventing negative inductor current.
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8
LTC3499/LTC3499B
OPERATIO U
sleep if the output load remains less than the sleep threshold. The frequency of this intermittent PWM (or burst) operation is proportional to load current. Therefore, as the load current drops further below the burst threshold, the LTC3499 operates in PWM mode less frequently. When the load current increases above the burst threshold, the LC3499 will resume continuous PWM operation seamlessly. Referring to the Functional Block Diagram, an optional capacitor, CFF, between VOUT and FB in some circumstances can reduce peak-to-peak VOUT ripple and input quiescent current during Burst Mode operation. Typical values for CFF range from 10pF to 220pF. Output Disconnect and Inrush Current Limiting The LTC3499/LTC3499B are designed to allow true output disconnect by eliminating body diode conduction of the internal P-channel MOSFET transistor. This allows VOUT to go to zero volts during shutdown without drawing any current from the input source. It also provides for inrush current limiting at turn-on, minimizing surge current seen by the input supply. VIN > VOUT Operation The LTC3499/LTC3499B will maintain voltage regulation when the input voltage is above the output voltage. This is achieved by terminating the switching on the synchronous P-channel MOSFET and applying VIN statically on the gate. This will ensure the volts * seconds of the inductor will reverse during the time current is flowing to the output. Since this mode will dissipate more power in the IC, the maximum output current is limited in order to maintain an acceptable junction temperature:
Reverse-Battery Protection Plugging the battery in backwards poses a severe problem to most power converters. At a minimum the battery will be quickly discharged. Almost all ICs have an inherent diode from VIN (cathode) to ground (anode) which conducts appreciable current when VIN drops more than 0.7V below ground. Under this condition the integrated circuit will most likely be damaged due to the excessive current draw. There exists the possibility for the battery and circuitry powered by the device to also be damaged. The LTC3499/LTC3499B have integrated circuitry which allows negligible current flow under a reverse-battery condition, protecting the battery, device and circuitry attached to the output. A graph of the reverse-battery current drawn is shown in the Typical Performance Characteristics. Discrete methods of reverse battery protection put additional dissipative elements in the high current path reducing efficiency while increasing component count to implement protection. The LTC3499/LTC3499B do not suffer from either of these drawbacks. Burst Mode Operation (LTC3499 only) Portable devices frequently spend extended time in low power or stand-by mode, only drawing high power when specific functions are enabled. In order to improve battery life in these types of products, high power converter efficiency needs to be maintained over a wide output power range. In addition to its high efficiency at moderate and heavy loads, the LTC3499 includes automatic Burst Mode operation that improves efficiency of the power converter at light loads. Burst Mode operation is initiated if the output load current falls below an internally programmed threshold (see Typical Performance graph, Output Load Burst Mode Threshold vs VIN). Once initiated the Burst Mode operation circuitry shuts down most of the circuitry in the LTC3499, only keeping alive the circuitry required to monitor the output voltage. This state is referred to as sleep. In sleep, the LTC3499 only draws 20A from the input supply, greatly enhancing efficiency. When the output has drooped approximately 1% from its nominal regulation point, the LTC3499 wakes up and commences normal PWM operation. The output capacitor will recharge causing the LTC3499 to re-enter
IOUT(MAX )
JA
125 - TA * (( VIN + 1.5) - VOUT )
where TA = ambient temperature and JA is the package thermal resistance (45C/W for the DD8 and 160C/W for the MS8). For example at VIN = 4.5V, VOUT = 3.3V and TA = 85C in the DD8 package, the maximum output current is 330mA.
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LTC3499/LTC3499B
APPLICATIO S I FOR ATIO
PCB LAYOUT GUIDELINES
The high speed operation of the LTC3499/LTC3499B demand careful attention to board layout. Advertised performance will not be achieved with careless layout. Figure 2 shows the recommended component placement. A large copper area will help to lower the chip temperature. Traces carrying high current (SW, VOUT, GND) are kept short. The lead length to the battery should be kept as short as possible. The VIN and VOUT ceramic capacitors should be placed as close to the IC pins as possible.
CC2 EXPOSED PAD FOR DD8 CC1 SHDN 1 8 VC RZ
VIN
2 9 3
7
FB R1
+
VBATT
CIN
L SW
6
VOUT
GND
4
5
SS CSS
Figure 2: Recommended Component Placement
COMPONENT SELECTION Inductor Selection The LTC3499/LTC3499B allow the use of small surface mount inductors and chip inductors due to the fast 1.2MHz switching frequency. A minimum inductance value of 2.2H is required. Larger values of inductance will allow greater output current capability by reducing the inductor ripple current. Increasing the inductance above 10H will increase total solution area while providing minimal improvement in output current capability. The inductor current ripple is typically set to 20% to 40% of the maximum inductor current. For high efficiency, choose an inductor with high frequency core material,
10
U
such as ferrite, to reduce core losses. The inductor should have low ESR (equivalent series resistance) to reduce the I2R power losses, and must be able to handle the peak inductor current without saturating. To minimize radiated noise, use a toroidal or shielded inductor. See Table 1 for some suggested inductor suppliers.
Table 1. Inductor Vendor Information
PART NUMBER MSS5131 and MOS6020 Series SLF7028 and SLF7045 Series LQH55D Series CDRH4D28 and CDRH4D28 Series D53LC and D62CB Series DT0703 Series MJPF2520 Series SUPPLIER Coilcraft TDK Murata Sumida Toko CoEV FDK WEB SITE www.coilcraft.com www.component.tdk.com www.murata.com www.sumida.com www.tokoam.com www.coev.net www.fdk.com
R2 COUT
W
U
U
Output Capacitor Selection The output voltage ripple has three components to it. The bulk value of the capacitor is set to reduce the ripple due to charge into the capacitor each cycle. The maximum ripple voltage due to charge is given by:
34991 F02
VRBULK = IP *
(COUT * VOUT * f)
VIN
where IP = peak inductor current and f = switching frequency. The ESR (equivalent series resistance) is usually the most dominant factor for ripple in most power converters. The ripple due to capacitor ESR is simply given by: VRCESR = IP * CESR where CESR = capacitor equivalent series resistance The ESL (equivalent series inductance) is also an important factor for high frequency converters. Using small surface mount ceramic capacitors, placed as close as possible to VOUT, will minimize ESL.
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LTC3499/LTC3499B
APPLICATIO S I FOR ATIO U
Closing the Feedback Loop The LTC3499/LTC3499B utilize current mode control, with internal slope compensation. Current mode control eliminates the 2nd order filter due to the inductor and output capacitor exhibited in voltage mode controllers, thus simplifying it to a single pole filter response. The product of the modulator control to output DC gain and the error amp open loop gain gives the DC gain of the system:
Low ESR capacitors should be used to minimize output voltage ripple. A 4.7F to 10F output capacitor is sufficient for most applications and should be placed as close to VOUT as possible. Larger values may be used to obtain even lower output ripple and improve transient response. X5R and X7R dielectric materials are preferred for their ability to maintain capacitance over wide voltage and temperature ranges. Input Capacitor Selection The input filter capacitor reduces peak currents drawn from the input source and reduces input switching noise. Ceramic capacitors are a good choice for input decoupling due to their low ESR and ability to withstand reverse voltage (i.e. non-polar nature). The capacitor should be located as close as possible to the device. In most applications a 2.2F input capacitor is sufficient. Larger values may be used without limitations. Table 2 shows a list of several ceramic capacitor manufacturers.
Table 2. Capacitor Vendor Information
SUPPLIER AVX Murata TDK Taiyo Yuden WEB SITE www.avxcorp.com www.murata.com www.component.tdk.com www.t-yuden.com
Thermal Considerations For the LTC3499/LTC3499B to deliver full output power, it is imperative that a good thermal path be provided to dissipate the heat generated within the package. For the DFN package, this can be accomplished by taking advantage of the large thermal pad on the underside of the device. It is recommended that multiple vias in the printed circuit board be used to conduct heat away from the part and into a copper plane with as much area as possible. If the junction temperature continues to rise, the part will go into thermal shutdown where switching will stop until the temperature drops.
W
U
U
GDC = GCONTROL * GEA * GCONTROL = 2 * VIN IOUT ,
VREF VOUT * GCURRENT _ SENSE
GEA ~ 1000, GCURRENT _ SENSE =
1 RDS(ON)
The output filter pole is given by:
fFILTER _ POLE =
( * VOUT * COUT )
1
IOUT
where COUT is the output filter capacitor. The output filter zero is given by:
fFILTER _ ZERO =
(2 * * RESR * COUT )
where RESR is the capacitor equivalent series resistance. A troublesome feature of the boost regulator topology is the right half plane (RHP) zero, given by:
fRPHZ = VIN2 (2 * * IOUT * VOUT * L )
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LTC3499/LTC3499B
APPLICATIO S I FOR ATIO
There is a resultant gain increase with a phase lag which makes it difficult to compensate the loop. At heavy loads the right half plane zero can occur at a relatively low frequency. The loop gain is typically rolled off before the RHP zero frequency. The typical error amp compensation is shown in Figure 3, following the equations for the loop dynamics:
fPOLE1 ~
(
1
2 * * 10e6 * CC1
)
which is extremely close to DC.
fZERO1 = fPOLE2 =
(2 * * RZ * CC1) (2 * * RZ * CC2 )
1
1
12
U
VOUT 6 ERROR AMPLIFIER
W
U
U
+ -
1.22V FB 7
R1
R2 VC 8 RZ CC1
3499 F03
CC2
Figure 3: Typical Error Amplifier Compensation
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LTC3499/LTC3499B
TYPICAL APPLICATIO S
Lithium-Ion to 5V, 350mA
L 4.7H VIN Li-Ion 3.1V TO 4.2V
100 90
+
LTC3499 SHDN VC VOUT 1M FB SS 0.01F GND 324k VOUT 5V 350mA COUT 10F X5R
EFFICIENCY (%)
CIN 2.2F X5R
VIN
ON OFF
100k 330pF
CIN: TAIYO YUDEN X5R JMK212BJ225MD COUT: TAIYO YUDEN X5R JMK212BJ106MD L: COILCRAFT MSS5131-472MLB
Two Cells to 5V, 175mA
L 4.7H VIN 2 AA CELLS 1.8V TO 3.2V
+
LTC3499 SHDN VC VOUT 1M FB SS 0.01F GND 324k VOUT 5V 175mA COUT 10F X5R
EFFICIENCY (%)
CIN 2.2F X5R
VIN
ON OFF
100k 330pF
CIN: TAIYO YUDEN X5R JMK212BJ225MD COUT: TAIYO YUDEN X5R JMK212BJ106MD L: COILCRAFT MSS5131-472MLB
U
Lithium-Ion to 5V Efficiency
100000 10000 EFFICIENCY 80 70 POWER LOSS 60 50 40 30 0.1
3499 F04a
SW
POWER LOSS (mW)
1000 100 10 VIN = 4.2V VIN = 3.6V VIN = 3V 1 100 LOAD CURRENT (mA) 10 1
0.1 1000
3499 G03
Two Cells to 5V Efficiency
100 90 100000 10000 EFFICIENCY 80 70 60 50 40 0.1
3499 F05a
SW
POWER LOSS (mW)
1000 100 POWER LOSS 10 1
VIN = 3.2V VIN = 2.4V VIN = 1.8V 1 10 100 LOAD CURRENT (mA)
0.1 1000
3499 G01
3499f
13
LTC3499/LTC3499B
PACKAGE DESCRIPTIO U
DD Package 8-Lead Plastic DFN (3mm x 3mm)
(Reference LTC DWG # 05-08-1698)
0.675 0.05 PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.38 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 5 0.38 0.10 8 3.00 0.10 (4 SIDES) PIN 1 TOP MARK (NOTE 6)
(DD8) DFN 1203
3.5 0.05 1.65 0.05 2.15 0.05 (2 SIDES)
1.65 0.10 (2 SIDES)
0.200 REF
0.75 0.05
4 0.25 0.05 2.38 0.10 (2 SIDES)
1 0.50 BSC
0.00 - 0.05
BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE
3499f
14
LTC3499/LTC3499B
PACKAGE DESCRIPTIO
5.23 (.206) MIN
0.42 0.038 (.0165 .0015) TYP
RECOMMENDED SOLDER PAD LAYOUT
DETAIL "A" 0 - 6 TYP
4.90 0.152 (.193 .006)
0.254 (.010) GAUGE PLANE
0.18 (.007) SEATING PLANE 0.22 - 0.38 (.009 - .015) TYP 0.127 0.076 (.005 .003)
MSOP (MS8) 0204
0.65 (.0256) NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
MS8 Package 8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
0.889 0.127 (.035 .005) 3.20 - 3.45 (.126 - .136)
0.65 (.0256) BSC
3.00 0.102 (.118 .004) (NOTE 3)
8
7 65
0.52 (.0205) REF
3.00 0.102 (.118 .004) (NOTE 4)
0.53 0.152 (.021 .006) DETAIL "A"
1
23
4
1.10 (.043) MAX
0.86 (.034) REF
3499f
15
LTC3499/LTC3499B
TYPICAL APPLICATIO
Two Cells to 3.3V, 250mA
L 4.7H VIN 2 AA CELLS 1.8V TO 3.2V 100 90 VIN LTC3499 SHDN VC 100k 330pF FB SS 0.01F CIN: TAIYO YUDEN X5R JMK212BJ225MD COUT: TAIYO YUDEN X5R JMK212BJ106MD L: COILCRAFT MSS5131-472MB 40 0.1
3499 F06a
+
ON OFF
VOUT 1M
VOUT 3.3V 250mA COUT 10F X5R
EFFICIENCY (%)
CIN 2.2F X5R
GND
RELATED PARTS
PART NUMBER LT1930/LT1930A LT1961 LTC3400/LTC3400B LTC3401 LTC3402 LTC3421 LTC3422 LTC3425 LTC3427 LTC3429/LTC3429B LTC3458/LTC3458L LTC3525 DESCRIPTION 1A (ISW), 1.2MHz/2.2MHz, High Efficiency Step-Up DC/DC Converter 1.5A (ISW), 1.25MHz, High Efficiency Step-Up DC/DC Converter 600mA (ISW), 1.2MHz, Synchronous Step-Up DC/DC Converter 1A (ISW), 3MHz, Synchronous Step-Up DC/DC Converter 2A (ISW), 3MHz, Synchronous Step-Up DC/DC Converter 3A (ISW), 3MHz, Synchronous Step-Up DC/DC Converter with Output Disconnect 1.5A (ISW), 3MHz, Synchronous Step-Up DC/DC Converter with Output Disconnect 5A (ISW), 8MHz, 4-Phase Synchronous Step-Up DC/DC Converter with Output Disconnect 500mA (ISW), 1.25MHz, Synchronous Step-Up DC/DC Converter with Soft-Start/Output Disconnect 600mA (ISW), 550kHz, Synchronous Step-Up DC/DC Converters with Soft-Start/Output Disconnect 1.4A/1.7A (ISW), 1.5MHz, Synchronous Step-Up DC/DC Converter with Soft-Start/Output Disconnect 400mA (ISW), Synchronous Step-Up DC/DC Converter in SC70 COMMENTS High Efficiency, VIN: 2.6V to 16V, VOUT(MAX) = 34V, IQ = 4.2mA/5.5mA, ISD < 1A, ThinSOT Package 90% Efficiency, VIN: 3V to 25V, VOUT(MAX) = 35V, IQ = 0.9mA, ISD < 6A, MS8E Package 92% Efficiency, VIN: 0.5V to 5V, VOUT(MAX) = 5V, IQ = 19A/300A, ISD < 1A, ThinSOT Package 97% Efficiency, VIN: 0.5V to 5V, VOUT(MAX) = 5.5V, IQ = 38A, ISD < 1A, 10-Lead MS Package 97% Efficiency, VIN: 0.5V to 5V, VOUT(MAX) = 5.5V, IQ = 38A, ISD < 1A, 10-Lead MS Package 95% Efficiency, VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12A, ISD < 1A, 24-Lead QFN Package 95% Efficiency, VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 25A, ISD < 1A 95% Efficiency, VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12A, ISD < 1A, 32-Lead QFN Package 94% Efficiency, VIN: 1.8V to 5V, VOUT(MAX) = 5.25V, ISD < 1A, DFN Package 92% Efficiency, VIN: 0.5V to 4.3V, VOUT(MAX) = 5V, IQ = 20A, ISD < 1A, ThinSOT Package 93% Efficiency, VIN: 1.5V to 6V, VOUT(MAX) = 7.5V/6V, IQ = 15A, ISD < 1A, DFN Package 94% Efficiency, VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 7A, ISD < 1A, Output Disconnect
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
U
Two Cells to 3.3V Efficiency
100000 10000 EFFICIENCY
POWER LOSS (mW)
SW 80 70 60
1000 100 10 POWER LOSS VIN = 3V VIN = 2.4V VIN = 1.8V 1 10 100 LOAD CURRENT (mA) 1
332k
50
0.1 1000
3499 G02
3499f LT 0106 * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2006

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