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HD74LVCZ244A Octal Buffers / Line Drivers with 3-state Outputs REJ03D0371-0300 (Previous ADE-205-230A (Z)) Rev.3.00 Aug. 18, 2004 Description The HD74LVCZ244A has eight line drivers with three state outputs in a 20 pin package. This device is a noninverting buffer and has two active low enables (1G and 2G). Each enable independently controls four buffers. When VCC is between 0 and 1.5 V, the device is in the high impedance state during power up or power down. Low voltage and high-speed operation is suitable at battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation. Features * * * * * * * * * VCC = 2.7 to 5.5 V All inputs VIH (Max) = 5.5 V (@VCC = 0 to 5.5 V) All outputs VO (Max) = 5.5 V (@VCC = 0 V or output off state) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25C) High impedance state during power up and power down Power off disables outputs, permitting live insertion High output current 24 mA (@VCC = 3.0 to 5.5 V) Ordering Information Package Type SOP-20 pin (JEITA) TSSOP-20 pin Package Code FP-20DAV TTP-20DAV Package Abbreviation FP T Taping Abbreviation (Quantity) EL (2,000 pcs/reel) ELL (2,000 pcs/reel) Part Name HD74LVCZ244AFPEL HD74LVCZ244ATELL Function Table Inputs G H L L H: High level L: Low level X: Immaterial Z: High impedance A X H L Output Y Z H L Rev.3.00 Aug. 18, 2004 page 1 of 8 HD74LVCZ244A Pin Arrangement 1G 1 1A1 2Y4 2 3 20 VCC 19 2G 18 1Y1 17 2A4 16 1Y2 15 2A3 14 1Y3 13 2A2 12 1Y4 11 2A1 1A2 4 2Y3 1A3 2Y2 1A4 2Y1 5 6 7 8 9 GND 10 (Top view) Absolute Maximum Ratings Item Supply voltage Input voltage Output voltage Input diode current Output diode current Output current VCC, GND current Storage temperature Symbol VCC VI VO IIK IOK IO ICC or IGND Tstg Ratings -0.5 to 7.0 -0.5 to 7.0 -0.5 to 7.0 -0.5 to VCC+0.5 -50 -50 50 100 -65 to 150 Unit V V V mA mA mA mA C Conditions Output "Z" or VCC : OFF Output "H" or "L" VI < 0 VO < 0 Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Rev.3.00 Aug. 18, 2004 page 2 of 8 HD74LVCZ244A Recommended Operating Conditions Item Supply voltage Input voltage Output voltage Output current Symbol VCC VI VO IOH IOL Input rise / fall time Operating temperature Note: 1. Duty cycle 50% tr, tf Ta Ratings 2.7 to 5.5 0 to 5.5 0 to 5.5 0 to VCC -12 -24 *1 12 24 *1 0 to 6 -40 to +85 Unit V V V mA mA ns / V C Conditions At operation Output "Z" or VCC : OFF Output "H" or "L" VCC = 2.7 V VCC = 3.0 to 5.5 V VCC = 2.7 V VCC = 3.0 to 5.5 V Logic Diagram 1G 1A1 1 2G 18 19 2 1Y1 2A1 11 9 2Y1 1A2 4 16 1Y2 2A2 13 7 2Y2 1A3 6 14 1Y3 2A3 15 5 2Y3 1A4 8 12 1Y4 2A4 17 3 2Y4 Rev.3.00 Aug. 18, 2004 page 3 of 8 HD74LVCZ244A Electrical Characteristics (Ta = -40 to 85C) Item Input voltage Symbol VIH VIL Output voltage VOH VCC (V) 2.7 to 3.6 4.5 to 5.5 2.7 to 3.6 4.5 to 5.5 2.7 to 5.5 2.7 3.0 3.0 4.5 2.7 to 5.5 2.7 3.0 4.5 0 to 5.5 2.7 to 5.5 0 to 1.5 1.5 to 0 0 2.7 to 3.6 2.7 to 5.5 2.7 to 3.6 3.3 3.3 Min 2.0 VCCx0.7 -- -- VCC-0.2 2.2 2.4 2.2 3.8 -- -- -- -- -- -- -- -- -- -- -- -- -- -- Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 3.4 7.5 Max -- -- 0.8 VCCx0.3 -- -- -- -- -- 0.2 0.4 0.55 0.55 5 5 5 5 5 225 350 500 -- -- Unit V V V IOH = -100 A IOH = -12 mA IOH = -24 mA V IOL = 100 A IOL = 12 mA IOL = 24 mA VIN = 0 to 5.5 V VOUT = 0 to 5.5 V VOUT = 0.5 to 5.5 V, Output enable = don't care VIN or VO = 5.5 V VIN = 3.6 to 5.5 V *1, IO = 0 VIN = VCC or GND VIN = one input at (VCC-0.6) V, other inputs at VCC or GND VIN = VCC or GND VOUT = VCC or GND Test Conditions VOL Input current Off state output current Output leak current Quiescent supply current IIN IOZ IOZPU IOZPD IOFF ICC ICC A A A A A pF pF Input capacitance Output capacitance Note: CIN CO 1. This applies in the disabled state only. Switching Characteristics FROM (Input) A (Ta = -40 to 85C) TO (Output) Y Item Propagation delay time Symbol tPLH tPHL tZH tZL tHZ tLZ VCC (V) 2.7 3.30.3 5.00.5 2.7 3.30.3 5.00.5 2.7 3.30.3 5.00.5 2.7 3.30.3 5.00.5 Min -- 1.5 -- -- 1.5 -- -- 1.5 -- -- -- -- Typ -- -- -- -- -- -- -- -- -- -- -- -- Max 6.9 5.9 4.5 8.6 7.6 6.1 6.8 6.5 5.5 -- 1.0 1.0 Unit ns Output enable time ns G Y Output disable time ns G Y Between output pin skew *1 tOSLH tOSHL Note: ns 1. This parameter is characterized but not tested. tOSLH = |tPLHm-tPLHn|, tOSHL = |tPHLm-tPHLn| Rev.3.00 Aug. 18, 2004 page 4 of 8 HD74LVCZ244A Test Circuit VCC VCC Output 1G, 2G Input Pulse generator Zout = 50 500 1Y1 to 2Y4 1A1 to 2A4 C L= 50 pF 450 50 Scope See Function Table S1 *1 OPEN See under table GND Symbol t PLH / t PHL t ZH/ t HZ t ZL / t LZ Note: 1. C L includes probe and jig capacitance. S1 Vcc=2.7V, 3.30.3V Vcc=5.00.5V OPEN GND 6V OPEN GND 2xVCC Rev.3.00 Aug. 18, 2004 page 5 of 8 HD74LVCZ244A * Waveforms - 1 tr 90 % Input A 10 % t PLH Vref 90 % Vref 10 % t PHL tf VIH GND VOH Output Y Vref Vref VOL * Waveforms - 2 tf 90 % Vref 10 % t ZL 10 % t LZ tr 90 % Vref GND VOH1 Waveform - A Vref t ZH t HZ VOH - 0.3 V VOL + 0.3 V VOL VOH VOL1 TEST VIH Vref VOH1 VOL1 Vcc=2.7V, 3.30.3V Vcc=5.00.5V VIH Input G Waveform - B Vref 2.7 V 1.5 V 3V GND VCC 50%VCC VCC GND Notes: 1. Input waveform : PRR = 10 MHz, duty cycle 50%, t r = 2.5 ns, t f = 2.5 ns 2. Waveform - A shows input conditions such that the output is "L" level when enabled by the output control. 3. Waveform - B shows input conditions such that the output is "H" level when enabled by the output control. Rev.3.00 Aug. 18, 2004 page 6 of 8 HD74LVCZ244A Power up / down Characteristics 4.0 Ta = 25C Output enable = "L" 3.0 VOUT (V) 2.0 Disable area Enable area 1.0 0 0 1.0 2.0 VCC (V) 3.0 4.0 Rev.3.00 Aug. 18, 2004 page 7 of 8 HD74LVCZ244A Package Dimensions As of January, 2002 12.6 13 Max 20 Unit: mm 11 1 10 5.5 0.80 Max 2.20 Max *0.20 0.05 0.20 7.80 + 0.30 - 1.15 1.27 *0.40 0.06 0.10 0.10 0 - 8 0.70 0.20 0.15 0.12 M *Pd plating Package Code JEDEC JEITA Mass (reference value) FP-20DAV -- Conforms 0.31 g As of January, 2002 Unit: mm 6.50 6.80 Max 20 11 1 10 0.65 1.0 6.40 0.20 0.65 Max *0.20 0.05 0.13 M 4.40 *0.15 0.05 1.10 Max 0.10 0.07 +0.03 -0.04 0 - 8 0.50 0.10 *Pd plating Package Code JEDEC JEITA Mass (reference value) TTP-20DAV -- -- 0.07 g Rev.3.00 Aug. 18, 2004 page 8 of 8 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. 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