 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| CY26121 PacketClockTM Spread Spectrum Clock Generator Features Benefits Integrated phase-locked loop (PLL) Low jitter, high-accuracy outputs 3.3V operation 25-MHz input frequency 66.66-MHz or 33.33-MHz selectable output frequency (orig, -3,-11,-31) 33.33-MHz or 25-MHz selectable output frequency (-2,-21) High-performance PLL tailored for Spread Spectrum application Meets critical timing requirements in complex system designs Enables application compatibility Works with commonly available crystal or driven reference Downspread Spread Spectrum with 30-kHz nominal modulation frequency Table 1. Frequency Table for CLKA-D Part Number CY26121 CY26121-2 CY26121-3 CY26121-11 CY26121-21 CY26121-31 CLKSEL=0 66.66 MHz 33.33 MHz 66.66 MHz 66.66 MHz 33.33 MHz 66.66 MHz CLKSEL=1 33.33 25.00 33.33 33.33 25.00 33.33 Spread% -2.8% -2.8% -1.4% -2.8% -2.8% -1.4% Parallel Crystal Load 6 pF 6 pF 6 pF 15 pF 15 pF 15 pF Logic Block Diagram VDDL 25 MHz XIN XOUT OSC. PLL with Modulation Control CLKA CLKB CLKC SSON Flash Configuration OUTPUT MULTIPLEXER AND DIVIDERS CLKD VSSL CLKSEL REF VDD AVDD AVSS VSS Cypress Semiconductor Corporation Document #: 38-07350 Rev. *A * 198 Champion Court * San Jose, CA 95134-1709 * 408-943-2600 Revised May 22, 2008 [+] Feedback CY26121 Pin Configuration Figure 1. CY26121, 16-pin TSSOP XIN VDD AVDD CLKSEL AVSS VSSL CLKA CLKB 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 XOUT NC REF VSS CLKD VDDL SSON CLKC Table 2. Pin Definitions Name XIN VDD AVDD CLKSEL CLKSEL AVSS VSSL CLK(A:D) SSON VDDL VSS REF NC XOUT[1] 1 2 3 4 (orig., -11,-3,-31) 4 (-2, -21) 5 6 7,8,9,12 10 11 13 14 15 16 Pin Number Reference input Or Crystal Input 3.3V Voltage Supply 3.3V Analog Voltage 0 = 66.66MHz out, 1 = 33.33 MHz Out. Weak pull up. 0 = 33.33MHz out, 1 = 25 MHz Out. Weak pull up. Analog Ground CLK Ground Clock Outputs at VDDL level Spread Spectrum Enable pin 0 = SS off; 1 = SS on. Weak pull up. 3.3V Clock Voltage Supply Ground Reference Output at VDD Level No Connect Crystal Output Description Document #: 38-07350 Rev. *A Page 2 of 7 [+] Feedback CY26121 Maximum Ratings Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested. Supply Voltage (VDD, AVDD, VDDL) ................... -0.5 to +7.0V DC Input Voltage ......................................-0.5V to VDD + 0.5 Storage Temperature (Non-condensing) ....................................... -55C to +125C Junction Temperature ................................ -40C to +125C Data Retention at Tj = 125C ................................> 10 years Package Power Dissipation...................................... 350 mW Static Discharge Voltage.......................................... > 2000V (per MIL-STD-883, Method 3015) Recommended Operating Conditions Parameter VDD, AVDD VDDL TA TA CLOAD Fref Supply voltage Supply voltage for CLK (A-D) Ambient temperature (commercial temp. grade) Ambient Temperature (industrial temp grade) Max. output load capacitance Reference frequency 25 Description Min 3.135 3.135 0 -40 Typ. 3.30 3.30 Max 3.465 3.465 70 85 15 Unit V V C C pF MHz Crystal Specification[2] Parameter CRload CRload ESR Name Crystal load capacitance (original, -2, -3) Crystal load capacitance (-11,-21,-31) Equivalent series resistance Min Typ 6 15 50 Max Unit pF pF DC Electrical Specifications Parameter IOH IOL IIH IIL VIH VIL CIN[3] RUP[3] IDD Description Output High Current Output Low Current Input High Current Input Low Current Input High Voltage Input Low Voltage Input Capacitance Pull up resistor on input pins Supply Current Condition VOH = VDD - 0.5, VDD/VDDL=3.3V VOL = 0.5, VDD/VDDL = 3.3V VIH = VDD VIL = 0V CMOS levels CMOS levels Input pins excluding XIN VDD = 3.14 to 3.47V, measured at VIN = 0V AVDD/VDD/VDDL Current. 80 100 42 0.7 0.3 7 150 60 Min 12 12 Typ. 24 24 5 10 50 Max Unit mA mA A A VDD VDD pF k mA Notes 1. Float XOUT if XIN is externally driven. 2. A fundamental parallel resonant crystal must be used Document #: 38-07350 Rev. *A Page 3 of 7 [+] Feedback CY26121 AC Electrical Specifications [3] Parameter DC ER EF tj Description Output Duty Cycle Rising Edge Rate Falling Edge Rate RMS Clock Cycle-to-Cycle Jitter Condition Duty Cycle is defined in Figure 2, 50% of VDD Output Clock Edge Rate, Measured from 20% to 80% of VDD, CLOAD = 15 pF See Figure 3. Output Clock Edge Rate, Measured from 80% to 20% of VDD, CLOAD = 15 pF See Figure 3. RMS cycle-to-cycle jitter with Spread on. Measured at VDD/2. Min 45 0.8 0.8 Typ. 50 1.4 1.4 15 40 Max 55 Unit % V/ns V/ns ps Voltage and Timing Definitions Figure 2. Duty Cycle Definition t1 t2 VDD 50% of VDD Clock Output 0V Figure 3. ER = (0.6 x VDD) /t3, EF = (0.6 x VDD) /t4 t3 t4 V DD 80% of V DD 20% of V DD 0V Clock Output Note 3. Guaranteed by Characterization, not 100% tested. Document #: 38-07350 Rev. *A Page 4 of 7 [+] Feedback CY26121 Ordering Information Ordering Code CY26121ZC[4] CY26121ZCT[4] CY26121ZI[4] CY26121ZIT [4] Package Type 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel 16-pin TSSOP 16-pin TSSOP - Tape and Reel Operating Range Commercial, 0C to 70C Commercial, 0C to 70C Industrial, -40C to 85C Industrial, -40C to 85C Commercial, 0C to 70C Commercial, 0C to 70C Industrial, -40C to 85C Industrial, -40C to 85C Commercial, 0C to 70C Commercial, 0C to 70C Industrial, -40C to 85C Industrial, -40C to 85C Commercial, 0C to 70C Commercial, 0C to 70C Commercial, 0C to 70C Commercial, 0C to 70C Industrial, -40C to 85C Industrial, -40C to 85C Commercial, 0C to 70C Commercial, 0C to 70C Commercial, 0C to 70C Commercial, 0C to 70C Industrial, -40C to 85C Industrial, -40C to 85C Commercial, 0C to 70C Commercial, 0C to 70C Industrial, -40C to 85C Industrial, -40C to 85C Commercial, 0C to 70C Commercial, 0C to 70C Industrial, -40C to 85C Industrial, -40C to 85C CY26121ZC-2[4] CY26121ZC-2T CY26121ZI-2[4] CY26121ZI-2T [4] [4] CY26121ZC-3[4] CY26121ZC-3T[4] CY26121ZI-3[4] CY26121ZI-3T[4] CY26121ZC-11[4] CY26121ZC-11T[4] CY26121ZC-21[4] CY26121ZC-21T[4] CY26121ZI-21[4] CY26121ZI-21T[4] CY26121ZC-31[4] CY26121ZC-31T[4] CY26121KZC-21 CY26121KZC-21T CY26121KZI-21 CY26121KZI-21T Pb-Free CY26121ZXC-21[4] CY26121ZXC-21T[4] CY26121ZXI-21[4] CY26121ZXI-21T[4] CY26121KZXC-21 CY26121KZXC-21T CY26121KZXI-21 CY26121KZXI-21T Note 4. Not recommended for new designs. Document #: 38-07350 Rev. *A Page 5 of 7 [+] Feedback CY26121 Package Drawing and Dimensions Figure 4. 16-lead Thin Shrunk Small Outline Package (4.40 MM Body) Z16 51-85091-** Parameter A A1 A2 B C D E e H L a Inches Min - 0.002 0.031 0.007 0.004 0.193 0.169 0.244 0.018 0 Millimeters Max 0.047 0.006 0.041 0.012 0.008 0.201 0.177 0.260 0.030 8 Nom. - - 0.039 - - 0.197 0.173 0.026 BSC 0.252 0.024 - Min - 0.05 0.80 0.19 0.09 4.90 4.30 6.20 0.45 0 Nom. - - 1.00 - - 5.00 4.40 0.65 BSC 6.40 0.60 - Max. 1.20 0.15 1.05 0.30 0.20 5.10 4.50 6.60 0.75 8 Document #: 38-07350 Rev. *A Page 6 of 7 [+] Feedback CY26121 Document History Page Document Title: CY26121 PacketClockTM Spread Spectrum Clock Generator Document Number: 38-07350 REV. ** *A ECN NO. 121669 2440886 Issue Date 02/11/03 Orig. of Change CKN New Data Sheet Description of Change See ECN KVM/AESA Updated template. Added Note "Not recommended for new designs." Added part numbers CY26121ZXC-21, CY26121ZXC-21T, CY26121ZXI-21, and CY26121ZXI-21T in ordering information table. Added part numbers CY26121KZC-21, CY26121KZC-21T, CY26121KZI-21, and CY26121KZI-21T. Added part numbers CY26121KZXC-21, CY26121KZXC-21T, CY26121KZXI-21, and CY26121KZXI-21T. Removed part numbers CY26121ZI-11, CY26121ZI-11T, CY26121ZI-31 and CY26121ZI-31T Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer's representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Clocks & Buffers Wireless Memories Image Sensors psoc.cypress.com clocks.cypress.com wireless.cypress.com memory.cypress.com image.cypress.com PSoC Solutions General Low Power/Low Voltage Precision Analog LCD Drive CAN 2.0b USB psoc.cypress.com/solutions psoc.cypress.com/low-power psoc.cypress.com/precision-analog psoc.cypress.com/lcd-drive psoc.cypress.com/can psoc.cypress.com/usb (c) Cypress Semiconductor Corporation, 2003-2008. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress' product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 38-07350 Rev. *A Revised May 22, 2008 Page 7 of 7 All products and company names mentioned in this document may be the trademarks of their respective holders. [+] Feedback |
Price & Availability of CY26121ZXC-21T
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |