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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
March 2007
FSA2267 / FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Features
Typical 0.35 On Resistance (RON) for +2.7V supply FSA2267A features less than 10A ICCT current
Description
The FSA2267 and FSA2267A are Dual Single Pole Double Throw (SPDT) analog switches. The FSA2267 operates from a single 1.65V to 3.6V supply, while the FSA2267A operates from a single 2.3V to 4.3V supply. Each features an ultra-low On Resistance of 0.35 at a +2.7V supply and 25C. Both devices are fabricated with sub-micron CMOS technology to achieve fast switching speeds and designed for break-before-make operation. FSA2267A features very low quiescent current, even when the control voltage is lower than the VCC supply. This feature services the mobile handset applications very well, allowing for the direct interface with baseband processor general-purpose I/Os.
when S Input is lower than VCC
0.25 maximum RON flatness for +2.7V supply 1.6mm x 2.1mm 10-Lead MicroPakTM package Broad VCC operating range Low THD (0.02% typical for 32 load) High current handling capability (350mA continuous
current under 3.3V supply)
Applications
Cell phone PDA Portable media player
Ordering Information
Order Number FSA2267L10X FSA2267MUX FSA2267AL10X FSA2267AMUX Top Mark FC FSA 2267 FD FSA 2267A LeadFree Yes Yes Yes Yes Package Description 10-Lead MicroPak, 1.6 x 2.1mm, JEDEC MO-255 10-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide 10-Lead MicroPak, 1.6 x 2.1mm, JEDEC MO-255 10-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide Packing Method 5000 Units on Tape and Reel 3000 Units on Tape and Reel 5000 Units on Tape and Reel 4000 Units on Tape and Reel
Lead-Free package per JEDEC J-STD-020B. MicroPakTM is a trademark of Fairchild Semiconductor Corporation.
Figure 1. Application Diagram
(c) 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.3
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Analog Symbols
1B0 1B1 2B0 2B1 2A 2S 1A 1S
Figure 2. Analog Symbol
Connections Diagram
Vcc 1B0 1 10 9 1A
1B0
1B1 2B0 2B1 GND
1 2 3 4 5
10 9 8 7 6
Vcc 1A 1S 2S
1B1
2
8
1S
2B0
3
7
2S
2B1
4
2A
5
6
2A
Figure 3. 10-Lead MSOP
GND Figure 4. 10-Lead Micropak
Truth Table
Control Input(s) LOW Logic Level HIGH Logic Level Function B0 Connected to A B1 Connected to A
Pin Descriptions
Pin Names 1A, 2A, 1B0, 1B1, 2B0, 2B1 1S, 2S Function Data Ports Control Input
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.. Symbol VCC VS VIN IIK ISW ISWPEAK TSTG TJ TL ESD Supply Voltage Switch Voltage(1) Input Voltage(1) Input Diode Current(2) Switch Current Peak Switch Current (Pulsed at 1ms duration, <10% Duty Cycle) Storage Temperature Range Maximum Junction Temperature Lead Temperature (Soldering, 10 seconds) Human Body Model: FSA2267 Human Body Model: FSA2267A Charged Device Model: FSA2267/FSA2267A -65 Parameter Min. -0.5 -0.5 -0.5 -50 350 500 +150 +150 +260 7500 7000 1000 Max. +5.5 VCC + 0.5 VCC Unit V V V mA mA mA C C C V V V
Notes: 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. 2. Minimums define the acceptable range of current. Negative current should not exceed minimun negative values.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Supply Voltage VCC VIN VSW TA FSA2267 FSA2267A Control Input Voltage Switch Input Voltage Operating Temperature
(3)
Parameter
Min. 1.65 2.3 0 0 -40
Max. 3.6 4.3 VCC VCC +85
Unit V V V V C
Note: 3. Unused inputs must be held HIGH or LOW. They may not float.
(c) 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267ARev. 1.0.3 3
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
ESD Protection
ESD Performance of the FSA2267/FSA2267A
FSA2267 HBM all pins 7.0kV CDM all pins 1.0kV FSA267A
HBM all pins 7.5kV CDM all pins 1.0kV
Figure 5. Human Body ESD Test Model
Human Body Model
Figure 5 shows the schematic representation of the Human Body Model ESD event. Figure 6 is the ideal waveform representation of the Human Body Model. The device is tested to JEDEC: JESD22-A114 Human Body Model.
Charged Device Model
In manufacturing test and handling environments, a more useful model is the Charged Device Model and the FSA2267/FSA2267A has a very good ESD immunity to this model. The device is tested to JEDEC: JESD22C101 Charged Device Model. Figure 6. HBM Current Waveform
IEC 61000-4-2
The IEC 61000-4-2 standard covers ESD testing and performance of finished equipment and evaluates the equipment in its entirety for ESD immunity. Fairchild Semiconductor has evaluated this device using the IEC 6100-4-2 representative system model depicted in Figure 7. ESD values measured via the IEC 61000-4-2 evaluation method are influenced by the specific board layout, board size, and many other factors of the manufacturer's product application. Measured system ESD values cannot be guaranteed by Fairchild Semiconductor to exactly correlate to a manufacturer's in-house testing due to these application environment variables. Fairchild Semiconductor has been able to determine that, for ultra-portable applications, an enhanced ESD immunity, relative to the IEC 61000-4-2 specification, can be achieved with the inclusion of a 100-series resistor in the VCC supply path to the analog switch (see Figure 8). Typical improvements of between 3-6kV of ESD immunity (I/O to GND) have been measured with the inclusion of the resistor with the IEC 61000-4-2 representative model. For more information on ESD testing methodologies, please refer to: AN-6019 Fairchild Analog Switch Products ESD Test Methodology Overview http://www.fairchildsemi.com/an/AN/AN-6019.pdf.
Figure 7. IEC 61000-4-2 ESD Test Model
Analog Switch Supply Rail
100
1B0 1B1 2B0 2B1
VCC 1A 1S 2A 2S Ultra-portable Connector ESD Event
Additional ESD Test Conditions
For information regarding test methodologies and performance levels, please contact Fairchild Semiconductor.
Figure 8. ESD Immunity with 100 Resistor
(c) 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.3 4
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
FSA2267 DC Electrical Characteristics
All typical values are at 25C unless otherwise specified. VCC (V)
2.7 to 3.6 2.3 to 2.7 1.65 to 1.95 2.7 to 3.6
Symbol
Parameter
Conditions
TA= -40 to +85C Units Min. Typ. Max. Min. Max. TA = +25C
2.0 1.7 0.65 VCC 0.8 0.7 0.35 VCC -0.5 -5.0 -5.0 -5.0 -5.0 -5.0 -5.0 0.35 0.45 1.0 0.040 0.040 0.1 0.25 0.3 0.3 -100 100 -500 500 nA 5.0 5.0 5.0 5.0 5.0 5.0 -50 -50 -50 -50 -50 -50 0.5 50 50 50 50 50 50 0.60 0.75 3.9 0.075 0.080 nA nA A V V
VIH
Input Voltage High
VIL IIN
Input Voltage Low
2.3 to 2.7 1.65 to 1.95
Control Input Leakage
VIN = 0V to VCC nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating
1.65 to 3.6 3.6 2.7 1.95 3.6 2.7 1.95 2.7 2.3 1.65 2.7
INO(OFF), Off-Leakage Current of INC(OFF) Port nB0 and nB1
nA = 0.3V, 2.4V, nB0 or nB1 = 0.3V, 2.4V or floating nA = 0.3V, 1.65V, nB0 or nB1 = 0.3V, 1.65V or floating nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating
IA(ON)
On Leakage Current of Port 1A and 2A
nA = 0.3V, 2.4V, nB0 or nB1 = 0.3V, 2.4V or floating nA = 0.3V, 1.65V, nB0 or nB1 = 0.3V, 1.65V or floating IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 2.0V, 2.7V
RON
Switch On Resistance(4) See Figure 9
IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 1.6V, 2.3V IOUT = 100mA, nB0 or nB1 = 0.8V
RON
On Resistance Matching Between Channels(5)
IOUT = 100mA, nB0 or nB1 = 0.7V
2.3 1.65 2.7
RFLAT(ON) On Resistance Flatness(6) ICC
IOUT = 100mA, nB0 or nB1 = 0V to VCC
2.3 1.65 3.6
Quiescent Supply Current VIN = 0V or VCC, IOUT = 0A
Notes: 4. On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch. 5. RON = RONmax - RONmin measured at identical VCC, temperature, and voltage. 6. Flatness is defined as the difference between the maximum and minimum value of RON over the specified range of conditions.
(c) 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.3 5
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
FSA2267A DC Electrical Characteristics
All typical values are at 25C unless otherwise specified. VCC (V)
3.6 to 4.3
Symbol
Parameter
Conditions
TA= -40 to +85C Units Min. Typ. Max. Min. Max. TA = +25C
1.7 1.5 1.4 0.7 0.5 0.4 -0.5 -10.0 -5.0 -5.0 -20.0 -5.0 -5.0 0.35 0.35 0.35 1.0 0.04 0.04 0.04 0.1 0.15 0.15 0.15 0.3 -100 80 7.0 0.5 100 10.0 2.0 -500 500 15.0 7.0 nA A 0.25 0.25 0.25 0.075 0.075 0.075 10.0 5.0 5.0 20.0 5.0 5.0 -100 -50 -50 -200 -50 -50 0.5 100 50 50 200 50 50 0.6 0.6 0.6 nA nA A V V
VIH
Input Voltage High
2.7 to 3.6 2.3 to 2.7 3.6 to 4.3
VIL IIN
Input Voltage Low Control Input Leakage VIN = 0V to VCC nA = 0.3V, 4.0V, nB0 or nB1 = 4.0V, 0.3V or floating
2.7 to 3.6 2.3 to 2.7 2.3 to 4.3 4.3 3.6 2.7 4.3 3.6 2.7 4.3 3.0 2.7 1.65 4.3 3.0 2.7 1.65 4.3 3.0 2.7 1.65 4.3 4.3
INO(OFF), Off-Leakage Current of INC(OFF) Port nB0 and nB1
nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating nA = 0.3V, 2.4V, nB0 or nB1 = 0.3V, 2.4V or floating nA = 0.3V, 4.0V, nB0 or nB1 = 0.3V, 4.0V or floating
IA(ON)
On Leakage Current of Port 1A and 2A
nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 3.6V, 4.3V
RON
Switch On Resistance(7)
IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 2.3V, 3.0V IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 2.0V, 2.7V IOUT = 100mA, nB0 or nB1 = 0.8V
RON
On Resistance Matching Between Channels(8) See Figure 10
IOUT = 100mA, nB0 or nB1 = 0.7V
RFLAT(ON)
On Resistance Flatness(9)
IOUT = 100mA, nB0 or nB1 = 0V to VCC
ICC ICCT
Quiescent Supply Current VIN = 0V or VCC, IOUT = 0A Increase in ICC per Input VIN = 1.8V VIN = 2.6V
Notes: 7. On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch. 8. RON = RONmax - RONmin measured at identical VCC, temperature, and voltage. 9. Flatness is defined as the difference between the maximum and minimum value of RON over the specified range of conditions.
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
FSA2267 AC Electrical Characteristics
All typical values are at 25C unless otherwise specified. Symbol Parameter Conditions VCC (V)
2.7 to 3.6
TA = +25C
TA= -40 to Figure +85C Units Number
42.0 40.0 38.0 18.0 20.0 25.0 2.0 2.0 2.0 ns Figure 12 ns Figure 11 ns Figure 11
Min. Typ. Max. Min. Max.
30.0 29.0 27.0 13.0 14.0 15.0 17.0 15.0 12.0 9.0 9.0 9.0 -80.0 -80.0 -80.0 -80.0 -80.0 -80.0 45.0 0.024 0.015 0.35 % Figure 17 MHz Figure 16 dB Figure 13 dB Figure 13 pC Figure 14 38.0 37.0 35.0 16.0 18.0 21.0
tON
Turn-On Time
nB0 or nB1 = 1.5V, RL = 50, CL = 35 pF
2.3 to 2.7 1.65 to 1.95 2.7 to 3.6 2.3 to 2.7 1.65 to 1.95 2.7 to 3.6 2.3 to 2.7 1.65 to 1.95 2.7 to 3.6 2.3 to 2.7 1.65 to 1.95 2.7 to 3.6
tOFF
Turn-Off Time
nB0 or nB1 = 1.5V, RL = 50, CL = 35 pF
tBBM
Break-BeforeMake Time
nB0 or nB1 = 1.5V, RL = 50, CL = 35 pF CL = 100 pF, VGEN = 0V, RGEN = 0
Q
Charge Injection
CL = 100 pF, VGEN = 0V, RGEN = 0 CL = 100 pF, VGEN = 0V, RGEN = 0
OIRR
Off Isolation
f = 100kHz, RL = 50, CL = 5pF (Stray)
2.3 to 2.7 1.65 to 1.95 2.7 to 3.6
Xtalk BW
Crosstalk -3db Bandwidth
f = 100kHz, RL = 50, CL = 5pF (Stray) RL = 50 RL = 32, VIN = 2Vpk-pk, f = 20Hz to 20kHz
2.3 to 2.7 1.65 to 1.95 1.65 to 3.6 2.7 to 3.6 2.3 to 2.7 1.65 to 1.95
THD
Total Harmonic Distortion
RL = 32, VIN = 1.5Vpk-pk, f = 20Hz to 20kHz RL = 32, VIN = 1.2Vpk-pk, f = 20Hz to 20kHz
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
FSA2267A AC Electrical Characteristics
All typical value are at 25C unless otherwise specified. Symbol Parameter Conditions VCC (V)
3.6 to 4.3
TA = +25C
TA= -40 to +85C Units
48.0 57.0 ns
Min. Typ. Max. Min. Max.
37.0 37.0 60 570 15.0 16.0 50.0 500 8.0 8.0 8.0 24.0 24.0 24.0 -75.0 -75.0 -75.0 -70.0 -70.0 -70.0 45.0 0.02 0.02 0.02 MHz dB dB 2.0 2.0 2.0 ns 23.0 30.0 25.0 30.0 ns 46.0 50.0 nB0 or nB1 = 1.5V, RL = 50, CL = 35pF 2.7 to 3.6 2.3 to 2.7 1.65 3.6 to 4.3 2.7 to 3.6 2.3 to 2.7 1.65 3.6 to 4.3
Figure Number
tON
Turn-On Time
Figure 11
tOFF
Turn-Off Time
nB0 or nB1 = 1.5V, RL = 50, CL = 35pF
Figure 11
tBBM
Break-BeforeMake Time
nB0 or nB1 = 1.5V, RL = 50, CL = 35pF CL = 100 pF, VGEN = 0V, RGEN = 0
2.7 to 3.6 2.3 to 2.7 3.6 to 4.3 2.7 to 3.6 2.3 to 2.7 3.6 to 4.3
Figure 12
Q
Charge Injection
CL = 100 pF, VGEN = 0V, RGEN = 0 CL = 100 pF, VGEN = 0V, RGEN = 0
pC
Figure 14
OIRR
Off Isolation
f = 100kHz, RL = 50, CL = 5pF (Stray)
2.7 to 3.6 2.3 to 2.7 3.6 to 4.3
Figure 13
Xtalk BW
Crosstalk -3db Bandwidth
f = 100kHz, RL = 50, CL = 5pF (Stray) RL = 50 RL = 32, VIN = 2Vpk-pk, f = 20Hz to 20kHz
2.7 to 3.6 2.3 to 2.7 2.3 to 4.3 3.6 to 4.3 2.7 to 3.6 2.3 to 2.7
Figure 13 Figure 16
THD
Total Harmonic Distortion
RL = 32, VIN = 1.5Vpk-pk, f = 20Hz to 20kHz RL = 32, VIN = 1.2Vpk-pk, f = 20Hz to 20kHz
%
Figure 17
Capacitance
Symbol CIN COFF CON Parameter
Control Pin Input Capacitance B Port Off Capacitance A Port On Capacitance
Conditions
f = 1Mhz f = 1Mhz f = 1Mhz
VCC (V)
0.0 3.3 3.3
TA = +25C
TA= -40 to +85C Units pF pF pF
Min. Typ. Max. Min. Max.
1.5 30.0 126
Figure Number
Figure 15 Figure 15 Figure 15
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Typical Characteristics
Figure 9. RON at 2.7V for FSA2267
Figure 10. RON at 2.7V for FSA2267A
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
AC Loading and Waveforms
CL includes Fixture and Stray Capacitance.
Logic input waveforms are inverted for switches with opposite logic sense.
Figure 11. Turn-On/Turn-Off Timing
CL Includes Fixture and Stray Capacitance Figure 12. Break-Before-Make Timing
Figure 13. Off Isolation and Crosstalk
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
AC Loading and Waveforms (Continued)
Q = (DVOUT)(CL) Figure 14. Charge Injection
Figure 15. On/Off Capacitance Measurement Setup
Figure 16. Bandwidth
Figure 17. Harmonic Distortion
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Tape and Reel Specification
Tape Format for MicroPakTM 10
Dimensions are in millimeters (inches) unless otherwise noted. Package Designator L10X Tape Section Leader (Start End) Carrier Trailer (Hub End) Cavity Number 125 (typical) 5000 75 (typical) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed
Reel Dimensions
Tape Size (8mm)
A 7.0 (177.8)
B 0.059 (1.50)
C 0.512
D 0.795
N 2.165
W1 0.331 + 0.059/-0.000 (8.40 + 1.50/-0.00)
W2 0.567 (14.40)
W3 W1 + 0.078/-0.039 (W1 + 2.00/-1.00)
(13.00) (20.20) (55.00)
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 18. Pb-Free, 10-Lead, MicroPakTM, 1.6 x 2.1mm
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Tape and Reel Specification
Tape Dimensions for MSOP 10
Dimensions are in millimeters unless otherwise specified.
Reel Dimensions for MSOP
Dimensions are in inches (millimeters) unless otherwise specified.
Tape Size
(12mm)
A
13 (330)
B
0.059 (1.5)
C
0.512 (13)
D
0.795 (20.2)
N
7.008 (178)
W1
0.448 (12.4)
W2
0.724 (18.4)
W3
0.468-0.606 (11.9 -15.4)
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 19. Pb-Free, 10-Lead, Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
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