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CS8127
CS8127
5V Linear Controller/Driver
Description Features
AR CH IV FO E R N
RE CO MM EN DE D
Block Diagram
The CS8127 contains all the necessary control circuitry to implement a 5V linear regulator. An external pass device is used to produce superior performance compared to conventional monolithic regulators. The CS8127 with a TIP42 PNP transistor typically provides a 100mV dropout voltage at 500mA, increasing to 350mV at 3A. Quiescent current at 500mA is only 5mA. Monolithic regulators cannot approach these figures because their power transistors do not provide the high beta and excellent saturation characteristics at high currents. The CS8127 is compatible with a wide variety of external transistors, allowing flexibility for thermal, space, and cost management.
The CS8127 includes thermal shutdown, externally programmable current limit, and over-voltage shutdown, making it suitable for use in automotive and switching regulator post regulator applications. An optional external RC filter added to the CS8127 supply lead provides EMC hardening in addition to the on-chip EMC hardening. The SENSE
An active microprocessor RESET function is included on-chip with externally programmable delay time. During power-up, or after detection of any error in the regulated output, the RESET lead will remain in the low state for the duration of the delay. Types of errors include short circuit, low input voltage, overvoltage shutdown, thermal shutdown, or others that cause the output to become unregulated. This function is independent of the input voltage and will function correctly with an output voltage as low as 1V. Hysteresis is included in both the reset and delay comparators for noise immunity and to prevent oscillations. A latching discharge circuit is used to discharge the delay capacitor, even when triggered by a relatively short fault condition. This circuit improves upon the commonly used SCR structure by providing improved noise immunity and full capacitor discharge (0.2V typ).
EW
lead allows remote sensing of the output voltage for improved regulation.
DE SI GN
s Externally Set Delay for Reset s 60V Peak Transient Capability s Internal Thermal Overload Protection s 3% Output Accuracy s Active RESET s Noise Immunity s On Chip EMC Hardening Protection Incorporated s Externally Set Current Limit
Package Options
8 Lead SO Narrow
Pwr Gnd
NO T
IC Power Gnd
Ref Gnd VIN
IC Reference Gnd
VIN 1 Sense 2
Sense PULLUP
Thermal Shutdown Error Amp Over Voltage Shutdown
8 7 6 5
VOUT Pwr Gnd Pullup Ref Gnd
DE VI CE
Delay 3 RESET 4
PREREGULATOR
50A VOUT
Regulated Supply for Circuit Bias
10A Delay Current
-
Bandgap Reference 1.25V
Delay
+ Latching Discharge QS R + Delay Comparator Reset Comparator
+
RESET
+ Vdis
ON Semiconductor 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 N. American Technical Support: 800-282-9855 Web Site: www.cherry-semi.com
December, 2001 - Rev. 3
1
CS8127
Absolute Maximum Ratings Power Dissipation.............................................................................................................................................Internally Limited Input Voltage ..................................................................................................................................................................-0.3V, 26V Transient Input Voltage ............................................................................................................................................................60V Output Current ...............................................................................................................................................Externally Limited ESD Susceptibility (Human Body Model)..............................................................................................................................2kV Junction Temperature ............................................................................................................................................-45C to 150C Storage Temperature..............................................................................................................................................-55C to 150C Lead Temperature Soldering Wave Solder (through hole styles only) .....................................................................................10 sec. max, 260C peak Reflow (SMD styles only) ......................................................................................60 sec. max above 183C, 230C peak
Electrical Characteristics: TA = -40C to +125C, TJ = -40C to +150C, VIN = 6 to 26V, IOUT = 5 to 500mA, Per Test Circuit
(unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
s Output Stage (VOUT) Output Voltage Dropout Voltage Supply Current IQ
4.85 IOUT = 500mA, note 1 IOUT 10mA IOUT 500mA IOUT 3A, note 1 6V VIN 26V, IOUT = 5mA 5V IOUT 500mA, VIN = 14V f = 120Hz, 7V VIN 17V, IOUT = 350mA VSENSE = 6V VSENSE = 0V
Line Regulation Load Regulation Ripple Rejection VIN Overvoltage Shutdown Drive Current
60 32 25
5.00 0.1 4 5 30 12 2 70
5.15 0.6 8 15 50 50
V V mA
mV mV dB V A mA
40 50 250
s RESET and Delay Functions Delay Charge Current, ICharge RESET Threshold VRTH VRTL RESET Hysteresis VRH Delay Threshold VDTC VDTD Delay Hysteresis, VDH RESET Output Voltage Low RESET Output Leakage Current Delay Capacitor (Vdis) Discharge Voltage Delay Time
VDelay = 2V VOUT Increasing VOUT Decreasing Charge Discharge VDTC - VDTD 1V < VOUT < VRTL, 3k to VOUT VD > VDTC , VOUT > VRTH Discharge Latched "ON", VOUT > VRTH CDelay = 0.1F, note 2
5 4.65 4.50 150 3.25 2.80 200
10 4.90 4.70 200 3.50 3.00 400
15 VOUT - 0.10 VOUT - 0.15 250 3.75 3.40 800 0.4 10 0.5 48
A V V mV V V mV V A V ms
0.2 16 32
Note 1: Dependent on characteristics of external transistor.
Note 2: Delay Time =
CDelay x VDTC ICharge
= CDelay x 3.5 x 10 5 (Typical)
2
CS8127
Package Lead Description
PACKAGE LEAD # LEAD SYMBOL FUNCTION
8 Lead SO Narrow 1 2 3 4 5 6 7 8 VIN Sense Delay RESET Ref Gnd Pullup Pwr Gnd VOUT Unregulated supply voltage to the IC. Kelvin connection which allows remote sensing of output voltage for improved regulation. Timing CAP for RESET function. CMOS/TTL compatible open collector output. RESET goes low whenever VOUT drops below 6% of it's typical value. Ground connection. Internal pullup transistor for VOUT. Also Sense pin for overvoltage shutdown. Ground connection. Supplies base current to PNP pass transistor or threshold voltage to FET pass transistor.
Typical Performance Characteristics (per Test Circuit)
Temperature Performance of VOUT
5.02 5.01 5 VOUT (V) 4.99 4.98 4.97 4.96 4.95 -40 -20 0 20 40 60 80 100120 140150 JUNCTION TEMPERATURE (C)
RESET Voltage vs. Output Current
2000 1800
RESET OUTPUT VOLTAGE (mV)
Dropout Voltage vs. IOUT
400 350 DROPOUT VOLTAGE (mV) 300 250 200 150 100 50 0 0 0.5 1.0 1.5 2.0 IOUT (Amps) 2.5 3.0 ROUT = 47
IOUT=500mA 5.00V @ 25C
Vin = 5V
25C
1600 1400 1200 1000 800 600 400 200 0 0 5 10 15 20 25 30 35 40
RESET OUTPUT CURRENT (mA)
VOUT vs. VIN
5.50 5.00 4.50 4.00 VOUT (V) 3.50 3.00 2.50 2.00 1.50 1.00 0.50 0.00 0 1 2 3 4 5 6 VIN (V) 7 8 9 10
IQ vs. VIN
100.00 90.00 80.00 70.00 IQ (mA)
IQ (mA) 40 25C
IQ vs. IOUT
35 30 VIN=14V 25 20 15 10 5
IOUT = 3A ROUT = 47
IOUT=0.5A
IOUT= 3A
60.00 50.00 40.00 30.00 20.00 10.00 0.00 0 1 2 3 4 IOUT = 0.5A ROUT = 330 5 6 VIN (V) 7 8 9 10
0 0 0.5 1.0 1.5 2.0 2.5 3.0
IOUT (Amps)
Line Regulation vs. IOUT
20 LINE REGULATION (mV) 15 10
20 LOAD REGULATION (mV)
Load Regulation vs. IOUT
80
25C VIN=14V 18 16 14 12 10 8 6 4 2
Ripple Rejection
25C 70 VIN / VOUT(dB) 60 50 40 30 20 10 IOUT=250mA
25C 6VVIN - 26V
5 0
0
0
0.5
1.0 1.5 2.0 IOUT(Amps)
2.5
3.0
0
0.5
1.0
1.5 IOUT(Amps)
2.0
2.5
3.0
0 10
100
1K
10K
100K
1M
10M
100M
FREQUENCY (Hz)
3
CS8127
RESET Circuit Waveform
(1) = No Delay Capacitor (2) = With Delay Capacitor (3) = Max: RESET Voltage (1.0V)
VOUT VRTH VRTL
VRH
RESET
(3) VRL
(1)
(2)
Delay
VDH VDTC VDTD
TD
(2)
VDIS
RESET Circuit Functional Description The CS8127 RESET function is very precise, has hysteresis on both the RESET and Delay comparators, a latching Delay capacitor discharge circuit, and operation down to 1V. The reset circuit output is an open collector type with ON and OFF parameters as specified. The reset output NPN transistor is controlled by the Low Voltage Inhibit and Reset Delay circuits (see Block Diagram).
Low Voltage Inhibit Circuit RESET Delay Circuit
This circuit monitors output voltage, and when output voltage is below VRTL, causes the reset output transistor to be in the ON (saturation) state. When the output voltage is above VRTH, this circuit permits the reset output transistor to go into the OFF state if allowed by the reset Delay circuit.
This circuit provides a programmable (by external capacitor) delay on the RESET output lead. The Delay lead provides source current to the external delay capacitor only when the Low Voltage Inhibit circuit indicates that output voltage is above VRTH . Otherwise, the Delay lead sinks current to ground (used to discharge the Delay capacitor). The discharge current is latched ON when the output voltage falls below VRTL. The Delay capacitor is fully discharged anytime the output voltage falls out of regulation, even for a short period of time. This feature ensures a controlled RESET pulse is generated following the detection of an error condition. The circuit allows the RESET output transistor to go to the OFF (open) state only when the voltage on the Delay lead is higher than VDTC .
4
CS8127
Test Circuit
VIN
TIP42B VOUT (5V) RIN 220 CO 10F ROUT 220 CIN 0.022F
VIN
VOUT
Sense
Pwr Gnd
CS8127
Delay CDelay 0.022F RRST 4.7 k RESET Ref Gnd Gnd PULLUP
RESET
Application Information
Overvoltage Shutdown
may be increased or decreased for a particular application. ROUT Resistor - This resistor controls the drive current available to the pass transistor. It also determines regulator start-up current and short circuit current limit. For bipolar pass transistors, it can be selected by use of the following formulae: VIN(min) - 1V x Q1*** ROUT = IOUT(max) ***Q1 = Pass transistor minimum @ maximum output current. Typical start-up current and current limit can be calculated as follows: 4V + 5mA ISTART ROUT ILimit VIN - 1V x Q1 @ Current Limit ROUT
The CS8127 includes an over voltage shutdown circuit. Shutdown typically occurs at 36V.
Thermal Shutdown
The CS8127 includes a thermal shutdown circuit that disables the output when junction temperature exceeds approximately 180C. This is a self-protection feature designed to protect the CS8127. The thermal shutdown circuit does not monitor the temperature of the pass transistor, which will probably be much hotter. To optimize thermal shutdown, board design should minimize the difference in temperature of the CS8127 and the pass device.
External Component Selection
External Pass Device - Select a pass device that will deliver the desired output current, withstand the maximum expected input voltage, and dissipate the resulting power. The CS8127 is compatible with a wide variety of Bipolar and FET pass transistors. Output Capacitor - An output capacitor is required for stability in most applications. Though a 10F capacitor should be sufficient, regulator stability is dependent on the characteristics of the pass transistor. Capacitor effective series resistance (ESR) also factors in system stability. Some bench work may be required to determine the capacitor characteristics required for use in a particular application. BIAS Resistor - This resistor provides bias current for the CS8127 output stage, and prevents the pass device from "leaking". It also speeds the turn-off of the pass device during an overvoltage transient. For proper operation over temperature, the recommended value is 560, although it 5
For example, if the minimum input voltage is 6V, maximum output current is 1Amp, and minimum transistor @ 1Amp is 60, then ROUT can be calculated as follows: ROUT IStart 6V - 1V x 60 = 300 1Amp 4V 300 + 5mA = 18.3mA
With VIN = 14V, and a pass transistor of 40 @ current limit: 14V - 1V x 40 = 1.7Amps ILimit 300
CS8127
Package Specification
PACKAGE DIMENSIONS IN mm (INCHES) PACKAGE THERMAL DATA
D Lead Count 8 Lead SO Narrow Metric Max Min 5.00 4.80 English Max Min .197 .189
Thermal Data RJC RJA typ typ
Plastic DIP (N); 300 mil wide
3.68 (.145) 2.92 (.115)
.356 (.014) .203 (.008)
RE CO MM EN DE D
AR CH IV FO E R N
8.26 (.325) 7.62 (.300) 1.77 (.070) 1.14 (.045) 0.39 (.015) MIN. .558 (.022) .356 (.014) D
7.11 (.280) 6.10 (.240)
REF: JEDEC MS-001
Surface Mount Narrow Body (D); 150 mil wide
4.00 (.157) 3.80 (.150)
NO T
DE VI CE
0.51 (.020) 0.33 (.013)
1.57 (.062) 1.37 (.054) 1.27 (.050) 0.40 (.016) 0.25 (.010) 0.19 (.008) D
REF: JEDEC MS-012
Ordering Information
Part Number CS8127YD8 CS8127YDR8
Description 8 Lead SO Narrow 8 Lead SO Narrow (tape & reel) 6
ON Semiconductor and the ON Logo are trademarks of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor reserves the right to make changes without further notice to any products herein. For additional information and the latest available information, please contact your local ON Semiconductor representative.
(c) Semiconductor Components Industries, LLC, 2000
EW
2.54 (.100) BSC
Some 8 and 16 lead packages may have 1/2 lead at the end of the package. All specs are the same.
1.27 (.050) BSC
1.75 (.069) MAX
DE SI GN
6.20 (.244) 5.80 (.228) 0.25 (0.10) 0.10 (.004)
8 Lead SO Narrow 45 165
C/W C/W
Notes
Notes

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