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 SC23M28
8K-BIT MEMORY CARD IC
DESCRIPTION
SC23M28 is a smart card module utilizing CMOS EEPROM technology. 1024 bytes main memory with write-protect function and programmable security code. And the periphery interface is compatible with ISO7816 agreement (synchronous propagation).
FEATURES
* 1024 X 8 bit EEPROM * Byte addressing * Permanent write-protect for each byte * 1024 X 1bit memory protection * Serial three buses interface * More than 100,000 times write endurance cycles * Data retention of more than 10 years * Contact definition and serial interface comply to ISO7816 specification (synchronous propagation) * 2Byte programmable security code PSC(Programmable Security Code), and the data can be changed only when pass the PSC authentication * Compatible with SLE4428 Device SC23M28A SC23M28B SC23M28C SC23M28D Package P8-13 MCTS012106 P8-12 FPC-1
ORDERING INFORMATION
APPLICATIONS
* Used for various IC cards.
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BLOCK DIAGRAM
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SC23M28
ABSOLUTE MAXIMUM RATINGS
Characteristic Power Supply Voltage Input Voltage Storage Temperature Power Dissipation Symbol VCC VI Tstg Ptot Ratings -0.3~6 -0.3~6 -40~125 60 Unit V V C mW
DC ELECTRICAL CHARACTERISTICS (VCC=5V, Tamb =25C)
Characteristics Supply Voltage Supply Current H Input Voltage(I/O, CLK, RST) L Input Voltage(I/O, CLK, RST) H Input Current (I/O, CLK, RST) L Output Current (VL=0.4V, Opendrain) H Leakage Open-drain) Input Capacitance Operating Frequency Current (VH=VCC, Symbol VCC ICC VIH VIL IH IOL IOH Ci F Condition Min. 2.4 -3.0 0 -0.5 ---Typ. -2 --3 1.0 --20 Max. 5.5 10 VCC 1.2 5 -1 10 -Unit V mA V V A mA A pF kHz
AC ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, VCC=5.0V, Tamb=25C, and testing frequency is 20kHz) Characteristics
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Symbol tRE tH tL tW tE td1 td3 td4 td5 td2 tR tF
Condition
Min. 9 10 10 5 5 4 4 4 4 6 ---
Typ. -------------
Max. ----------1 1
Unit s s s ms ms s s s s s s s
CLK (High Level) CLK (Low Level) Write Time Erase Time Set Up Time(D/CLK) Set Up Time (CLK/RST) Set Up Time (RST/CLK) Hold Time(D/CLK) Delay Time(CLK/D) Rise Time(I/O, CLK, RST) Fall Time(I/O, CLK, RST)
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SC23M28
PIN CONFIGURATION
VCC 1 RST 2 CLK 3 NC 4 (Contact of the card)
8 GND 7 NC 6 I/O 5 NC
PIN DESCRIPTIONS
Pin No. 1 2 3 4 5 6 7 8 Symbol VCC RST CLK NC GND NC I/O NC I/O -I I ---I/O -Power supply voltage is 5V Reset signal Clock signal No connect Ground No connect Data bus(open-drain output) No connect Description
FUNCTION DESCRIPTIONS
SC23M28 provides 1024x8 bits EEPROM memory units with write-protect for each bit. Except PSC (Programmable Security Code) memory unit, all units are readable. The unit can be erased and written before the www..com write-protect is active, or else the unit is only readable. The bit with write-protection can be programmed only once, and cannot be erased. The chip has one 8-bit error register which provides 8 times continuous PSC authentication, after 8 times the chip cannot be erased and written. 1. Reset and reset acknowledge The chip enters the power on reset state when it is power on, and this state will end by the reset signal. The reset signal begins when RST changed from " to " , and end when CLK changed from " to" . The reset 0" 1" 0" 1" signal can stop any active instruction. Read operation must be carried out first after power on reset, then the other operations. The reset acknowledge complies to ISO7816-3 synchronous propagation. The address counter is set to " 0" automatically and will send the first data to the I/O port. As the clock signal, the address data can be read serially. The details refer to the figure 1.
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SC23M28
Figure 1 Reset and reset acknowledge
VCC RST CLK I/O 1 2 1 3 2 3 31 32 31 32
RST CLK
td4 td4
td2
tH
tL td5
I/O
2. Instruction format The chip inputs and outputs the data by I/O ports, and the RST signal will control the direction of the data; RST=1, I/O is instruction input; RST=0, I/O is data output. Instruction table Byte1 S0 S1 S2 S3 S4 S5 10 11 00 00 01 01 10 10 0011 0011 0011 1100 1100 0011 1100 1100 11 253 254 255 Address bit 8, 9 Address bit 0-7 A8 A9 Byte2 A0-A7 Byte3 D0-D7 Input data Input data Comparative data Invalid Invalid Bit mask code PSC code 1 PSC code 2 Operation With bit-protect erasure or write Without bit-protect erasure or write Write protect bit with data comparison With bit-protect read Without bit-protect read Write error counter Authentication PSC code 1 Authentication PSC code 2
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Figure 2 Command input time sequence
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SC23M28
3. Instruction description 3.1 Erase/write operation 1) Erase or write with protect bit The write protect bit is active as long as you write the data, and this unit is only readable. 2) Erase or write without protect bit. Write the data but not set the protect bit, so this unit can still be erased and written. 3) Write protect bit with data comparison When the command is executed, it will compare the data and the content of the destination address unit, if the contents are the same, then write " to the corresponding address unit; if the contents are 0" different, do nothing. The chip can execute 3 erase and write operation: Erase and write (Last 203 clock cycles) (Figure3); Only Write: used for some bits of 1 byte data change from " to " (Last 103 clock cycles)(Figure4); 1" 0" Only Erase: data is FF (Last 103 clock cycles) (Figure4). If error occurs when erase or write data, I/O port will change from high level to low level at the raising edge of the third clock cycle. (Figure5). Figure3 Erase and write time sequence
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Figure4 Only Erase or only Write time sequence
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SC23M28
Figure5 Time sequence of erase or write error
3.2
Read operation 1) Read with protect bit This command will read the content of the destination address unit and the corresponding protect bit together, 9 bits in total (Figure6). After 9 clock cycles, the address increases by 1 automatically. 2) Read without protect bit This command will only read the content of the destination address unit Figure6 cycles, the address increases by 1 automatically. When RST changes from " to" , read operation stops. 0" 1" Figure6 Read operation time sequence . After 8 clock
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3.3
Password authentication
The SC23M28 is only readable without PSC authentication. The content of PSC cannot be read, if you try to read PSC, you will get " . 00" The authentication steps are as follows: --Write one to not written error counter (EC) bit and the EC address is" 1021" ; --Input the first byte data of PSC code, and the address is" 1022" ; --Input the second byte data of PSC code, and the address is " 1023" ; --If pass the authentication, EC can be erased.
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SC23M28
Figure7 Time sequence of write error counter and PSC code authentication
If the initial value of the error counter is " , the error counter cannot be written, and also cannot go through 00" the password authentication. After the PSC authentication, I/O port will change from " to " at the raising edge 1" 0" of the second clock no matter pass the authentication or not. When RST changes from " to" , I/O port returns 0" 1" to " . The flow chart is as follows: 1" Figure8 PSC authentication flow chart
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SC23M28
PACKAGE OUTLINE MCTS012106 UNIT: mm
P8-13
UNIT: mm
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HANGZHOU SILAN MICROELECTRONICS CO.,LTD
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SC23M28
PACKAGE OUTLINE P8-12 UNIT: mm
12.600.10 0.46 0.53
FPC-1
UNIT: mm
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HANGZHOU SILAN MICROELECTRONICS CO.,LTD
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SC23M28
HANDLING MOS DEVICES:
Electrostatic charges can exist in many things. All of our MOS devices are internally protected against electrostatic discharge but they can be damaged if the following precautions are not taken: * Persons at a work bench should be earthed via a wrist strap. * Equipment cases should be earthed. * All tools used during assembly, including soldering tools and solder baths, must be earthed. * MOS devices should be packed for dispatch in antistatic/conductive containers.
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HANGZHOU SILAN MICROELECTRONICS CO.,LTD
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2006.07.21 Page 10 of 10


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