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PW-82520/21N
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TM
3-PHASE DC MOTOR TORQUE CONTROLLER
FEATURES
* Self-Contained 3-Phase Motor Controller * Operates as Current or Voltage Controller * 1, 3 or 10 Amp Output Current * 1.5% Linearity * 3% Current Regulating Accuracy * User-Programmable Compensation * 10 KHz - 100 KHz PWM Frequency * Complementary Four-Quadrant Operation * Holding Torque through Zero Current * Cycle-by-Cycle Current Limit * Optional Radiation Tolerance to 100Krads (see PW-82520R data sheet)
DESCRIPTION
The PW-82520N (100Vdc) and PW-82521N (200Vdc) are high performance current regulating torque loop controllers designed to accurately regulate the current in the motor windings of 3-phase brushless DC and brush DC motors. The PW-82520/21N is a completely self-contained motor controller that converts an analog input command signal into motor current and uses the signals from Hall-effect sensors in the motor to commutate the current in the motor windings. The motor current is internally sensed and processed into an analog signal. The current signal is summed together with the command signal to produce an error signal that controls the pulse width modulation (PWM) duty cycle of the output, thus controlling the motor current. The PW-82520/21N performance can be tuned by utilizing the internal error amplifier and the external Proportional/Integral (PI) regulator network components to match motor characteristics.
APPLICATIONS
The PW-82520/21N is ideal for applications requiring current regulation and/or holding torque at zero input command. System applications include: pumps, actuators, antenna position, environmental control, reaction/momentum wheel systems using brushless and brush motors, flight surface control on aircrafts for horizontal stabilizers and flaps, missile fin control, fuel and Hydraulic pumps, radar, and counter measure systems. Packaged in a small DIP-style hybrid package, the PW-82520/21N is well suited for applications with limited printed circuit board area.
FOR MORE INFORMATION CONTACT:
Data Device Corporation 105 Wilbur Place Bohemia, New York 11716 631-567-5600 Fax: 631-567-7358 www.ddc-web.com
Technical Support: 1-800-DDC-5757 ext. 7677 or 7381
(c)
2001 Data Device Corporation
Data Device Corporation www.ddc-web.com 2 PW-82520/21N A-11/01-1000
5.0V 10K 10K 10K HALL A HALL B HALL C COMMAND OUT 50K COMMAND IN COMMAND IN + 50K
+
HA HB HC
100
TACH OUT
COMMUTATION LOGIC
TACH CIRCUIT
100
DIR OUT
50K
-
100 DRIVE A PHASE A
VBUS+ A
50K COMMAND GND SYNC IN VDR VCC VCC RTN VDD SUPPLY GND VEE CASE GND ENABLE
PWM IN
COMMAND BUFFER
PHASE A
+15V +5V +5V RTN + +
VBUS+ B
PWM LOGIC CIRCUITRY
DRIVE B
PHASE B
PHASE B
VBUS+ C CASE 5.0V 10.0K DRIVE C PHASE C
PHASE C
PWM OUT ERROR AMP OUT
470pF RS+
ERROR AMP IN CURRENT MONITOR OUT
+
100 ERROR AMPLIFIER
+
CURRENT AMP
Rsense VBUS-
FIGURE 1. PW-82520/21N BLOCK DIAGRAM
TABLE 1. PW-82520/21N ABSOLUTE MAXIMUM RATINGS (TC = +25C UNLESS OTHERWISE SPECIFIED)
PARAMETER BUS VOLTAGE PW-82520N / (PW-82521N) +15V SUPPLY +5V TO +15V +5V SUPPLY -5V TO -15V VBUS- TO GND Voltage Differential CONTINUOUS OUTPUT CURRENT PW-82520N1 PW-82520N3 PW-82520N0 / PW-82521N0 PEAK OUTPUT CURRENT (PULSED t = 50S) PW-82520N1 PW-82520N3 PW-82520N0 / PW-82521N0 COMMAND INPUT + COMMAND INPUT LOGIC INPUTS: ENABLE, SYNC IN, HA, HB, HC, ERROR AMP IN, PWM IN TACH OUT / DIR OUT TACH OUT / DIR OUT SYMBOL VBUS+ A,B,C VDR VDD VCC VEE VGNDDIF IOC IOC IOC IOP IOP IOP VCMD + VCMD VIH VOH IOL VALUE 100.0 (200.0) +17.5 +17.5 +5.5 -17.5 0-VDD +1.0 1 3 10 3 8 18 15.0 15.0 7.0 40 20 UNITS Vdc Vdc Vdc Vdc Vdc Vdc A A A A A A Vdc Vdc Vdc Vdc mA
TABLE 2. PW-82520/21N SPECIFICATIONS (UNLESS OTHERWISE SPECIFIED, VBUS = 28VDC, VDR = +15V, VCC = +5V, VDD = +5V, VEE = -5V, TC = 25C, LL = 500 H, PWM IN = PWM OUT AT 1/2 FREE RUNNING FREQUENCY)
PARAMETER OUTPUT (PW-82520N1) Output Current Continuous Output Current Pulsed Current Limit Current Offset Output On-Resistance Output Conductor Resistance Diode Forward Voltage Drop OUTPUT (PW-82520N3) Output Current Continuous Output Current Pulsed Current Limit Current Offset Output On-Resistance Output Conductor Resistance Diode Forward Voltage Drop OUTPUT (PW-82520N0) Output Current Continuous Output Current Pulsed Current Limit Current Offset Output On-Resistance Output Conductor Resistance Diode Forward Voltage Drop OUTPUT PW-82521N0 Output Current Continuous Output Current Pulsed Current Limit Current Offset Output On-Resistance Output Conductor Resistance Diode Forward Voltage Drop SYMBOL IOC IOP ICL IOFFSET RON RC VF IOC IOP ICL IOFFSET RON RC VF IOC IOP ICL IOFFSET RON RC VF IOC IOP ICL IOFFSET RON RC VF TEST CONDITIONS MIN TYP MAX 1 3 1.8 +20 0.055 0.075 0.080 1.5 3 8 4.5 +20 0.055 0.075 0.080 1.8 10 18 15.4 +100 0.055 0.075 0.080 1.9 10 18 15.4 +0.3 0.100 0.140 0.080 1.9 UNITS A A A mA V A A A mA V A A A mA V A A A A V
Pulse Width 50sec FIGURE 7, VCMD = 0V +25C +85C +85C ID = 1A 1.3 -20 1.5
Pulse Width 50sec FIGURE 7, VCMD = 0V +25C +85C +85C ID = 3A 3.4 -20 4
Pulse Width 50sec FIGURE 7, VCMD = 0V +25C +85C +85C ID = 10A 12.0 -100 14.0 0
Pulse Width 50sec FIGURE 7, VCMD = 0V +25C +85C +85C ID = 10A 12.0 -0.3 14.0 0
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PW-82520/21N A-11/01-1000
TABLE 2. PW-82520/21N SPECIFICATIONS (CONTINUED) (UNLESS OTHERWISE SPECIFIED, VBUS = 28VDC, VDR = +15V, VCC = +5V, VDD = +5V, VEE = -5V, TC = 25C, LL = 500 H, PWM IN = PWM OUT AT 1/2 FREE RUNNING FREQUENCY)
PARAMETER PROPAGATION DELAY SYMBOL Td (on) Td (off) SWITCHING CHARACTERISTICS PW-82520N1 Upper Drive Turn-on Rise Time Turn-off Fall Time Lower Drive Turn-on Rise Time Turn-off Fall Time PW-82520N3 Upper Drive Turn-on Rise Time Turn-off Fall Time Lower Drive Turn-on Rise Time Turn-off Fall Time PW-82520N0/21N0 Upper Drive Turn-on Rise Time Turn-off Fall Time Lower Drive Turn-on Rise Time Turn-off Fall Time CURRENT MONITOR AMP (ALL MODELS) Current Monitor Offset Output Current Output Resistance CURRENT MONITOR AMP (PW-82520N1) Current Monitor Gain CURRENT MONITOR AMP (PW-82520N3) Current Monitor Gain CURRENT MONITOR AMP (PW-82520/82521N0) Current Monitor Gain CURRENT COMMAND Transconductance Ratio PW-82520N1 PW-82520N3 PW-82520/82521N0 Non-Linearity Temperature Coefficient of G PW-82520N1/N3 PW-82520/82521N0 VBUS+ SUPPLY Nominal Operating Voltage PW-82520N1/N3/N0 PW-82521N0 +15V SUPPLY Voltage Current Current N1 N3 N0 FIGURE 7 G Io = 1A Io = 3A Io = 10A 0.24 0.73 2.37 -1.5 0.25 0.75 2.50 0.038 0.05 VNOM 18 36 VDR IDR IDR IDR IDR +13.5 ENABLE = high ENABLE = low ENABLE = low ENABLE = low 28 56 +15.0 100 9 18 30 70 140 +16.5 15 25 45 Vdc Vdc Vdc A mA mA mA 0.26 0.76 2.63 +1.5 A/V A/V A/V % FSR %FSR/C %FSR/C TEST CONDITIONS From 1.5V on ENABLE to 90% of VBUS From 3.5V on ENABLE to 10% of VBUS MIN TYP 40 20 MAX UNITS s s
tr tf tr tf tr tf tr tf tr tf tr tf
Rise Time = 90% to 10% of VBUS Fall Time = 10% to 90% of VBUS IO = 1A Rise Time = 90% to 10% of VBUS Fall Time = 10% to 90% of VBUS IO = 3A Rise Time = 90% to 10% of VBUS Fall Time = 10% to 90% of VBUS IO = 10A
75 30 50 60 150 150 160 130 200 200 200 200
ns ns ns ns ns ns ns ns ns ns ns ns
IoC = 0A ROUT
-10 -10
+10 +10 1
mVdc mA
4
V/A
1.33
V/A
0.40
V/A
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PW-82520/21N A-11/01-1000
TABLE 2. PW-82520/21N SPECIFICATIONS (CONTINUED) (UNLESS OTHERWISE SPECIFIED, VBUS = 28VDC, VDR = +15V, VCC = +5V, VDD = +5V, VEE = -5V, TC = 25C, LL = 500 H, PWM IN = PWM OUT AT 1/2 FREE RUNNING FREQUENCY)
PARAMETER +5V SUPPLY Voltage Current +5V TO +15V SUPPLY Voltage Current -5V TO -15V SUPPLY Voltage Current SYNC IN Low High Duty Cycle SYNC range as % of free-run frequency PWM IN + Peak Voltage - Peak Voltage Frequency Linearity Error Duty Cycle PWM OUT Free Run Frequency PW-82520N1/N3 PW-82520/82521N0 Stability, Temperature HALL SIGNALS (HA, HB, HC) Logic 0 Logic 1 ENABLE Enabled Disabled TACH OUT/ DIR OUT Current Sink ISOLATION Case to Ground COMMAND IN+/Differential Input Input Offset Input Offset Drift COMMAND OUT Internal Voltage Clamp Slew Rate Settling Time THERMAL (ALL MODELS) Junction Temperature Case Operating Temperature Case Storage Temperature THERMAL (PW-82520N1) Thermal Resistance Junction-Case Case-Air THERMAL (PW-82520N3) Thermal Resistance Junction-Case Case-Air THERMAL (PW-82520N0/82521N0) Thermal Resistance Junction-Case Case-Air WEIGHT N0, N1, N3 SYMBOL VCC ICC VDD IDD VEE IEE VIL VIH D.C. +15V +15V -15V -15V TEST CONDITIONS MIN +4.5 TYP +5.0 10 MAX +5.5 15 +16.5 50 -4.5 50 1.5 3.5 49 100 Vcc = 4.5 - 5.5V 2.3 -2.7 10 -2 49 50 51 120 2.7 -2.3 110 +2 51 UNITS Vdc mA Vdc mA Vdc mA Vdc Vdc % % V V KHz % %
+4.5 35 -16.5 30
Vp+ VpfPWM LIN D.C. fPWM
2.5 -2.5 50
95 47.5 Full Temp Range
100 50 0.5
105 52.5 2.0 1.5
KHz KHz % Vdc Vdc Vdc Vdc Vdc M
VIL VIH VIL VIH VOL Open Collector @ 1mA 500 Vdc HIPOT VCMD
3.5 1.5 3.5 0.7 10 -4 2 +4 800 1.2
Vdc V V/C Vdc V/s s to 0.1% C C C
VCLAMP VO = 0.2 to 4.5V Tj TC TCS j-c c-a
-5 3 1.4
+5
-55 -65
+150 +125 +150
25 10
C/W C/W
j-c c-a j-c c-a
9 10
C/W C/W
4 5.5 1.7 (48)
C/W C/W oz (g)
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5
PW-82520/21N A-11/01-1000
INTRODUCTION
The PW-82520/21N is a 3-phase high performance current control (torque loop) motor controller hybrid, which provides true four-quadrant control through zero current (Refer to FIGURE 1. PW-82520/21N Block Diagram). Its high Pulse Width Modulation (PWM) switching frequency makes it suitable for operation with low inductance motors. The PW-82520/21N hybrids can accept single-ended or differential mode command signals. The current gain can be easily programmed to match the end user system requirements. The addition of an externally wired compensation network provides the user with optimum control of a wide range of loads. The PW-82520/21N uses single point current sense technology with an internal non-inductive hybrid sense resistor (Rsense), which yields a highly linear current output over the full -55C to +125C military temperature range. The output current non-linearity is less than 1.5% and the total error due to all the factors such as offset, initial component accuracy, etc., is maintained well below 3% of the full-scale rated output current. The Hall sensor interface for current commutation has built-in decoder logic that ignores illegal codes and ensures that there is no cross conduction. The Hall sensor inputs are internally pulled up to +5V and they can be driven from open-collector outputs. The PWM frequency can be programmed externally by adding a capacitor from PWM OUT to PWM GND. Multiple PW-82520N's can be synchronized in two ways: 1) by using one device as a master and connecting its PWM OUT pin to the PWM IN of all the other slave devices, or 2) by applying a master SYNC pulse from an external source to the PWM IN pins on all devices to be synchronized. The ENABLE input signal provides quick start and shutdown of the internal PWM. In addition, built-in under-voltage fault protection turns off the output in case of improper power supply voltages. The hybrid features dual current limiting functions. The input command amplifier output is limited to 5V, limiting the motor current under normal operation. In addition, there is a cycle-bycycle current limit which kicks in to protect the hybrid as well as the load (see TABLE 2 for ICL limits).
The complementary drive design produces a 50% PWM duty cycle in response to a zero current command. During a zero current command the benefit of a complementary 4 quadrant drive over a standard 4 quadrant is as follows:
COMPLEMENTARY (FIGURES 2, 3A) Complementary Drives produce a bi-directional holding torque by driving a balanced bi-polar current into the motor that has an average value of zero.
During the first quarter of the PWM cycle (starting at time zero on FIGURE 3A) the MOSFET's, PHASE A UPPER (UA) and PHASE B LOWER (LB) (FIGURE 2), are turned on. This allows current flow from phase A to phase B to increase to +Imax. During the second quarter of the PWM cycle, the first pair of transistors, UA and LB are turned off and a second pair PHASE A LOWER (LA) & PHASE B UPPER (UB) (FIGURE 2) are turned on. This allows the current in phase A & B from the previous quarter cycle to decrease from Imax to zero. The average current during the first two-quarter cycles is positive. During the third quarter of the PWM cycle, the second pair of switches UB & LA remain on allowing current to flow, in the negative direction, from phase B to phase A and increase to -Imax as shown in FIGURE 3A. During the fourth quarter of the PWM cycle, the first pair of switches UA & LB are turned on while the second pair of switches UB & LA are turned off, to allow the current in the inductor to decrease to zero. The average current in the phases for the third and fourth quarter cycles is negative. The positive current (phase A to B) in the first two-quarter cycles produces a torque in one direction and the negative current (phase B to A) in the third and fourth quarter cycles produces a torque in the opposite direction. The average of the two opposing torques results in a net zero or holding torque.
VBUS
BASIC OPERATION AND ADVANTAGES
The PW-82520/21N uses a complementary four-quadrant drive technique to control current in the load. The complementary drive has the following advantages over standard drives: 1. Holding torque in the motor at zero commanded current 2. Linear current control through zero
Rsense ON PHASE A UPPER PHASE A + PHASE B PHASE B OFF UPPER
OFF
PHASE A LOWER
PHASE C
PHASE B LOWER
ON
3. No deadband at zero
FIGURE 2. COMPLEMENTARY 4-QUADRANT DRIVE FIRST HALF OF PWM CYCLE
Data Device Corporation www.ddc-web.com 6 PW-82520/21N A-11/01-1000
Phase Current
0
Phase Current
0
ON
ON
UA
OFF ON
UA
OFF ON
Switches
OFF ON
Switches
LA
LA
OFF ON
UB
OFF ON
UB
OFF ON
LB
OFF
LB
OFF
1
2
3
4
1
2
3
4
1
2
3
4
Time (quarter phase)
Time (half phase)
Drive Switches and Phase Current vs. Time
Drive Switches and Phase Current vs. Time
FIGURE 3A. COMPLEMENTARY 4-QUADRANT DRIVE PWM CYCLE
NON-COMPLEMENTARY (FIGURES 2, 3B) Non-Complementary Drives produce a unidirectional torque by applying a unipolar current into the motor that has an average positive value as shown in FIGURE 3B.
During the first half of the PWM cycle the MOSFET's, Phase A upper and Phase B lower, are turned on to provide current into the phases. During the second half of the PWM cycle the drive is in dead time, all transistors are turned off, the motor current continues to flow in the same direction through the device diodes, until it decays to zero. Current flowing in to and out of the phases produces a net torque in one direction.
FIGURE 3B. STANDARD 4-QUADRANT DRIVE PWM CYCLE
quadrant drive. The PW-82520N use of average current mode control simplifies the control loop by eliminating the need for slope compensation and by eliminating the pole created by the motor inductance. Slope compensation and the pole created by the motor inductance are two limitations normally associated with implementing standard 4 quadrant current mode controls.
FUNCTIONAL AND PIN DESCRIPTIONS
VBUS+A, VBUS+B, VBUS+C
The VBUS+ supply is the power source for the motor phases. For the PW-82520 (PW-82521) series device, the normal operating voltage is 28Vdc (100Vdc) and may vary from +18 (+36) to +70Vdc (+140Vdc) with respect to VBUS-. The power-stage MOSFETs in the hybrid have an absolute maximum VBUS+ supply voltage rating of 100V (200V). The user must supply sufficient external capacitance or circuitry to prevent the bus supply from exceeding the maximum recommended voltages at the hybrid power terminals under any condition.
MAJOR ADVANTAGES
The advantage of a complementary 4-quadrant drive over a standard 4-quadrant drive is that it provides holding torque during a zero current command. The motor current at 50% duty cycle is simply the magnetizing current of the motor winding. Using the complementary 4-quadrant technique allows the motor direction to be defined by the duty cycle. Relative to a given switch pair, i.e. Phase A upper and Phase B lower, a duty cycle greater than 50% will result in a clockwise rotation whereas a duty cycle less than 50% will result in a counter clockwise rotation. Therefore, with the use of average current mode control, direction can be controlled without the use of a direction bit and the current can be controlled through zero in a very precise and linear fashion. The PW-82520N contains all the circuitry required to close an average current mode control loop around a complementary 4Data Device Corporation www.ddc-web.com 7
POWER-ON SEQUENCE (IMPORTANT!)
The VBUS+ should be applied at least 50ms after VDD and VEE to allow the internal analog circuitry to stabilize. If this is not possible, the hybrid must be powered up in the "disabled" mode.
VBUSThis is the high current ground return for VBUS+. This point must be closely connected to SUPPLY GND for proper operation of the current loop.
VCC (+5V SUPPLY) AND VCC RTN
These inputs are used to power the digital circuitry of the hybrid.
PW-82520/21N A-11/01-1000
VDR (+15V SUPPLY)
This input is used to power the gate driver circuitry for the output MOSFETs. There is no power consumption from VDR when the hybrid is disabled.
"1" (or HIGH ) is defined by an input greater than 3.5Vdc or an open circuit to the controller; Logic "0"(or LOW) is defined as any Hall voltage input less than 1.5Vdc. Internal to the PW82520/21N are 10K pull-up resistors tied to +5Vdc on each Hall input. The PW-82520/21N will alternately operate with Hall phasing of 60 electrical spacing. If 60 commutation is used, then the output of HC must be inverted as shown in FIGURES 4 and 5. FIGURE 4 illustrates the Hall sensor outputs along with the corresponding back emf voltage they are in phase with.
VDD (+5V TO +15V SUPPLY), VEE (-5V TO -15V SUPPLY)
These inputs can vary from 5V to 15V as long as they are symmetrical. VDD and VEE are used to power the small signal analog circuitry of the hybrid. Please note that using 5V supply will reduce the quiescent power consumption by approximately 60% when compared to 15V operation.
SUPPLY GND
This pin is the return for the VDR, VEE, VDD supplies. The phase current sensing technique of the PW-82520N/21N requires that VBUS- and SUPPLY GND (see FIGURES 6 and 7) be connected together externally (see VBUS- supply).
CASE GND
This pin is internally connected to the hybrid case. In some applications the user may want to tie this to Ground for EMI considerations.
HALL INPUT SIGNAL CONDITIONING When the motor is located more than two feet away from the PW82520/21N controller or is in a noisy electrical environment the Hall inputs require filtering from noise. It is recommended to use a 1K resistor in series with the Hall signal and a 2000 pF capacitor from the Hall input pin to the Hall supply ground pin as shown in FIGURES 6 and 7.
PHASE A, B, C
These are the power drive outputs to the motor and switch between VBUS+ Input and VBUS- Input or become high impedance (see TABLE 3).
HALL A, B, C SIGNALS
These are logic signals from the motor Hall-effect sensors. They use a phasing convention referred to as 120 degree spacing; that is, the output of HA is in phase with motor back EMF voltage VAB, HB is in phase VBC, and HC is in phase with VCA. Logic
HALL-EFFECT SENSOR PHASING vs. MOTOR BACK EMF FOR CW ROTATION (120 Commutations) 300
BACK EMF OF MOTOR ROTATING CW
HC
HA
0
VAB
60
120
VBC
180
240
VCA
300 360/0
60
120 S
N
120
HB
CW
REMOTE POSITION SENSOR (HALL) SPACING FOR 120 DEGREE COMMUTATION
In Phase with VAB
HA HB HC
60
HA
120
In Phase with VBC In Phase with VCA In Phase with VAC (60)
HC
S
N
HC
60
HB
HC
REMOTE POSITION SENSOR (HALL) SPACING FOR 60 DEGREE COMMUTATION
FIGURE 4. HALL PHASING
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FIGURE 5. HALL SENSOR SPACING
PW-82520/21N A-11/01-1000
OPTIONAL CASE GND PWM IN PWM OUT Cext VDR VCC VDD +15V SUPPLY +5V SUPPLY VBUS+ C VBUS+ A
PW-82520/21N
VBUS+ B
{ { {
+28V
+15V
C1
PHASE A PHASE B PHASE C MOTOR BLDC
+
C6
+5V to +15V SUPPLY GND
GND
+
C7 VEE COMMAND SIGNAL -5V to -15V COMMAND GND COMMAND IN COMMAND IN + ERROR AMP OUT R1 COMMAND OUT R5 CURRENT MONITOR OUT ENABLE 10K CURRENT MONITOR OUT ENABLE Sync In 10K ERROR AMP INPUT
+
+
{ PHASE B { PHASE C { VBUS- {
PHASE A R4 HALL A 1K HALL B 1K R3
GND
HA HB R2 1K HC
+
HALL C C4 2000pF C3 2000pF C5 2000pF
FIGURE 6. VOLTAGE CONTROL HOOK-UP
OPTIONAL CASE GND PWM IN Cext PWM OUT VBUS+ A
PW-82520/21N
+15V SUPPLY +5V SUPPLY VBUS+ C VBUS+ B
VDR VCC VDD +
C6 GND
{ { { { { { {
+28V
+15V
C1
PHASE A PHASE B PHASE C MOTOR BLDC
+5V to +15V PHASE A SUPPLY GND
+
C7
-5V to -15V COMMAND GND COMMAND IN -
PHASE B PHASE C
VEE
+
+
COMMAND SIGNAL R2A C1 4700pF R1 10K, 0.5% 10K R2B
COMMAND IN + ERROR AMP OUT
VBUS-
GND R4
HA R3 1K R2 1K HB HC
HALL A COMMAND OUT ERROR AMP INPUT CURRENT MONITOR OUT
+
1K
HALL B HALL C
R7 1MEG ENABLE
10K, 0.5% ENABLE 10K 100 TACH 10K 100
C4 2000pF
C3 2000pF
C5 2000pF
TACH OUT
DIR OUT DIR
Sync In
FIGURE 7. TORQUE (CURRENT) CONTROL HOOK-UP
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ENABLE
The ENABLE input is an active low (L) logic signal that enables or disables the internal PWM. In the disable mode (H), the PWM is shut down and the outputs, Phase A, Phase B and Phase C, are in an "off" state and no voltage is applied to the motor.
PWM IN
The PWM comparator inputs are used to control the PWM pulse width. PWM out or an external triangular waveform is connected to this pin.
TACH OUT
The TACH OUT provides a tachometer signal that is a square wave with a frequency relative to motor speed and is derived from the three Hall inputs HA, HB, HC. The tachometer circuitry combines these three signals into a single pulse train as a 50%duty-cycle pulse. There are three pulses that occur every 360 electrical degree. The number of pulses per motor revolution is formulated below:
Pr = P x 3 (e.g., 6 pulses/revolution for a 4 pole motor) 2 The motor RPM is: Tf x 60 RPM = Pr where: P = number of motor poles Pr = number of pulses per revolution Tf = Tach output frequency cycles/second
WARNING: Never apply power to the hybrid without connecting either PWM OUT or an external triangular waveform to PWM IN! Failure to do so may result in one or more outputs latching on.
PWM FREQUENCY The PWM frequency from the PW-82520N1/N3 (PW82520N0/21N0) PWM OUT pin will free-run at a frequency of 100KHz 5KHz (50KHz 2.5KHz). The PWM frequency is user adjustable from 100KHz (50KHz) down to 10KHz through the addition of an external capacitor. The PWM triangular waveform generated internally is brought out to the PWM OUT pin. This output, or an external triangular waveform generated by the user, may be connected to PWM IN on the hybrid.
PWM OUT
This is the output of the internally generated PWM triangle waveform. It is normally connected to PWM IN. The frequency of this output may be lowered by connecting an NPO capacitor (CEXT) between PWM OUT and COMMAND GND. The PWM frequency is determined by the following formula: PW-82520/21N0: 16.5E-6 330pF + CEXTpF
DIR OUT
The DIR OUT indicates the direction the motor is rotating, clockwise (CW) for a HI (open collector), or counterclockwise (CCW), indicated as a logic LOW (ground).
PW-82520N1/N3: 33.0E-6 330pF + CEXTpF
CURRENT MONITOR OUT
This is a bipolar analog output voltage representative of motor current. The CURRENT MONITOR OUT will have the same scaling as the COMMAND IN inputs.
ERROR AMP INPUT, ERROR AMP OUT SYNC IN
This input, as shown in FIGURE 9, is used to synchronize the PWM switching frequency with an external clocking device. The PWM switching frequency can be pulled to up-to 20% faster than its free running frequency. These are the input and output pins for the error amplifier and are used for compensation.
EXTERNAL PI REGULATOR 10.0 K 4700 pF
SYNC PERIOD
R1 1 MEG R7 ERROR AMP INPUT ERROR AMP OUT 100 C1
5V
470 pf
R2B 10.0 K
R2A 10.0 K COMMAND OUT CURRENT MONITOR OUT
O
0V 50% DUTY CYCLE
+
FIGURE 8. STANDARD PI CURRENT LOOP
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FIGURE 9. SYNC INPUT SIGNAL
PW-82520/21N A-11/01-1000
COMPENSATION The PI regulator in the PW-82520/21N can be tuned to a specific load for optimum performance. FIGURE 8 shows the standard current loop configuration and tuning components. By adjusting R1, R2 and C1, the amplifier can be tuned. The value of R1, C1 will vary, depending on the loop bandwidth requirement.
duty cycle range of the output voltage is limited to approximately 5-95% in both current and voltage modes.
COMMAND GND This pin is used when the command buffer is used single-ended and the COMMAND IN- or COMMAND IN+ are tied to COMMAND GND. TRANSCONDUCTANCE RATIO AND OFFSET When the PW-82520/21N is used in the current mode, the command inputs (COMMAND IN+ and COMMAND IN-) are designed such that 4Vdc on either input, with the other input connected to ground will result in full-scale current (Continuous Output Current: (Ioc) - Refer to TABLE 2) flow into the load. The dc current transfer ratio accuracy is 5% of the rated current including offset and initial component accuracy. The initial output dc current offset with both COMMAND IN+ and COMMAND IN- tied to the ground will be as shown in TABLE 2 (Ioffset) when measured using a load of 0.5mH and 1.0W at ambient room temperature with standard current loop compensation (see FIGURE 8). The winding phase current error shall be within the cumulative limits of the transconductance ratio error and the offset error.
COMMAND IN+, COMMAND IN- , COMMAND GROUND, COMMAND OUT
These are the connection pins for the command amplifier. The command amplifier has a differential input that operates from a 4Vdc full-scale analog current command. The command amplifier output signal is internally limited to approximately 5Vdc to prevent the amplifier from saturating. The input impedance of the command amplifier is 50K. The PW-82520/21N can be used either as a current or voltage mode controller. When used as a torque controller (current mode), the input command signal is processed through the command buffer, which is internally limited to 5Vdc. The output of the buffer (command out) is summed with the current monitor output into the error amplifier. External compensation is used on the error amp, so the response time can be adjusted to meet the application. When used in the voltage mode, the voltage command signal is applied to the command amplifier, to control the voltage applied to the motor. The command amplifier output is coupled into the error amplifier. The error amplifier directly varies the PWM duty cycle to control the voltage applied to the motor phase. The nominal PWM frequency in the voltage mode is 50% with zero volts applied to the command input. The PWM duty cycle is varied by the voltage applied to the command input according to the transfer function, 12% per volt applied to the command input. The
RS+
Rs+ is the high side of the sense resistor used for non-scaled test purposes only. Accuracy is not a guaranteed parameter.
OUTPUT CURRENT
Output current derating as a function of the hybrid case temperature is provided in FIGURES 11 and 12. The hybrid contains internal pulse by pulse current limit circuitry to limit the output current during fault conditions (See TABLE 2). Current Limit accuracy is +10/-15%. WARNING! The PW-82520/(21)N does not have short circuit protection. The PW-82520/(21)N must see a minimum of 100H (400H) inductive load phase-to-phase or enough phase-to-phase line-to-line resistance to limit the continuous output current to less than Ioc at all times. Operation into a short or a condition that requires excessive output current will damage the hybrid.
TABLE 3. COMMUTATION TRUTH TABLE
INPUTS ENABLE L L L L L L L L L L L L H DIR* CW CW CW CW CW CW CCW CCW CCW CCW CCW CCW HA 1 1 0 0 0 1 1 0 0 0 1 1 HB 0 1 1 1 0 0 0 0 1 1 1 0 HC 0 0 0 1 1 1 1 1 1 0 0 0 PHASE A H H Z L L Z Z H H Z L L Z OUTPUTS PHASE B L Z H H Z L H Z L L Z H Z PHASE C Z L L Z H H L L Z H H Z Z
TABLE 4. HALL INPUTS FOR H-BRIDGE CONTROLLER
INPUTS ENABLE L L H COMMAND IN Positive Negative HA 1 1 1 HB 1 1 1 HC 0 0 0 PH A H L Z OUTPUTS PH B Z Z Z PH C L H Z
1=Logic Voltage >3.5Vdc, 0=Logic voltage < 1.5Vdc * DIR is based on the convention shown in FIGURE 4. Actual motor set up might be different.
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PW-82520/21N A-11/01-1000
THERMAL OPERATION
It is necessary that the base (heat sink surface - FIGURE 13) of the PW-82520/21N be mounted to a heat sink. This heat sink shall have the capacity to dissipate heat generated by the hybrid at all levels of current output, up to the peak limit, while maintaining the case temperature limit as per FIGURE 11.
All other connections are as shown in either FIGURES 6 or 7 depending on voltage or current mode operation. The Hall inputs are wired per TABLE 4. A positive input command will result in positive current to the motor out of Phase A.
OPTIONAL FEATURES
EXTERNAL SENSING RESISTOR
An external sense resistor can be connected to replace the internal resistor if this option is required. Please contact factory for this option.
BRUSH MOTOR OPERATION
The PW-82520/21N can also be used as a brush motor controller for current or voltage control in an H-Bridge configuration. The PW82520/21N would be connected as shown in FIGURE 10.
VBUS+ A VBUS+ B
{ { VBUS+ C {
+28V
+ C1
PHASE A
{ PHASE B { PHASE C {
PHASE A VBUS-
PHASE C
GND
HALL A HALL B HALL C
+5V +5V
FIGURE 10. BRUSH MOTOR HOOK-UP
PW-82520N0
12 10 8 Amps 6 4 2 0 -50 -25 0 25 50 75 Case Temperature (C) (VBUS+ = 28V) 100 125
PW-82521N0
12 10 8 Amps 6 4 2 0 -50 -25 0 25 50 75 Case Temperature (C) (VBUS+ = 100V) (HSW = 20KHz) 100 125
FIGURE 11. OUTPUT CURRENT FOR CONTINUOUS COMMUTATION (ELECTRICAL > 600RPM, PWM = 50KHZ)
Data Device Corporation www.ddc-web.com 12 PW-82520/21N A-11/01-1000
PW-82520/21N POWER DISSIPATION
There are two major contributors to power dissipation in the motor driver: conduction losses, and switching losses.
2. SWITCHING LOSSES (PS)
Ps = [ VBUS ( IOA (ts1) + IOB (ts2) ) fo] / 2 Ps = [ 28 ( 3 (200 x10-9) + 7 (400 x10-9) ) 25x103] / 2 Ps = 1.19 Watts
An example calculation is shown below:
VBUS = +28 V (Bus Voltage)
TRANSISTOR POWER DISSIPATION ( PQ )
IOA = 3 A, IOB = 7 A (see FIGURE 12) fPWM = 25 KHz (switching frequency) ton = 36 s, T = 40 s (90% duty cycle) (see FIGURE 12) Ron = 0.055 (on-resistance, see TABLE 2) PC = (4.87)2 x (0.080) Rc = 0.080 (conductor resistance, see TABLE 2) PC = 1.90 Watts ts1 = tf = 200 ns, ts2 = 2tr = 400 ns (see TABLE 2, FIGURE 12)
(IOBIOA + (IOB 3 IOA) ) ( 2
Pq = PT + PS Pq = 1.30 + 1.19 = 2.49 Watts
OUTPUT CONDUCTOR DISSIPATION
PC = (Imotor rms)2 x (Rc)
Imotor rms = Imotor rms =
ton T
)
3. TRANSISTOR POWER DISSIPATION FOR CONTINUOUS COMMUTATION (ELECTRICAL > 600RPM)
Pqc = Pq (0.33) Pqc = (2.49) x (0.33)
(7 x 3 + (7 3 3) ) (
2
36 40
)
Imotor rms= 4.87 amps
Pqc = 0.82 Watts
1. TRANSISTOR CONDUCTION LOSSES (PT)
PT = (Imotor rms)2 x (Ron) PT = (4.87)2 x (0.055) PT = 1.30 Watts
4. TOTAL HYBRID POWER DISSIPATION
PTOTAL = (Pq + Pc) x 2 PTOTAL = (2.49 + 1.90) x 2 PTOTAL = 8.78 Watts
T t on
VBUS
I OB I OA
IO ts1 t s2
FIGURE 12. OUTPUT CHARACTERISTICS
Data Device Corporation www.ddc-web.com 13 PW-82520/21N A-11/01-1000
TABLE 5. PW-82520/21N PIN FUNCTIONS
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 FUNCTION VBUS+ A VBUS+ A PHASE A PHASE A VBUS+ B VBUS+ B PHASE B PHASE B VBUSVBUSRS+ RS+ VBUS+ C VBUS+ C PHASE C PHASE C PIN FUNCTION
41
1.400 0.005 (35.58 0.127) 1.150 0.005 (29.21 0.127)
PIN NO.1 CONTRASTING COLOR BEAD
1
41 TACH OUT 40 DIR OUT 39 HALL C 38 HALL B 37 HALL A 36 ENABLE 35 VCC 34 VCC RTN 33 VDR 32 SYNC IN 31 VDD 30 SUPPLY GND 29 VEE 28 N/C 27 N/C 26 CURRENT MONITOR OUT
Heat Sink Surface 0.018 0.002 DIA TYP (0.457 0.051) 0.030 0.002 DIA TYP (0.762 0.051) 0.250 0.010 (6.35 0.254) 24 EQ. SP. @ 0.100 = 2.400 0.010 (@ 2.54 = 60.96 0.254) 15 EQ. SP. @ 0.150 = 2.250 0.010 (@ 3.81 = 57.15 0.254) 0.100 0.005 TYP (2.54 0.127) 0.150 0.005 TYP (3.81 0.127) 2.600 0.005 (66.04 0.127)
17
16
BOTTOM VIEW SIDE VIEW
0.250 MAX (6.35)
25 ERROR AMP IN 24 ERROR AMP OUT 23 COMMAND OUT 22 COMMAND IN 21 COMMAND IN + 20 COMMAND GND 19 PWM OUT 18 PWM IN 17 CASE GND
NOTES: 1. DIMENSIONS IN INCHES (MM). 2. LEAD IDENTIFICATION NUMBERS ARE FOR REFERENCE ONLY.
FIGURE 13. MECHANICAL OUTLINE
* N/C pins have internal connections for factory test purposes.
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PW-82520/21N A-11/01-1000
ORDERING INFORMATION
PW-8252XNX- X X 0 Reliability Grade: 0 = Standard DDC Processing, no Burn-In (See table below.) 1 = MIL-PRF-38534 Compliant 2 = B* 3 = MIL-PRF-38534 Compliant with PIND Testing 4 = MIL-PRF-38534 Compliant with Solder Dip 5 = MIL-PRF-38534 Compliant with PIND Testing and Solder Dip 6 = B* with PIND Testing 7 = B* with Solder Dip 8 = B* with PIND Testing and Solder Dip 9 = Standard DDC Processing with Solder Dip, no Burn-In (See table below.) Temperature Range: 1 = -55C to +125C 2 = -40C to +85C 3 = 0C to +70C 4 = -55C to +125C with Variables Test Data 5 = -40C to +85C with Variables Test Data 8 = 0C to +70C with Variables Test Data Rating: 1 = 1A 3 = 3A 0 = 10A Voltage 0 = 100V 1 = 200V (available with N0 Rating only) *Standard DDC Processing with burn-in and full temperature test -- see table below.
STANDARD DDC PROCESSING
MIL-STD-883 TEST METHOD(S) INSPECTION SEAL TEMPERATURE CYCLE CONSTANT ACCELERATION BURN-IN 2009, 2010, 2017, and 2032 1014 1010 2001 1015, TABLE 1 CONDITION(S) -- A and C C A --
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PW-82520/21N A-11/01-1000
The information in this data sheet is believed to be accurate; however, no responsibility is assumed by Data Device Corporation for its use, and no license or rights are granted by implication or otherwise in connection therewith. Specifications are subject to change without notice.
105 Wilbur Place, Bohemia, New York, U.S.A. 11716-2482 For Technical Support - 1-800-DDC-5757 ext. 7677 or 7381 Headquarters, N.Y., U.S.A. - Tel: (631) 567-5600, Fax: (631) 567-7358 Southeast, U.S.A. - Tel: (703) 450-7900, Fax: (703) 450-6610 West Coast, U.S.A. - Tel: (714) 895-9777, Fax: (714) 895-4988 United Kingdom - Tel: +44-(0)1635-811140, Fax: +44-(0)1635-32264 Ireland - Tel: +353-21-341065, Fax: +353-21-341568 France - Tel: +33-(0)1-41-16-3424, Fax: +33-(0)1-41-16-3425 Germany - Tel: +49-(0)8141-349-087, Fax: +49-(0)8141-349-089 Japan - Tel: +81-(0)3-3814-7688, Fax: +81-(0)3-3814-7689 World Wide Web - http://www.ddc-web.com
(R)
ST
ERED
DATA DEVICE CORPORATION REGISTERED TO ISO 9001 FILE NO. A5976
A-11/01-1000
16
PRINTED IN THE U.S.A.
FI
RM
U
REG
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