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IA
NT
Features
Formerly
Applications
POTS linecards VolP equipment Voice and data combo linecards ONU, ONT Gateways Cable and DSL modems
brand Extremely high speed performance Blocks high voltages and currents Two TBUTM protectors in one small package Simple, superior circuit protection Minimal PCB area RoHS compliant*, UL Recognized
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S
CO
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PL
TBUTM P500-G and P850-G Protectors
Transient Blocking Units - TBUTM Devices
Agency Approval UL recognized component File # E315805. Industry Standards Description Telcordia ITU-T GR-1089 Port Type 2, 4 Port Type 3, 5 Model P500-G P850-G P850-G
Bourns(R) Model P500-G and P850-G TBUTM products are high speed, surge protection components designed to protect Subscriber Line Interface Circuits (SLICs) against transients caused by AC power cross, induction and lightning surges. The TBUTM device blocks surges and provides an effective barrier behind which sensitive electronics are not exposed to large voltages or currents during surge events.
K.20, K.20E, K.21, K.21E, K.45
Absolute Maximum Ratings (Tamb = 25 C)
Symbol Vimp Vrms Top Tstg Parameter Maximum protection voltage for impulse faults with rise time 1 sec Maximum protection voltage for continuous Vrms faults Operating temperature range Storage temperature range P500-Gxxx-WH P850-Gxxx-WH P500-Gxxx-WH P850-Gxxx-WH Value 500 850 300 425 -40 to +85 -65 to +150 Unit V V C C
Electrical Characteristics (Tamb = 25 C)
Symbol Parameter Maximum current through the device that will not cause current blocking P500-G120-WH P500-G200-WH P850-G120-WH P850-G200-WH P500-G120-WH P500-G200-WH P850-G120-WH P850-G200-WH P500-G120-WH P500-G200-WH P850-G120-WH P850-G200-WH 50
TM
Min.
Typ.
Max. 100 200 100 200
Unit
Iop
mA
Itrigger
Typical current for the device to go from normal operating state to protected state
150 275 150 275 200 400 200 400 55 2 1 0.7 22
mA
Iout
Maximum current through the device
mA s mA V
RTBU Rbal tblock Iquiescent Vreset
Series resistance of the TBUTM device Line-to line series resistance difference between two TBU devices Maximum time for the device to go from normal operating state to protected state Current through the triggered TBUTM device with 50 Vdc circuit voltage Voltage below which the triggered TBUTM device will transition to normal operating state
The P-G series TBUTM devices are bidirectional; specifications are valid in both directions.
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex. Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications
TBUTM P500-G and P850-G Protectors
Typical Performance Characteristics V-I Characteristics
+I
Time to Block vs. Fault Current
1 0.1
Itrigger
Time to Block (sec)
0.01 0.001 0.0001 0.00001 0.000001 0.0000001 0.1 1 10 100 1000
-Vreset +V
Vreset
-Itrigger
Fault Current (A)
Trigger Current Temperature
140 120
% of Trigger Current
100 80 60 40 20 -40 -20 0 20 40 60 80
Temperature (C)
Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications
TBUTM P500-G and P850-G Protectors
Operational Characteristics
The graphs below demonstrate the operational characteristics of the TBUTM device. For each graph the fault voltage, protected side voltage, and current is presented.
Tip
TEST CONFIGURATION DIAGRAM
Ring
Pxxx-G
P500-G Lightning, 500 V
P850-G Lightning, 850 V
3
Equipment
V1
V2
3
400 mA/div.
2
2
1
1
1 s/div. Ch1 V1 Ch2 V2 Ch3 Current
Ch1 V1
1 s/div.
Ch2 V2 Ch3 Current
P500-G Power Fault, 120 Vrms, 25 A
P850-G Power Fault, 230 Vrms, 25 A
3
3
2
2
200 mA/div.
1
4 ms/div. Ch1 V1 Ch2 V2 Ch3 Current
Ch1 V1
100 V/div.
1
4 ms/div. Ch2 V2 Ch3 Current
Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications
200 mA/div.
100 V/div.
200 mA/div.
100 V/div.
TBUTM P500-G and P850-G Protectors
Product Dimensions
P500-Gxxx
J B C E K K F J E N
Dim.
A
4
A
5 2
6
H
B
M
3
1
C D
PIN 1
D
N
TOP VIEW
SIDE VIEW
K J
BOTTOM VIEW
K L L F E G J N
E F G H
HH
P850-Gxxx
B C G
Min. 3.40 (.139) 5.90 (.232) 0.80 (.031) 0.000 (.000) 1.15 (.045) 1.05 (.041) -1.10 (.043) 0.375 (.015) 0.70 (.028) -0.70 (.028) 0.375 (.015)
P500-G Typ. 4.00 (.157) 6.00 (.236) 0.85 (.033) 0.025 (.001) 1.25 (.049) 1.15 (.045) -1.20 (.047) 0.425 (.017) 0.75 (.030) --
Max. 4.10 (.161) 6.10 (.240) 0.90 (.035) 0.050 (.002) 1.35 (.053) 1.25 (.049) -1.30 (.051) 0.475 (.019) 0.80 (.031) --
E
4A
A
4 3
5 2
6 1
6A 1A
M
J K
3A
PIN 1
D
N
L M N
TOP VIEW
SIDE VIEW
BOTTOM VIEW
Pads 1A and 1 are internally connected; the same for pads 3A with 3, 4A with 4, and 6A with 6. This allows for one PCB layout to accommodate the P500 or P850.
0.75 0.80 (.030) (.031) 0.425 0.475 (.017) (.018)
DIMENSIONS:
Min. 3.40 (.139) 8.15 (.321) 0.80 (.031) 0.000 (.000) 1.15 (.045) 1.05 (.041) 0.725 (.029) 1.10 (.043) 0.375 (.015) 0.25 (.010) 0.70 (.028) 0.70 (.028) 0.375 (.015)
P850-G Typ. 4.00 (.157) 8.25 (.325) 0.85 (.033) 0.025 (.001) 1.25 (.049) 1.15 (.045) 0.825 (.032) 1.20 (.047) 0.425 (.017) 0.30 (.012) 0.75 (.030) 0.75 (.030) 0.425 (.017)
Max. 4.10 (.161) 8.35 (.329) 0.90 (.035) 0.050 (.002) 1.35 (.053) 1.25 (.049) 0.925 (.036) 1.30 (.051) 0.475 (.019) 0.35 (.014) 0.80 (.031) 0.80 (.031) 0.475 (.018)
Recommended Pad Layout
P500-Gxxx
1.225 (.048) 1.275 (.050) 0.75 (.030) 1.15 (.045)
MM (INCHES)
0.375 (.015)
Pad Designation Pad # Apply 1 Tip In 2 NC 3 Tip Out 4 Ring Out 5 NC 6 Ring In NC = Solder to PCB; do not make electrical connection, do not connect to ground.
Block Diagram
P500-Gxxx
6 4
1
3
P850-Gxxx
1.225 (.048) 0.85 (.033) 1.25 (.049) 1.15 (.045)
0.375 (.015) 0.30 (.012) 0.75 (.030)
Pad Designation Pad # Apply Pad # Apply 1A Tip In 4A Ring Out 1 Tip In 4 Ring Out 2 NC 5 NC 3 Tip Out 6 Ring In 3A Tip Out 6A Ring In NC = Solder to PCB; do not make electrical connection, do not connect to ground.
P850-Gxxx
6 & 6A 4 & 4A
1 & 1A
3 & 3A
TBUTM devices have matte-tin termination finish. Suggested layout should use non-solder mask define (NSMD). Recommended stencil thickness is 0.10-0.12 mm (.004-.005 in.) with stencil opening size 0.025 mm (.0010 in.) less than the device pad size. As when heat sinking any power device, it is recommended that, wherever possible, extra PCB copper area is allowed. For minimum parasitic capacitance, do not allow any signal, ground or power signals beneath any of the pads of the device.
Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications
TBUTM P500-G and P850-G Protectors
Thermal Resistances
Part # P500-G Symbol Rth(j-a) Parameter Junction to leads (package) Junction to leads (per TBU device) Junction to leads (package) Junction to leads (per TBU device)
TM TM
Value 113 236 119 215
Unit C/W C/W C/W C/W
P850-G
Rth(j-a)
Reflow Profile
Profile Feature Average Ramp-Up Rate (Tsmax to Tp) Preheat - Temperature Min. (Tsmin) - Temperature Max. (Tsmax) - Time (tsmin to tsmax) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classification Temperature (Tp) Time within 5 C of Actual Peak Temp. (tp) Ramp-Down Rate Time 25 C to Peak Temperature Pb-Free Assembly 3 C/sec. max. 150 C 200 C 60-180 sec. 217 C 60-150 sec. 260 C 20-40 sec. 6 C/sec. max. 8 min. max.
Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications
3312 - 2 and P850-G Protectors TBUTM P500-Gmm SMD Trimming Potentiometer
How to Order Typical Part Marking
P 500 - G 120 - WH __
Form Factor P = Two TBUTM protectors in one device Impulse Voltage Rating 500 = 500 V 850 = 850 V Directional Indication for Paired Devices G = Bidirectional Iop Indicator 120 = 100 mA 200 = 200 mA Packaging Indicator Blank = Packaged in tape and reel (3000 pieces per reel) X = Packaged in tubes
MANUFACTURER'S TRADEMARK*
MARKING NUMBER 50GA = P500-G120-WH 50GB = P500-G200-WH 85GA = P850-G120-WH 85GB = P850-G200-WH MANUFACTURING DATE CODE
PIN 1 *TRANSITION FROM FULTEC TRADEMARK TO BOURNS TRADEMARK IN 2009.
Packaging Specifications (per EIA468-B)
P0 E B t TOP COVER TAPE N D C F W D P2
A
B0 K0 A0 P G (MEASURED AT HUB) USER DIRECTION OF FEED CENTER LINES OF CAVITY D1 EMBOSSMENT
Device P500-G, P850-G A0 Min. 4.2 (.165) 4.2 (.165) K0 Min. 1.0 (.039) 1.1 (.043) Max. 1.2 (.047) 1.3 (.051) Max. 4.4 (.173) 4.4 (.173)
A Min. 326 (12.835) Max. 330.25 (13.002) B0 Min. 6.2 (.244) 8.45 (.333) P Min. 7.9 (.311) 7.9 (.311) Max. 8.1 (.319) 8.1 (.319) Min. 3.9 (.159) 3.9 (.159)
DIMENSIONS:
B Min. 1.5 (.059) D Max. 6.4 (.252) 8.65 (.341) Min. 1.5 (.059) 1.5 (.059) P0 Max. 4.1 (.161) 4.1 (.161)
MM (INCHES)
C Max. 2.5 (.098) Min. 12.8 (.504) D1 Max. 1.6 (.063) 1.6 (.063) Min. 1.5 (.059) 1.5 (.059) P2 Min. 1.9 (.075) 1.9 (.075) Max. 2.1 (.083) 2.1 (.083) Min. 0.25 (.010) 0.25 (.010) Max. Min. 1.65 (.065) 1.65 (.065) Max. 13.5 (.531) Min. 20.2 (.795)
D Max. E Max. 1.85 (.073) 1.85 (.073) t Max. 0.35 (.014) 0.35 (.014)
G Ref. 16.5 (.650) F Min. 5.4 (.213) 7.4 (.291) W Min. 11.7 (.461) 15.7 (.618)
N Ref. 102 (4.016)
Device P500-G P850-G Device P500-G P850-G
max. 5.6 (.220) 7.6 (.299) Max. 12.3 (.484) 16.3 (.642)
Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications
3312 - 2 mm SMD Trimming Potentiometer TBUTM P500-G and P850-G Protectors
Reference Designs A cost-effective protection solution combines the Bourns(R) TBUTM protection device with a pair of MOVs or Bourns(R) GDTs and a diode bridge. The diagram below illustrates a common configuration of these components. The graphs to the right demonstrate the operational characteristics of the circuit.
V1 V2
MOVs or GDTs
-V REF
Pxxx-G
Common Configuration Diagram
P500-G Configuration (GR-1089 Intra-building and 5 kV Lightning) Product TBU Device MOV Diode bridge
TM
Qty. 1 2 2
Part Number P500-Gxxx-WH CNR-10D201K GNR10D201K GSD2004S-V MMBD2004S
Source Bourns, Inc. CNR Centra Science Ceramate Technical Vishay Diodes Inc.
100 V/div.
3
Equipment
2
1
500 ns/div. Ch1 V1 Ch2 V2 Ch3 Current
P500-G Solution: 5000 V Lightning 2/10 sec, 500 A
P850-G Configuration (ITU-T K.20, K.21, K.20E, K.21E, K.45) Product TBU Device MOV Diode bridge
TM
Qty. 1 2 2
Part Number P850-G120-WH CNR-10D361K GNR10D361K GSD2004S-V MMBD2004S
Source Bourns, Inc. CNR Centra Science Ceramate Technical
100 V/div.
3
Vishay Diodes Inc.
2
1
Asia-Pacific: Tel: +886-2 2562-4117 * Fax: +886-2 2562-4116 Europe: Tel: +41-41 768 5555 * Fax: +41-41 768 5510 The Americas: Tel: +1-951 781-5500 * Fax: +1-951 781-5700 www.bourns.com
Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications
500 ns/div. Ch1 V1 Ch2 V2 Ch3 Current
P850-G Solution: 4000 V Lightning 10/700 sec, 100 A
400 mA/div.
400 mA/div.
REV. 12/08
COPYRIGHT(c)2008, BOURNS, INC. LITHO IN U.S.A. e 12/08 FU0801

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