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Data Sheet
A m p l i fy t h e H u m a n E x p e r i e n c e
(R)
Comlinear CLC2000
features n 9.4V pp output drive into RL= 25 n Using both amplifiers, 18.8V pp differential output drive into RL= 25 n 200mA @ V = 9.4V o pp n 0.009%/0.06 differential gain/ phase error n 250MHz -3dB bandwidth at G = 2 n 510MHz -3dB bandwidth at G = 1 n 210V/s slew rate n 4.5nV/Hz input voltage noise n 2.7pA/Hz input current noise n 7mA supply current n Fully specified at 5V and 12V supplies n Pb-free SOIC-8 package applications n ADSL PCI modem cards n ADSL external modems n Cable drivers n Video line driver n Twisted pair driver/receiver
High Output Current Dual Amplifier
Comlinear CLC2000 High Output Current Dual Amplifier
General Description
The Comlinear CLC2000 is a dual voltage feedback amplifier that offers 200mA of output current at 9.4Vpp. The CLC2000 is capable of driving signals to within 1V of the power rails. When connected as a differential line driver, the dual amplifier drives signals up to 18.8Vpp into a 25 load, which supports the peak upstream power levels for upstream full-rate ADSL CPE applications. The Comlinear CLC2000 can operate from single or dual supplies from 5V to 12V. It consumes only 7mA of supply current per channel. The combination of wide bandwidth, low noise, low distortion, and high output current capability makes the CLC2000 ideally suited for Customer Premise ADSL or video line driving applications.
Typical Application - ADSL Application
+Vs
+
1/2 CLC2000
Rf+
Ro+=12.5 1:2
Vo+ RL=100 VOUT Vo-
VIN
Rg
Rev 1A
Rf1/2 CLC2000
Ro-=12.5
-
-Vs
Ordering Information
Part Number CLC2000ISO8X CLC2000ISO8 Package SOIC-8 SOIC-8 Pb-Free Yes Yes Operating Temperature Range -40C to +85C -40C to +85C Packaging Method Reel Rail
Moisture sensitivity level for all parts is MSL-1.
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Data Sheet
CLC2000 Pin Configuration
OUT1 -IN1 +IN1 -V S
1 2 3 4 8 7 6 5
+VS OUT2 -IN2 +IN2
Comlinear CLC2000 High Output Current Dual Amplifier
CLC2000 Pin Assignments
Pin No. 1 2 3 4 5 6 7 8 Pin Name OUT1 -IN1 +IN1 -VS +IN2 -IN2 OUT2 +VS Description Output, channel 1 Negative input, channel 1 Positive input, channel 1 Negative supply Positive input, channel 2 Negative input, channel 2 Output, channel 2 Positive supply
Rev 1A
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Data Sheet
Absolute Maximum Ratings
The safety of the device is not guaranteed when it is operated above the "Absolute Maximum Ratings". The device should not be operated at these "absolute" limits. Adhere to the "Recommended Operating Conditions" for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the operating conditions noted on the tables and plots.
Comlinear CLC2000 High Output Current Dual Amplifier
Parameter Supply Voltage Input Voltage Range
Min 0 -Vs -0.5V
Max 7 or 14 +Vs +0.5V
Unit V V
Reliability Information
Parameter Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10s) Package Thermal Resistance 8-Lead SOIC
Notes: Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air.
Min -65
Typ
Max 150 150 260
Unit C C C C/W
100
ESD Protection
Product Human Body Model (HBM) Charged Device Model (CDM) SOIC-8 2.5kV 2kV
Recommended Operating Conditions
Parameter Operating Temperature Range Supply Voltage Range Min -40 2.5 Typ Max +85 6.5 Unit C V
Rev 1A
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Data Sheet
Electrical Characteristics
TA = 25C, Vs = 5V, Rf = Rg = 510, RL = 100 to VS/2, G = 2; unless otherwise noted.
symbol
UGBW BWSS BWLS BW0.1dB tR, tF tS OS SR
parameter
-3dB Bandwidth -3dB Bandwidth Large Signal Bandwidth 0.1dB Gain Flatness Rise and Fall Time Settling Time to 0.1% Overshoot Slew Rate
conditions
G = +1, VOUT = 0.2Vpp, Rf = 0 G = +2, VOUT = 0.2Vpp G = +2, VOUT = 2Vpp G = +2, VOUT = 0.2Vpp VOUT = 1V step; (10% to 90%) VOUT = 2V step VOUT = 0.2V step VOUT = 2V step 2Vpp, 100KHz, RL = 25 2Vpp, 1MHz, RL = 100 2Vpp, 100KHz, RL = 25 2Vpp, 1MHz, RL = 100 NTSC (3.58MHz), DC-coupled, RL = 150 NTSC (3.58MHz), DC-coupled, RL = 150 > 1MHz > 1MHz Channel-to-channel 5MHz
Min
typ
422 236 68 77 3.7 20 6 200 -83 -85 -86 -82 0.01 0.05 4.2 2.7 -63 0.3 0.383 0.2 10 2.5
Max
units
MHz
Frequency Domain Response
Comlinear CLC2000 High Output Current Dual Amplifier
MHz MHz MHz ns ns % V/s dBc dBc dBc dBc % nV/Hz pA/Hz dB mV V/C A A nA/C dB dB mA M pF V dB V V mA
Time Domain Response
Distortion/Noise Response
HD2 HD3 DG DP en in XTALK VIO dVIO IIO Ib dIbni PSRR AOL IS RIN CIN CMIR CMRR RO 2nd Harmonic Distortion 3rd Harmonic Distortion Differential Gain Differential Phase Input Voltage Noise Input Current Noise Crosstalk Input Offset Voltage Average Drift Input Offset Current Input Bias Current Average Drift Power Supply Rejection Ratio Open-Loop Gain Supply Current Input Resistance Input Capacitance Common Mode Input Range Common Mode Rejection Ratio Output Resistance DC Closed Loop, DC RL = 25 VOUT ISC Output Voltage Swing RL = 1k Short-Circuit Output Current VOUT = VS / 2 DC RL = 25 per channel Non-inverting
DC Performance
81 76 6.75 2.5 1 0.4 to 4.6 80 0.01 0.95 to 4.05 0.75 to 4.25 1000
Rev 1A
Input Characteristics
Output Characteristics
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Data Sheet
Electrical Characteristics
TA = 25C, Vs = 12V, Rf = Rg = 510, RL = 100 to VS/2, G = 2; unless otherwise noted.
symbol
UGBW BWSS BWLS BW0.1dB tR, tF tS OS SR
parameter
-3dB Bandwidth -3dB Bandwidth Large Signal Bandwidth 0.1dB Gain Flatness Rise and Fall Time Settling Time to 0.1% Overshoot Slew Rate
conditions
G = +1, VOUT = 0.2Vpp, Rf = 0 G = +2, VOUT = 0.2Vpp G = +2, VOUT = 4Vpp G = +2, VOUT = 0.2Vpp VOUT = 4V step; (10% to 90%) VOUT = 2V step VOUT = 0.2V step VOUT = 4V step 2Vpp, 100KHz, RL = 25
Min
typ
510 250 35 32 13.3 20 2 210 -84 -86 -63 -82 -88 -80 -63 -83 0.009 0.06 4.5 2.7 -62
Max
units
MHz
Frequency Domain Response
Comlinear CLC2000 High Output Current Dual Amplifier
MHz MHz MHz ns ns % V/s dBc dBc dBc dBc dBc dBc dBc dBc % nV/Hz pA/Hz dB 6 2 20 mV V/C A A nA/C dB dB 12 mA M pF V dB 10.5 V V mA
Time Domain Response
Distortion/Noise Response
2Vpp, 1MHz, RL = 100 8.4Vpp, 100KHz, RL = 25 8.4Vpp, 1MHz, RL = 100 2Vpp, 100KHz, RL = 25 HD3 3rd Harmonic Distortion 2Vpp, 1MHz, RL = 100 8.4Vpp, 100KHz, RL = 25 8.4Vpp, 1MHz, RL = 100 DG DP en in XTALK VIO dVIO IIO Ib dIbni PSRR AOL IS RIN CIN CMIR CMRR RO VOUT ISC Differential Gain Differential Phase Input Voltage Noise Input Current Noise Crosstalk Input Offset Voltage(1) Average Drift Input Offset Current(1) Input Bias Current(1) Average Drift Power Supply Rejection Ratio(1) Open-Loop Gain Supply Current(1) Input Resistance Input Capacitance Common Mode Input Range Common Mode Rejection Ratio(1) Output Resistance DC Closed Loop, DC RL = 25 (1) RL = 1k Short-Circuit Output Current VOUT = VS / 2 1.5 70 DC RL = 25 per channel Non-inverting 73 -2 NTSC (3.58MHz), DC-coupled, RL = 150 NTSC (3.58MHz), DC-coupled, RL = 150 > 1MHz > 1MHz Channel-to-channel 5MHz -6
HD2
2nd Harmonic Distortion
DC Performance
0.3 0.383 0.2 10 2.5 81 76 7 2.5 1 0.6 to 11.4 79 0.01 1.2 to 10.8 0.8 to 11.2 1000
Rev 1A
Input Characteristics
Output Characteristics
Output Voltage Swing
notes: 1. 100% tested at 25C
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Data Sheet
Typical Performance Characteristics
TA = 25C, Vs = 12V, Rf = 510, RL = 100 to VS/2, G = 2; unless otherwise noted. Non-Inverting Frequency Response
1 0
Non-Inverting Frequency Response (VS=5V)
2 1 G=1 Rf = 0
Comlinear CLC2000 High Output Current Dual Amplifier
Normalized Gain (dB)
-2 -3 -4 -5 -6 -7 0.1
G = 10 G=5 G=2
Normalized Gain (dB)
-1
0 -1 G = 10 -2 G=5 -3 -4 -5 -6 VOUT = 0.2Vpp G=2
G=1 Rf = 0
VOUT = 0.2Vpp
1
10
100
1000
0.1
1
10
100
1000
Frequency (MHz)
Frequency (MHz)
Inverting Frequency Response
1 0 -1 G = -1
Inverting Frequency Response (VS=5V)
1 0 -1 G = -1
Normalized Gain (dB)
-2 G = -10 -3 -4 G = -5 -5 -6 -7 0.1 1 10 100 1000 VOUT = 0.2Vpp
Normalized Gain (dB)
G = -2
G = -2 -2 G = -10 -3 -4 G = -5 -5 -6 -7 0.1 1 10 100 1000 VOUT = 0.2Vpp
Frequency (MHz)
Frequency (MHz)
Rev 1A
Frequency Response vs. RL
2 RL = 5k 1 RL = 1k
Frequency vs. RL (VS = 5V)
2 RL = 5k 1 RL = 1k
Normalized Gain (dB)
-1 -2 -3 -4 -5 -6 0.1 1 10 100 1000 VOUT = 0.2Vpp RL = 150 RL = 50
Normalized Gain (dB)
0
0 -1 -2 -3 -4 -5 VOUT = 0.2Vpp RL = 150 RL = 50
RL = 25 -6 0.1
RL = 25 1 10 100 1000
Frequency (MHz)
Frequency (MHz)
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Data Sheet
Typical Performance Characteristics
TA = 25C, Vs = 12V, Rf = 510, RL = 100 to VS/2, G = 2; unless otherwise noted. Frequency vs. CL
1 0 -1 CL = 1000pF Rs = 5 CL = 500pF Rs = 6 CL = 100pF Rs = 13 CL = 50pF Rs = 20 VOUT = 0.2Vpp 0.1 1 CL = 10pF Rs = 30 10 100 1000
Frequency vs. CL (VS = 5V)
1 0 -1 CL = 1000pF Rs = 5 CL = 500pF Rs = 6 CL = 100pF Rs = 13 CL = 50pF Rs = 25 VOUT = 0.2Vpp 0.1 1 CL = 10pF Rs = 45 10 100 1000
Comlinear CLC2000 High Output Current Dual Amplifier
Normalized Gain (dB)
-2 -3 -4 -5 -6 -7
Normalized Gain (dB)
-2 -3 -4 -5 -6 -7
Frequency (MHz)
Frequency (MHz)
Recommended RS vs. CL
32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 10
Recommended RS vs. CL (VS = 5V)
45 40 35 30
RS ()
RS ()
VOUT = 0.2Vpp RS optimized for <1dB peaking 100 1000
25 20 15 10 5 0 10 VOUT = 0.2Vpp RS optimized for <1dB peaking 100 1000
CL (pf)
CL (pF)
Rev 1A
Frequency Response vs. VOUT
1 0 VOUT = 1Vpp
Frequency Response vs. VOUT (VS = 5V)
1 0 VOUT = 1Vpp
Normalized Gain (dB)
VOUT = 5Vpp -2 -3 -4 -5 -6 -7 0.1 1 10 100 VOUT = 4Vpp
VOUT = 2Vpp
Normalized Gain (dB)
-1
-1 -2 -3 -4 -5 -6 -7 VOUT = 3Vpp VOUT = 2Vpp
1000
0.1
1
10
100
1000
Frequency (MHz)
Frequency (MHz)
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Data Sheet
Typical Performance Characteristics - Continued
TA = 25C, Vs = 12V, Rf = 510, RL = 100 to VS/2, G = 2; unless otherwise noted. Frequency Response vs. Temperature
1 0 - 40degC + 25degC + 85degC
Frequency vs. Temperature (VS = 5V)
1 0
Comlinear CLC2000 High Output Current Dual Amplifier
Normalized Gain (dB)
-2 -3 -4 -5 -6 -7 0.1 1 VOUT = 0.2Vpp 2Vpp
Normalized Gain (dB)
-1
-1 -2 -3 -4 -5 -6 -7 + 85degC VOUT = 0.2Vpp .2Vpp + 25degC
- 40degC
10
100
1000
0.1
1
10
100
1000
Frequency (MHz)
Frequency (MHz)
-3dB Bandwidth vs. Output Voltage
275 250 225
-3dB Bandwidth vs. Output Voltage (VS=5V)
250 225 200
-3dB Bandwidth (MHz)
200 175 150 125 100 75 50 25 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
-3dB Bandwidth (MHz)
175 150 125 100 75 50 25 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0
VOUT (VPP)
VOUT (VPP)
Rev 1A
Open Loop Transimpendance Gain/Phase vs. Frequency
80 70
Gain
Input Voltage Noise
50
-20 -40 -60 -80 -100 -120 -140 -160 -180 -200
Input Voltage Noise (nV/Hz)
0
Open Loop Phase (deg)
Open Loop Gain (dB)
60 50 40 30 20 10 0 -10 -20 1k 10k 100k 1M 10M 100M 1G
Phase
40 30 20 10 0 0.0001 0.001
Frequency (Hz)
0.01
0.1
1
10
100
Frequency (MHz)
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Data Sheet
Typical Performance Characteristics - Continued
TA = 25C, Vs = 12V, Rf = 510, RL = 100 to VS/2, G = 2; unless otherwise noted. 2nd Harmonic Distortion vs. RL
-20 -30 -40 RL = 25
3rd Harmonic Distortion vs. RL
-20 -30 -40 RL = 25 RL = 100
Comlinear CLC2000 High Output Current Dual Amplifier
Distortion (dBc)
-50 -60 -70 RL = 1k -80 -90 -100 0 5 10 15 20
Distortion (dBc)
RL = 100
-50 -60 -70
RL = 1k -80 -90 -100 0 5 10 15 20
VOUT = 2Vpp
VOUT = 2Vpp
Frequency (MHz)
Frequency (MHz)
2nd Harmonic Distortion vs. VOUT
-20 -30 -40
3rd Harmonic Distortion vs. VOUT
-20 -30 -40
Distortion (dBc)
-50 -60 -70 -80 -90 -100 0.5 0.75 1
Distortion (dBc)
10MHz
-50 -60 -70 -80 -90
10MHz
5MHz
5MHz
1MHz 1.25 1.5 1.75 2 2.25 2.5 2.75 3
1MHz -100 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 3
Output Amplitude (Vpp)
Output Amplitude (Vpp)
Rev 1A
Differential Gain & Phase AC Coupled
0.01 0.0075 0.005 0.0025 0 RL = 150 AC coupled into 220F DG
Differential Gain & Phase DC Coupled
0.06 0.05
Diff Gain (%) and Diff Phase ( )
Diff Gain (%) and Diff Phase ( )
0.04 0.03 0.02 0.01 0 -0.01 -0.02 -0.03 DG RL = 150 DC coupled -0.7 -0.5 -0.3 -0.1 0.1
DP
-0.0025 -0.005
DP
-0.0075 -0.01 -0.7 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7
VOUT = 2Vpp 0.3 0.5 0.7
Input Voltage (V)
Input Voltage (V)
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Data Sheet
Typical Performance Characteristics - Continued
TA = 25C, Vs = 12V, Rf = 510, RL = 100 to VS/2, G = 2; unless otherwise noted. 2nd Harmonic Distortion vs. RL (VS=5V)
-20 -30 -40 RL = 25
3rd Harmonic Distortion vs. RL (VS=5V)
-20 -30 -40 RL = 25 RL = 100 -50 -60 -70 -80 -90 -100 RL = 1k
Comlinear CLC2000 High Output Current Dual Amplifier
Distortion (dBc)
-50 -60 -70
RL = 100
RL = 1k -80 -90 -100 0 5 10 15 20
VOUT = 2Vpp
Distortion (dBc)
VOUT = 2Vpp 0 5 10 15 20
Frequency (MHz)
Frequency (MHz)
2nd Harmonic Distortion vs. VOUT (VS=5V)
-45 -50 -55 10MHz
3rd Harmonic Distortion vs. VOUT (VS=5V)
-45 -50 -55 10MHz
Distortion (dBc)
Distortion (dBc)
-60 -65 -70 -75 -80 -85 -90 0.5 0.75 1 1.25 1.5 1.75 2 1MHz
5MHz
-60 -65 -70 -75 -80 -85 -90 1MHz 5MHz
2.25
2.5
2.75
3
0.5
0.75
1
1.25
1.5
1.75
2
2.25
2.5
2.75
3
Output Amplitude (Vpp)
Output Amplitude (Vpp)
Rev 1A
Differential Gain & Phase AC Coupled (VS=5V)
0.01 0.0075 0.005 0.0025 0 RL = 150 AC coupled into 220F DG
Differential Gain & Phase DC Coupled (VS=5V)
0.04 0.03 0.02 DG 0.01 0 -0.01 DP -0.02 RL = 150 DC coupled
Diff Gain (%) and Diff Phase ( )
-0.0025 -0.005 DP
-0.0075 -0.01 -0.4 -0.3 -0.2
-0.1
0
0.1
0.2
0.3
0.4
Diff Gain (%) and Diff Phase ( )
-0.4
-0.2
0
0.2
0.4
Input Voltage (V)
Input Voltage (V)
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Data Sheet
Typical Performance Characteristics - Continued
TA = 25C, Vs = 12V, Rf = 510, RL = 100 to VS/2, G = 2; unless otherwise noted. Small Signal Pulse Response
6.15 6.1 6.05
Large Signal Pulse Response
9.0 8.0 7.0 VOUT = 4Vpp
Comlinear CLC2000 High Output Current Dual Amplifier
Voltage (V)
6 5.95 5.9 5.85 0 20 40 60 80 100 120 140 160 180 200
Voltage (V)
VOUT = 2Vpp 6.0 5.0 4.0 3.0 0 20 40 60 80 100 120 140 160 180 200
Time (ns)
Time (ns)
Small Signal Pulse Response (VS=5V)
2.65 2.60 2.55
Large Signal Pulse Response (VS=5V)
4.5 4.0 3.5 VOUT = 2Vpp VOUT = 3Vpp
Voltage (V)
2.50 2.45 2.40 2.35 0 20 40 60 80 100 120 140 160 180 200
Voltage (V)
3.0 2.5 2.0 1.5 1.0 0.5 0 20 40 60 80 100 120 140 160 180 200
Time (ns)
Time (ns)
Rev 1A
Crosstalk vs. Frequency
-30 -35 -40 -45 -50 -55 -60 -65 -70 -75 -80 -85 -90 0.1 1 10 100 VOUT = 2Vpp
Crosstalk vs. Frequency (VS=5V)
-30 -35 -40 -45 -50 -55 -60 -65 -70 -75 -80 -85 -90 0.1 1 10 100 VOUT = 2Vpp
Crosstalk (dB)
Frequency (MHz)
Crosstalk (dB)
Frequency (MHz)
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Data Sheet
Typical Performance Characteristics - Continued
TA = 25C, Vs = 12V, Rf = 510, RL = 100 to VS/2, G = 2; unless otherwise noted. Closed Loop Output Impedance vs. Frequency
10
CMRR vs. Frequency
-10 -20
Comlinear CLC2000 High Output Current Dual Amplifier
Output Impedance ()
1
-30
CMRR (dB)
-40 -50 -60 -70 -80
0.1
0.01
0.001 1k 10k 100k 1M 10M 100M
-90
10
100
1k
10k
100k
1M
10M 100M
Frequency (Hz)
Frequency (Hz)
PSRR vs. Frequency
-30 -40 -50
Input Voltage vs. Output Current
1.25 1.00 0.75 0.50 IOUT+
PSRR (dB)
IOUT (A)
-60 -70 -80 -90
0.25 0.00 -0.25 -0.50 -0.75 -1.00 -1.25 RL = 2.668 G = -1 VS = 6V 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 IOUT-
-100
10
100
1k
10k
100k
1M
10M 100M
Frequency (Hz)
VIN (V)
Rev 1A
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Data Sheet
Application Information
Basic Operation Figures 1 and 2 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations.
+Vs 6.8F
Two decoupling capacitors should be placed on each power pin with connection to a local PC board ground plane. A large, usually tantalum, 10F to 47F capacitor is required to provide good decoupling for lower frequency signals and to provide current for fast, large signal changes at the CLC2000 outputs. It should be within 0.25" of the pin. A secondary smaller 0.1F MLCC capacitor should located within 0.125" to reject higher frequency noise on the power line. Power Dissipation
Comlinear CLC2000 High Output Current Dual Amplifier
Input
+ -
0.1F Output 0.1F RL Rf
G = 1 + (Rf/Rg)
Rg -Vs
6.8F
Power dissipation is an important consideration in applications with low impedance DC, coupled loads. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond its intended operating range. Calculations below relate to a single amplifier. For the CLC2000, both amplifiers power contribution needs to be added for the total power dissipation. Maximum power levels are set by the absolute maximum junction rating of 150C. To calculate the junction temperature, the package thermal resistance value ThetaJA (JA) is used along with the total die power dissipation. TJunction = TAmbient + (JA x PD)
Figure 1. Typical Non-Inverting Gain Circuit
+Vs 6.8F
R1 Input Rg
+ -
0.1F Output 0.1F 6.8F -Vs RL Rf
G = - (Rf/Rg) For optimum input offset voltage set R1 = Rf || Rg
Where TAmbient is the temperature of the working environment. In order to determine PD, the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. PD = Psupply - Pload Supply power is calculated by the standard power equation. Psupply = Vsupply x I(RMS supply) Vsupply = V(S+) - V(S-) Power delivered to a purely resistive load is: Pload = ((VLOAD)RMS2) / Rloadeff The effective load resistor will need to include the effect of the feedback network. For instance, Rloadeff in figure 1 would be calculated as: RL || (Rf + Rg)
Rev 1A
Figure 2. Typical Inverting Gain Circuit
Power Supply and Decoupling The CLC2000 can be powered with a low noise supply anywhere in the range from +5V to +13V. Ensure adequate metal connections to power pins in the PC board layout with careful attention paid to decoupling the power supply. High quality capacitors with low equivalent series resistance (ESR) such as multilayer ceramic capacitors (MLCC) should be used to minimize supply voltage ripple and power dissipation.
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Data Sheet
These measurements are basic and are relatively easy to perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. Here, PD can be found from PD = PQuiescent + PDynamic - PLoad Quiescent power can be derived from the specified IS values along with known supply voltage, VSupply. Load power can be calculated as above with the desired signal amplitudes using: (VLOAD)RMS = VPEAK / 2 ( ILOAD)RMS = (VLOAD)RMS / Rloadeff The dynamic power is focused primarily within the output stage driving the load. This value can be calculated as: PDYNAMIC = (VS+ - VLOAD)RMS x (ILOAD)RMS Assuming the load is referenced in the middle of the power rails or Vsupply/2. Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 8 Lead SOIC packages.
2.5
In the event of a short circuit condition, the CLC2000 has circuitry to limit output drive capability to 1000mA. This will only protect against a momentary event. Extended duration under these conditions will cause junction temperatures to exceed 150C. Due to internal metallization constraints, continuous output current should be limited to 100mA.
Comlinear CLC2000 High Output Current Dual Amplifier
Driving Capacitive Loads Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, and possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability and settling performance. Refer to Figure 4.
Input + Rf Rg Rs CL RL
Output
Figure 4. Addition of RS for Driving Capacitive Loads Table 1 provides the recommended RS for various capacitive loads. The recommended RS values result in <=1dB peaking in the frequency response. The Frequency Response vs. CL plots, on page 7, illustrates the response of the CLC2000.
Maximum Power Dissipation (W)
2
1.5
1
SOIC-8
CL (pF) 10
RS () 40 24.5 20 13.5 6 5
-3dB BW (MHz) 275 250 175 135 75 45
Rev 1A
0.5
20 50
-40 -20 0 20 40 60 80
0
100 500 1000
Ambient Temperature (C)
Figure 3. Maximum Power Derating Table 1: Recommended RS vs. CL Better thermal ratings can be achieved by maximizing PC board metallization at the package pins. However, be careful of stray capacitance on the input pins. In addition, increased airflow across the package can also help to reduce the effective JA of the package. For a given load capacitance, adjust RS to optimize the tradeoff between settling time and bandwidth. In general, reducing RS will increase bandwidth at the expense of additional overshoot and ringing.
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Data Sheet
Overdrive Recovery An overdrive condition is defined as the point when either one of the inputs or the output exceed their specified voltage range. Overdrive recovery is the time needed for the amplifier to return to its normal or linear operating point. The recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. The CLC2000 will typically recover in less than 40ns from an overdrive condition. Figure 5 shows the CLC2000 in an overdriven condition.
3 2 6 4
+Vs
+
Comlinear CLC2000 High Output Current Dual Amplifier
1/2 CLC2000
Rf+
Ro+=12.5 1:2
Vo+ RL=100 VOUT Vo-
VIN
Rg
Rf1/2 CLC2000
Ro-=12.5
VIN = 2.5Vpp G=5 Input
-
Output Voltage (V)
Input Voltage (V)
1 0 -1 Output -2 -3 0 20 40 60 80 100 120 140 160 180 200
2 0 -2 -4 -6
-Vs
Figure 6: Typical Differential Transmission Line Driver
Time (ns)
Figure 5. Overdrive Recovery
Using the CLC2000 as a Differential Line Driver The combination of good large signal bandwidth and high output drive capability makes the CLC2000 well suited for low impedance line driver applications, such as the upstream data path for a ADSL CPE modem. The dual channel configuration of the CLC2000 provides better channel matching than a typical single channel device, resulting in better overall performance in differential applications. When configured as a differential amplifier as in figure 6, it can easily deliver the 13dBm to a standard 100 twistedpair CAT3 or CAT5 cable telephone network, as required in a ADSL CPE application. Differential circuits have several advantages over singleended configurations. These include better rejection of common mode signals and improvement of power-supply rejection. The use of differential signaling also improves overall dynamic performance. Total harmonic distortion (THD) is reduced by the suppression of even signal harmonics and the larger signal swings allow for an improved signal to noise ratio (SNR).
(c)2004-2008 CADEKA Microcircuits LLC
For any transmission requirement, the fundamental design parameters needed are the effective impedance of the transmission line, the power required at the load, and knowledge concerning the content of the transmitted signal. The basic design of such a circuit is briefly outlined below, using the ADSL parameters as a guideline. Data transmission techniques, such as ADSL, utilize amplitude modulation techniques which are sensitive to output clipping. A signal's PEAK to RMS ratio, or Crest Factor (CF), can be used to determine the adequate peak signal levels to insure fidelity for a given signal. For an ADSL system, the signal consists of 256 independent frequencies with varying amplitudes. This results in a noise-like signal with a crest factor of about 5.3. If the driver does not have enough swing to handle the signal peaks, clipping will occur and amplitude modulated information can be corrupted, causing degradation in the signals Bit Error Rate. To determine the required swing, first use the specified load impedance to convert the RMS power to an RMS voltage. Then, multiply the RMS voltage by the crest factor to get the peak values. For example 13dBm, as referenced to 1mW, is ~20mW. 20mW into the 100 CAT5 impedance yields a RMS voltage of 1.413 VRMS . Using the ADSL crest factor of 5.3 yields ~ 7.5V peak signals.
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Rev 1A
15
Data Sheet
Line coupling through a 1:2 transformer is used to realize these levels. Standard back termination is used to match the characteristic 100 impedance of the CAT5 cable. For proper power transfer, this requires an effective 1:4 impedance match of 25 at the inputs of the transformer. To account for the voltage drop of the impedance matching resistors, the signal levels at the output of the amplifier need to be doubled. Thus each amplifier will swing 3.75V about a centered common mode output voltage. In general, the CLC2000 can be used in any application where an economical and local hardwired connection is needed. For example, routing analog or digital video information for a in-cabin entertainment system. Networking of a local surveillance system also could be considered.
Evalutaion Board Schematics Evaluation board schematics and layouts are shown in Figures 7-9. These evaluation boards are built for dual- supply operation. Follow these steps to use the board in a single-supply application: 1. Short -Vs to ground. 2. Use C3 and C4, if the -VS pin of the amplifier is not directly connected to the ground plane.
Comlinear CLC2000 High Output Current Dual Amplifier
Layout Considerations General layout and supply bypassing play major roles in high frequency performance. CADEKA has evaluation boards to use as a guide for high frequency layout and as aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: * Include 6.8F and 0.1F ceramic capacitors for power supply decoupling * Place the 6.8F capacitor within 0.75 inches of the power pin * Place the 0.1F capacitor within 0.1 inches of the power pin * Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance * Minimize all trace lengths to reduce series inductances Refer to the evaluation board layouts below for more information. Evaluation Board Information The following evaluation board is available to aid in the testing and layout of this device: Evaluation Board # CEB006 CLC2000 Products
Figure 7. CEB006 Schematic
Rev 1A
Figure 8. CEB006 Top View
(c)2004-2008 CADEKA Microcircuits LLC
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16
Data Sheet
Comlinear CLC2000 High Output Current Dual Amplifier
Figure 9. CEB006 Bottom View
Rev 1A
(c)2004-2008 CADEKA Microcircuits LLC
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17
Data Sheet
Mechanical Dimensions
SOIC-8 Package
Comlinear CLC2000 High Output Current Dual Amplifier
Rev 1A
For additional information regarding our products, please visit CADEKA at: cadeka.com
caDeKa Headquarters Loveland, Colorado T: 970.663.5452 T: 877.663.5415 (toll free)
CADEKA, the CADEKA logo design, and Comlinear and the Comlinear logo design, are trademarks or registered trademarks of CADEKA Microcircuits LLC. All other brand and product names may be trademarks of their respective companies. CADEKA reserves the right to make changes to any products and services herein at any time without notice. CADEKA does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties. Copyright (c)2008 by CADEKA Microcircuits LLC. All rights reserved.
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