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GL6965
GL6965
Telephone Speech Network with Dialer Interface
Description
The GL6965 is a bipolar integrated circuit for use in electronic telephones. The GL6965 has low operating voltage, it provides an excellent branch performance. It has line voltage increasing circuit by the exter-nal terminal. Transmitting and receiving gains automatically vary according to the line current.
VL TO1 TO0 AC BIAS MFI TPO TPI 1 TPI 2 MUTE 1 2 3 4 5 6 7 8 9 20 19 18 17 16 15 14 13 12 11 VCC RO 1 RO 2 BT 1 RPO RPI 1 RPI 2 REF PADC UP
Pin Configurations
GND 10
Features
* Externally adjustable transmitting, receiving and Sidetone gains. * Switching between transmitting output and DTMF output is possible. * Direct interface with light and compact ceramic transmitter-receiver is possible. * Receiver follow impedance type can also be used. * Gain is automatically controlled according to the line current (Auto-PAD function). * The line voltage can be increased by the external terminal (Up function). * PKG is 20 pin DIP.
1
GL6965 Absolute Maximum Ratings ( Ta = 25C )
Parameter Line Voltage Line Current Power Dissipation Operating Temperature Storage Temperature Symbol
VL
IL PD Topr Tstg
Value 15 150 1300 -30 ~ 70 -55 ~ 150
Unit V mA mW C C
Block Diagram
VCC
20 11
UP
4
AC Bias Vref TRANSMIT SW/BUFFER + 27.4K
6 5
VL TOl TOO
1
VCC 10K + 5.5K
AC Bias AMP 4K
MFI
2
+ +
TPO
Vref
7
3
LINE DRIVER Iup TRANSMIT GAIN CONTROLLER VCC VCC 17.7K 17.7K +
TPI1
8
TPI2
TRANSMIT INPUT AMP
BTI
17
RECEIVING 9.3K Vref
SW/BUFFER +
RPO 16 RPI1 15 RPI2 14 + RECEIVING INPUT AMP INTERNAL REFERENCE CIRCUIT
18
RO2
+
19
RO1
RECEIVING DRIVE AMP RECEIVING GAIN CONTROLLER
13
VCC
12 9 10
REF
PADC
MUTE
GND
Electrical Characteristics ( Ta = 25C )
Parameter Symbol Test Circuit 1 IL=120mA IL=20mA
V CC
Test Condition IL=20mA
Min. 2.9 9 1.75 5.8
Typ. 3.2 11 1.90 6.1
Max. 3.6 14 2.20 6.6
Unit V V V V
Line Voltage
VL
Internal Power Supply Voltage
1 IL=120mA
2
GL6965
Parameter Line Voltage Amount Transmit Gain Receiving Gain MF Gain Beep Gain Transmit Dynamic Range Receiving Dynamic Range MFI Input Resistance BTI Input Resistance AC BIAS Input Resistance MUTE Terminal High Level Input Voltage MUTE Terminal Low Level Input Voltage Rise up
Sym -bol
VL GT GR G MF G BP D RT D RR
Test Circuit 2 4 5 6 8 4 5 -- -- -- --
Test Conditon IL=20mA IL=20mA IL=120mA IL=20mA IL=120mA IL=20mA IL=120mA IL=20mA IL=120mA IL=20mA IL=120mA IL=20mA IL=120mA f = 1KHz Vin = -55dBV f = 1KHz Vin = -55dBV f = 1KHz Vin = -30dBV f = 1KHz Vin = -30dBV Distortion Ratio 4% Distortion Ratio 10%
Min,. 1.1 43 40 40 34.5 24 21.5 21 21.5 2.0 4.0 3.0 6.0 21 7 21
Typ. 1.5 46 43.2 43.5 38 26.8 24 24 24.5 -- -- -- -- 30 10 30 --
Max. 2.1 48 45 46 40.5 28 25.5 27 27.5 -- -- -- -- -- -- --
VCC
Unit V dB dB dB dB dB dB dB dB Vp.p Vp.p Vp.p Vp.p
k k k
ZI(MF) ZI(BP) ZI(AB)
VIH ( MU )
IL=20mA-120mA
VIL ( MU )
VCC -
0.5 0
V
-- IL=20mA-120mA -- 0.2 V
Reference data
Parameter Internal Reference Voltage RO1, RO2 Output Impedance Total Receiving Gain MUTE Terminal Input Current UP Terminal Input Current AC Impedance Phase Symbol
VREF Z RO GR
Test Circuit 3 -- 11 9 10 -- --
Test Condition IL=20mA IL=120mA IL=30mA f=1KHz IL=20mA (Balancing Network circuit included.) IL=120mA IL=20mA VIL=0.2V IL=20mA at GND connection IL=50mA f=1KHZ IL=50mA f=1KHZ
Typ 0.66 2.8 200 14.5 9.0 -50 -35 580 3
Unit V V dB dB A A DEG
(Total)
I IL ( MU ) I IL ( MP )
|Z|TEL
3
GL6965 Pin Descriptions
Pin No. Symbol Function Explanation
1
VL
Line Current flow-in and Line Voltage terminal
2
TOI
Current flow-in terminal of transmit output
3
TOO
Current output terminal of transmit output
4
AC Bias
AC signal reference Voltage terminal
5
MFI
Input terminal of DTMF or external input signal
6 7 8
TPO TPI1 TPI2
Output terminal of transmit input Amp. Inversion input terminal of transmit input Amp. Non-inversion input terminal of transmit input Amp.
Connected to positive output of diode bridge circuit. DC potential of this terminal determines line voltage and if AC signal is not input, the highest DC potential appears. Transmit output signal and output signal of opposite transfer side are intermingled and output at this terminal in actual use. Connected to VL terminal ( 1 pin) through 43 . Since almost all the line currents flow in from this terminal, set allowable power of resistance 43 to be connected to VL terminal from this terminal considering the maximum line cur-rent expected to be used. Connected to GND terminal (10 pin) through 15 . Since almost all the line currents flow out from this terminal, set allowable power of resistance 15 to be connected to GND terminal from this terminal considering the maximum line cur-rent expected to be used. Transmit signal is sent from this terminal. Signal of this terminal varies current which is input from line through connected resistance 15 , and makes it be output at VL terminal ( 1 pin) When AC signal is input to this terminal through capacitor (for blocking DC), signal is sent to line, Input from this terminal is output to line without any relation to gain control (PAD) or MUTE since this input does not pass through gain control circuit or MUTE function Signal which is input to this terminal is output at VL terminal ( 1 pin) only when MUTE terminal ( 9 pin) is in "L" state. Since this terminal is biased to almost the same potential as REF terminal ( 13 pin), avoid direct impressing external DC potential by using capacitor at inputting external terminal. Makes negative feedback to TPI1 terminal (7 pin) Receives negative feedback from TPO terminal (6 pin)
Applies DC bias to this terminal from REF terminal13 pin) ( through resistance
4
GL6965
Pin No. 9 Symbo l MUTE Function MUTE terminal Explanation Switching terminal of transmit signal with MFI input signal in transmitting system. Switching terminal of receiving signal with BTI input signal in receiving system. "L" State-- Signal which is input from MFI is output to VL terminal ( 1 pin) Signal which is input from BTI is output to terminals RO1 and RO2. "H" or " OPEN" state Transmitting input signal is output to VL terminal ( 1 pin). Receiving input signal is 18 pin) output to terminals RO1 and RO2 19 pin, ( This terminal is pulled up by constant-current circuit Connected to negative output of diode bridge circuit. When this terminal is connected to GND terminal 10 pin) ( directly or through resistance. DC potential of VL terminal ( 1 pin) can be in-creased up to max. 1.5V (TYP.) in the same line current. This function has no relation to the state of MUTE terminal. When this terminal is connected to GND terminal 10 pin) ( or VCC terminal ( 20 pin) through resistance, operation current of gain control (Auto-PAD) performed by line current can be controlled. Voltage of this terminal is used as a reference voltage of internal amplifiers. Never used this terminal for an external power supply. Apply DC bias to this terminal from REF terminal ( 13 pin) through resistance. 16 Receives negative feedback from RPO terminal ( pin). Makes negative feedback to RPI1 terminal 15 pin). ( Signal which is input to this terminal is output to terminals RO1 and RO2 ( 19 pin and 18 pin) only when MUTE terminal ( 9 pin) is in "L" state. Since this terminal is biased to about the same potentialas REF terminal ( 3 pin), avoid direct impressing external DC voltage through capacitor at in-putting external signal Output terminal to receiver. Signal of which phase is negative to RO1 terminal (19 pin), is output. Output terminal to receiver, Signal of which phase is negative to RO2 terminal ( 18 pin), is output Power supply of internal amplifiers
10 11
GND UP
Ground terminal DC impedance control terminal
12
PADC
Pad control terminal
13
REF
Internal reference voltage Output terminal Non-inversion input terminal of receiving Input Amp. Inversion Input terminal of receiving input Amp. Output terminal of Receiving input Amp. Dial confirmation sound (Beep Tone, DTMF), monitor sound input terminal
14
RPI2
15 16 17
RPI1 RPO BTI
18 19 20
RO2 RO1
VCC
Receiving output terminal Inversion output Receiving output terminal Non-inversion output Internal power supply voltage terminal
5
GL6965 Test Circuit
R1 R2 Beep R 1F 2.2K
C6 +
1F
F
C5 330pF R9 22K
C8
+
+ R8 2.2K
+ R2 260 VL
+
20
19
18
17
16
15
14
13
100F
12
11
~
L1
~
-
1 2
R1 43 15 R4 + F
3
4
5
6
R5 22K
7
8
R7 2.2K
9
10
L2
GND
+
DTMF
T(+)
Telephone line Simulation Equivalent circuit
2F T1 Line 1
+
Trunk Power
-
T2 2i F
Line 2
6
F
22K
R6
C2 330pF
GL6965 Test Circuit (continued)
1. VL , VCC
R1
55nF
A
L1 VL V L2 VCC V
VL VCC
GND
R2 R
T(+)
2. VL , VCC (UP)
R1
A
L1 VL V L2 VCC V
VL VCC
GND
R2
R
55nF
T(+)
3. VREF
L1 I L
A
VL
R1 R2 R
55nF
L2
VREF V
VREF
T(+) UP
SWUP
7
GL6965 Test Circuit (continued) 4. G T , DR T
T1 600U A
L1
IL
VOUT V
L1 L VL
GND
R1 R2
T(+)
55nF
VIN
10K 20K
Vcc
T2
L2
L2 PADC
25K 100K SWPADC
l Transmit Gain, G T = 20 log | VOUT / VIN | (dB) l Transmit Dynamic Range: DR T = VOUT (Vp-p) at VOUT : DIST= 4%
5. G R , DR R
T1 600U
A
L1 I L
L1
R1
V
VOUT
R2 R
VIN
T2
L2
L2 PADC
Vcc
10K 20K 25K 100K SWPADC
l Receiving Gain, G R = 20 log | VOUT / VIN | (dB) l Receiving Dynamic Range: DRR = VOUT (Vp-p) at VOUT : DIST= 10%
6. G MF , DR MF
T1 600U
A
L1
IL
VOUT V
L1 L VL
R1 R2
MF
55nF
VIN GND NUTE
Vcc
10K 20K 25K 100K SWPADC
T2
L2
L2 PADC
l MF Gain, G MF = 20 log | VOUT / VIN | (dB) l MF Dynamic Range: DR MF = VOUT (Vp-p) at VOUT : DIST= 4% 8
GL6965 Test Circuit (continued) 7. G R , DR R (at RL=150; Low Impedance Type Receiver)
A
T1 600U
L1
IL VIN
L1
R
R1
4.7F
510 150 V
VOUT
GND T2
R2
0.022F Insertion is required at oscillation
L2
L2
l Receiving Gain, l Receiving Dynamic Range: at VOUT : DIST= 10%
(dB) -p)
8. G BP , DR BP
A T1 600U
L1 I L
L1
R1
V
VOUT
R2
Beep VIN
T2
L2
L2
MUTE
l Beep Gain, G BP = 20 log | VOUT / VIN | (dB) l Beep Dynamic Range: DR BP = VOUT (Vp-p) at VOUT : DIST= 10%
9. G IL (MU)
L1 IL
A
L1
R1 R2
R IN TIN
55nF
L2
L2
MUTE
A
0.2V
I IL (MU)
9
GL6965 Test Circuit (continued) 10. I IL (UP)
L1 IL
A
L1
R1 R2
R IN TIN
55nF
L2
L2
UP
A I (UP) IL
11. G R (Total)
L1
T1
IL
55nF
A
L1
R1 R2
V
VOUT
VIN
T2
L2
L2
l Total Receiving Gain, G R (Total) = 20 log | VOUT / VIN | (dB) *Balancing circuit included
10
GL6965 Block Diagram & Application Circuit
BALANCING R2 620 SW(UP) VCC AC Bias 11 VCC TRANSMIT Vref 5 DTMF 27.4K 6 TPO 22K R5 7 C3 330P R6 2.2K I2 8 SW/BUFFER AC Bias AMP 4 43/1W VL 1 R1 TOI 2 10K 4K 20 C1 0.1
NETWORK
R103 6.2K
C101 0.01
R101 1.5K
R102 11K
+
LINE
+
+
TOO 3 LINE DRIVER 5.5K
R3 150 R4 15/1W
T
C3 0.47
+
lup TRANSMIT GAIN CONTROLLER VCC VCC 9.3K 22K RPI1 17.7K 18 RPI2 14 RECEIVING INPUT AMP INTERNAL REFERENCE CIRCUIT RECEIVING GAIN CONTROLLER VCC 12 PADC 9 MUTE 10 17.7K
TRANSMITTER
BTI 17 RPO RECEIVING S SW/BUFFER
TRANSMIT INPUT AMP
BEEP TONE
R7 2..2K
11
R8 2.2K REF C4 100/25V
C6 0.47
C5 330P
R10 2.2K
R
RECEIVING DRIVER AMP 19 RECEIVER
*** UNITS *** C: F R: Ohm PKG: 20 DIP
GND
SW (MUTE)
GL6965
*** Transmit Path Gain Distribution ***
AC Bias 0.1 MF 2.2K TPO R1 TPI1 TPI2 R3 2.2K 0.47 2.2K 27.4K R2
* * * Units * * * C: uF
VL
+
R5 43
+
+
Gain Distribution
R5 620
+ + T
R5 15
The Gain value is the one roughly determined
Line Drive Amp. IL=20mA 0 dB -3 dB 0 dB IL=120mA 26 dB (At line 600 Ohm termination) 0 dB 20 dB (Externally Adjustable) AC Bias Amp. Transmit PAD Transmit SW/Buffer Transmit Input Amp.
12
BEEP TONE 0.1 R7 2.2K
*** Receiving Path Gain Distribution ***
+
* * * Unit * * * C: UF
R: Ohm
R + +
LINE R9 2.2K
L1, L2
BALANGING NETWORK
The Gain value is the one roughly determined
Balancing Network Receiving Input Amp. Receiving PAD 0 dB - 29 dB (Externally Adjustable) 20 dB (Externally Adjustable) 0 dB -5.5 dB 20 dB (Externally Adjustable) Receiving SW/Buffer Receiving Input Amp.
IL=20mA
GL6965
IL=120mA
GL6965 Description Functions
1. Line voltage increasing circuit (up) The voltage of VL,VCC or VREF can be increased by connecting UP terminal to GND directly or through the resistance. The internal equivalent circuit is as shown in the figure. (1) The voltage increased most up to about 1.5V in VL when UP terminal is directly connected to GND. when the resistance is inserted the voltage increases according to the resistance value. (See graph) (2) In case of usage with MUTE terminal connected, the line voltage can be increased only at muting. (3) Avoid impressing the voltage over VCC or under GND. (4) When not in use, make the circuit opened or connected to VCC. Internal equivalent circuit
PIN20 (VCC) 10k
5k 1.5 PIN20 (UP)
lUP
2. Side tone protection circuit (Balancing circuit)
The time constant (hereafter referred to as BN constant) of the side tone protection circuit in the example of application circuit is adjusted nearly to 0.4 7dB. Since the side tone characteristic varies according to this BN time constant, adjust the time constant confirming to the function of the telephone set. EXAMPLE OF BN TIME CONSTANT
6.2 k U 10 k 2.0 k U 0.015F
In case of 0.5 7dB is determined to be the center.
13
GL6965 3. Gain control circuit (PADC)
1) PADC terminal open state. Transmiting and receiving gains vary automatically according to the line current amount (Auto-PAD). With the increase of line current amount; the gain attenuates by about - 3dB at transmiting and about - 5.5dB at receiving. 2) In case PADC terminal is connected to GND by resistance. The gain begins to attenuate with the line current amount less than that when PADC terminal is open. Set the value of resistance to be connected at 25k Ur over. o 3) In case PADC terminal is connected to VCC by resistance. The gain begins to attenuate with the line current amount more than that when PADC terminal is open. Set the value of resistance to be connected at 10k Uor over.
*
Internal equivalent circuit.
PIN20(VCC) 5 k U
PIN12 (PADC)
IPAD
20 k U
4. MUTE circuit (MUTE) The internal equivalent circuit in the MUTE terminal is a shown in the figure below. Since the protective diode is connected between VCC and GND, avoid impressing the voltage over that of VCC or below GND. This is most suitable for input from the output of open drain or open collector type.
*
Internal equivalent circuit.
PIN 20 (VCC) Dialing Mode (High) PIN9 (MUTE) VREF
+ -
Speech Mode (High)
14
GL6965 Application
1. Transmitter As the transmitter, cthe condenser microphone. ethe ceramic type and ethe dynamic type (speaker type) are available. However, since cand eof FET or transistor built-in require the bias circuit. Externally provide the bias circuit. For example, refer to the example of the application circuit. 2. Receiver As the receiver, c ceramic type ethe low-impedance (dynamic type) are available. the (1) Ceramic type; The receiver of equivalent capacity of about 55nF is assumed. In case of the ceramic type, since the large voltage amplitude is generally required at driving, make the receiver function in BTL mode. (2) Low-impedance type; The receiver of equivalent resistance of about 150 Uis assumed. For the connections, refer to the example of application circuit. 3. Example of Application circuit. (1) EXAMPLE OF POWER SUPPLY CIRCUIT FOR CONDENSER MICROPHONE
VCC 560 +4.7F 510 R 1F -+
(2) EXAMPLE OF CONNECTION CIRCUIT OF LOW-IMPEDANCE TYPE RECEIVER.
19
0.47F T
0.022F
TO MICROPHONE INPUT
LOWIMPEDANCE TYPE RECEIVER (150)
U
18
*
*
Insert at oscillation
(3) In case of using transmit input amplifier as non-inversion input.
(4) In case of using transmit input amplifier as inversion input.
6 2.2k U _ +
TRANSMIT INPUT AMP
330pF _ +
TRANSMIT INPUT AMP
6 2.2k U 330pF 2.2k 0.47mF U T 7 8 2.2k U
7 8
2.2k U 1mF T 0.47mF 2.2k U TRANSMITER
TRANSMITER
TO 13 PIN
TO 13 PIN
Note : In test circuit and application circuit, transmit input amplifier is set at inversion input. 15
GL6965
4. Side Tone Gain Control. (1) Alternative application for side tone gin control
0.47F 2.2k VL 620 + 20 16 220F 2.2k 15 10 RS2 5.6k RSD RS1 1 k 1 43 150 15 0.47F V VRD 2 3 7 18 19 330pF 0.47F
~
L1 L2
~
B/L Circuit
GL6965
2.2k
TIN
-
The side tone gain is externally controlled by the resistor RSD (RS1+RS2) The maximum available control range of side tone gain is 0dB to 14 dB.
(2) Side tone gain, GSD to Resistor, RSD RSD (RS1+RS2) 1k U 2k U 3k U 3.5k U 4k U 5k U 6k U (3) The side tone gain is VRO ) VL GSD 14.2dB 11.1dB 2.5dB 0.2dB 1.6 dB 5.4 dB 7.5 dB
GSD= 20 log(
(dB)
16
GL6965 5. AC Impedance UP control.
(1) Application for AC impedance up control
VL
1 R1 43 O 2
20 + C8 220 F
RA1
C
ZAC
3
-1
4 0.1F
RA2 R4 15 O
-
The AC Impedance (ZAC) can be increased by using AC Bias terminal (Pin e. ) The AC Impedance up amount is determined by the external resistors R1, R2 value. :
VL O 1 IL R2 1 1 RA 2 ( ) R 4 RA1 + RA 2
(2) The AC impedance is
Z
AC
O
17
(100kO-500kO)
R2 620 O
GL6965 DC Characteristic (Normal) Test Circuit 1
16
DC Characteristic (UP) Test Circuit 2
16
14
14
12
12
VL
DC Voltage
8
VL
DC Voltage
10
10
8
VCC
6
6
VCC
4
4
2
2
0 140
20
40
60
80
100
120
Line Current, IL (mA)
0 140
20
40
60
80
100
120
Line Current, IL (mA)
VREF Voltage to Current Characteristic Test Circuit 3
4
Transmit Gain to Current Characteristic Test Circuit 4
48
3.5
47
3
Transmit Gain(dB)
46
(B)
45
2.5
Up Normal
(A)
44
(C)
2
(E) (D)
(A) (B) (C) (D) (E)
open 10k U(PADC-VCC) 20k U(PADC-VCC) 25k U(PADC-GND) 100k UPADC-GND) (
1.5
43
1
42
0.5 0 20 40 60 80 100 120 140
41
Line Current, IL (mA)
0
20
40
60
80
100
120
140
Line Current, IL (mA) 18
GL6965 Receiving Gain to Current Characteristic Input=pin 15, -55dBV Output=pin 18, pin 19 MF Gain to Current Characteristic Input=pin 15, -30dBVrms Output=pin 1
50
Test Circuit 5
Input Level=-55dBV (K) open (L) 10k U(PADC-VCC) (M) 20k U(PADC-VCC) (N) 25k U(PADC-GND) (O) 100k U(PADC-GND)
29
Test Circuit 6
Input Level=-30dBV (F) open (G) 10k U(PADC-VCC) (H) 20k U(PADC-VCC) (I) 25k U(PADC-GND) (J) 100k U(PADC-GND) (D) (E) (A) (C) (B)
48
28
Receiving Gain(dB)
46
27
MF Gain (dB)
44
26
42
25
(D) (E)
40
(A) (C)
(B)
24
38
23
36
22
0
20
40
60
80
100
120
140
0
20
40
60
80
100
120
140
Line Current, IL (mA)
Line Current, IL (mA)
Beep Gain to Current Characteristic
Receiving Gain to Current Characteristic (at using Low-impedance type receiver ; RL=150 U )
26
30
Test Circuit 8
Input Level = 30dBV
Test Circuit 7
Input Level = 55dBV RL=150 U
28
24
Beep Gain (dB)
26
Receiving Gain (dB)
22
24
20
22
18
20
16
18
14
16
12
0
20
40
60
80
100
120
140
0
20
40
60
80
100
120
140
Line Current, IL (mA) 19
Line Current, IL (mA)
GL6965
Transmit Dynamic Range to Current Characteristic Receiving Range to Current Characteristic
14
Receiving Dynamic Range (Vp-p)
16
Test Circuit 4
16
Transmit Dynamic Range (Vp-p)
Test Circuit 5
THD10%
14
12
12
10
THD 5%
10
THD 4%
8
8
THD 2%
6
6
4
4
2
2
0
20
40
60
80
100
120
140
0
20
40
60
80
100
120
140
Line Current, IL (mA)
Line Current, IL (mA)
DTMF Dynamic Range to Current Characteristic
Beep Dynamic Range to Current Charcteristic
16
Test Circuit 6 Beep Dynamic Range (Vp-p)
16
Test Circuit 8
14
14
MF Dynamic Range (Vp-p)
12
12
10
10
8
THD 4% THD 2%
8
THD10% THD 5%
6
6
4
4
2
2
0
20
40
60
80
100
120
140
0
20
40
60
80
100
120
140
Line (mA)
Current,
IL
Line Current, IL (mA)
20
GL6965
Receiving Dynamic Range to Current Characteristic At using Low-Impedance type Receiver ; RL=150 U
Total Receiving Gain to Current Characteristic (Balancing circuit included)
19 1.6
Dynamic Range (Vp-
Test Circuit 7
17
Test Circuit 11
1.4
1.2
Total Receiving Gain
15
13
1.0
0.8
THD10% THD 5%
11
9
0.6
7
0.4 5 0.2
0 140
20
40
60
80
100
120
0 140
20
40
60
80
100
120
Line Current, IL (mA)
Line Current, IL (mA)
AC Impedance to Frequency Characteristic (IL = 120 mA)
700
AC Impedance
600
500 100 5k
Frequency (Hz)
21
GL6965
Mute Terminal pull-up current characteristic
Test Circuit 9
14 0
at VIL= 0.2V
Current Value (iA)
12 0
10 0
80
60
40
20 0 20 40 60 80 100 120 140
Line Current, IL (mA)
Line Voltage Rise up Characteristic
Test Circuit 2
5.0
Line Voltage VL (V)
4.6
IL=20mA
4.2
3.8
3.4
3.0
Resistance between up terminal and GND terminal ( U )
22
GL6965
Transmit Gain to Frequency Characteristic Test Circuit 4 Transmit Gain (dB)
50 IL=120mA 45 IL=120mA 40 Input Level=-55dBV
35 100 1k 5k
Frequency (Hz) Receiving gain to Frequency Characteristic Test Circuit 5 Gain
Input Level=-55dBV IL=120mA
IL=120mA
100
1k
5k
Frequency (Hz) Line Voltage to Temperature Characteristic
16
Internal Power Supply Voltage to Temperature Characteristic
16
Test Circuit 1
-35 E 75 E 100 E
Test Circuit 1
14
14
12
12
DC Voltage (V)
10
DC Voltage (V)
10
8
8
-35 E 75 E 100 E
6
6
4
4
2
2
0 140
20
40
60
80
100
120
0 140
20
40
60
80
100
120
Line Current, IL (mA)
Line Current, IL (mA)
23

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