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FDZ203N September 2005 FDZ203N N-Channel 2.5V Specified PowerTrench(R) BGA MOSFET General Description Combining Fairchild's advanced 2.5V specified PowerTrench process with state of the art BGA packaging, the FDZ203N minimizes both PCB space This BGA MOSFET embodies a and RDS(ON). breakthrough in packaging technology which enables the device to combine excellent thermal transfer characteristics, high current handling capability, ultralow profile packaging, low gate charge, and low RDS(ON). Features * 7.5 A, 20 V. RDS(ON) = 18 m @ VGS = 4.5 RDS(ON) = 30 m @ VGS = 2.5 V * Occupies only 4 mm2 of PCB area. Less than 40% of the area of a SSOT-6 * Ultra-thin package: less than 0.80 mm height when mounted to PCB * Ultra-low Qg x RDS(ON) figure-of-merit. * High power and current handling capability. Applications * Battery management * Load switch * Battery protection GATE D Bottom Index slot S G Top Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ, TSTG TA=25oC unless otherwise noted Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous (Note 1a) - Pulsed Power Dissipation (Steady State) (Note 1a) Operating and Storage Junction Temperature Range Ratings 20 12 7.5 20 1.6 -55 to +150 Units V V A W C Thermal Characteristics RJA RJB RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ball Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) (Note 1) 67 11 1 C/W Package Marking and Ordering Information Device Marking 203N Device FDZ203N Reel Size 7'' Tape width 8mm Quantity 3000 units (c)2004 Fairchild Semiconductor Corporation FDZ203N Rev. E6(W) FDZ203N Electrical Characteristics Symbol BVDSS BVDSS TJ IDSS IGSSF IGSSR VGS(th) VGS(th) TJ RDS(on) TA = 25C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage, Forward Gate-Body Leakage, Reverse (Note 2) Test Conditions VGS = 0 V, ID = 250 A ID = 250 A, Referenced to 25C VDS = 16 V, VGS = 12 V, VGS = -12 V, VGS = 0 V VDS = 0 V VDS = 0 V Min 20 Typ Max Units V mV/C 1 100 -100 A nA nA V mV/C m Off Characteristics 14 On Characteristics Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note 2) Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = VGS, ID = 250 A ID = 250 A, Referenced to 25C VGS = 4.5 V, ID = 7.5 A ID = 5.5 A VGS = 2.5 V, VGS = 4.5 V, ID = 7.5 A, TJ=125C VGS = 4.5 V, VDS = 5 V VDS = 10 V, ID = 7.5 A VDS = 10 V, f = 1.0 MHz V GS = 0 V, 0.6 0.8 -3 14 20 20 1.5 18 30 28 ID(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS VSD trr Qrr 20 33 1127 268 134 8 11 26 8 11 2 3 16 20 42 16 15 A S pF pF pF ns ns ns ns nC nC nC A V nS nC Dynamic Characteristics Switching Characteristics VDD = 10V, VGS = 4.5 V, ID = 1 A, RGEN = 6 VDS = 10 V, VGS = 4.5 V ID = 7.5 A, Drain-Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward VGS = 0 V, IS = 1.3 A Voltage Diode Reverse Recovery Time IF = 9A, Diode Reverse Recovery Charge diF/dt = 100 A/s (Note 2) 0.7 20 14 1.3 1.2 Notes: 1. RJA is determined with the device mounted on a 1 in 2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. The thermal resistance from the junction to the circuit board side of the solder ball, RJB, is defined for reference. For RJC, the thermal reference point for the case is defined as the top surface of the copper chip carrier. RJC and RJB are guaranteed by design while RJA is determined by the user's board design. a) 67 C/W when mounted on a 1in2 pad of 2 oz copper, 1.5" x 1.5" x 0.062" thick PCB b) 155 C/W when mounted on a minimum pad of 2 oz copper Scale 1 : 1 on letter size paper 2. 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% FDZ203N Rev.E6(W) FDZ203N Dimensional Outline and Pad Layout FDZ203N Rev.E6(W) FDZ203N Typical Characteristics 30 2.4 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 4.5V 3.5V 2.5V 3.0V 2.0V 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0 0.5 1 1.5 2 2.5 3 3.5 25 ID, DRAIN CURRENT (A) 20 15 10 5 0 VGS = 2.0V 2.5V 3.0V 3.5V 4.0V 4.5V 0 5 10 15 20 25 30 VDS, DRAIN-SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.07 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE RDS(ON), ON-RESISTANCE (OHM) ID = 9A VGS = 4.5V 1.4 ID = 4.5 A 0.06 0.05 1.2 0.04 1 TA = 125oC 0.03 0.8 TA = 25oC 0.02 0.6 -50 -25 0 25 50 75 100 o 125 150 0.01 1 2 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. 25 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 TA = -55oC 125oC 25oC IS, REVERSE DRAIN CURRENT (A) VDS = 5V ID, DRAIN CURRENT (A) 20 VGS = 0V 10 TA = 125oC 1 25oC 0.1 -55oC 0.01 0.001 0.0001 15 10 5 0 0.5 1 1.5 2 2.5 VGS, GATE TO SOURCE VOLTAGE (V) 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDZ203N Rev.E6(W) FDZ203N Typical Characteristics 5 VGS, GATE-SOURCE VOLTAGE (V) 1800 ID = 9A 4 VDS = 5V 15V 10V 1500 CAPACITANCE (pF) 1200 f = 1MHz VGS = 0 V 3 CISS 900 600 2 COSS 300 1 CRSS 0 0 2 4 6 8 10 12 14 Qg, GATE CHARGE (nC) 0 0 5 10 15 20 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 100 RDS(ON) LIMIT 1ms ID, DRAIN CURRENT (A) 10 100ms 1 DC VGS = 4.5V SINGLE PULSE RJA = 155oC/W TA = 25oC 0.01 0.1 1 10 100 VDS, DRAIN-SOURCE VOLTAGE (V) 10s 1s 10ms P(pk), PEAK TRANSIENT POWER (W) 50 Figure 8. Capacitance Characteristics. 40 SINGLE PULSE RJA = 155C/W TA = 25C 30 20 0.1 10 0 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 0.1 0.1 0.05 0.02 RJA(t) = r(t) + RJA RJA = 155 C/W P(pk) t1 t2 SINGLE PULSE 0.01 0.01 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2 0.001 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDZ203N Rev.E6(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM FAST(R) ActiveArrayTM FASTrTM BottomlessTM FPSTM Build it NowTM FRFETTM CoolFETTM GlobalOptoisolatorTM CROSSVOLTTM GTOTM DOMETM HiSeCTM EcoSPARKTM I2CTM E2CMOSTM i-LoTM EnSignaTM ImpliedDisconnectTM FACTTM IntelliMAXTM FACT Quiet SeriesTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM DISCLAIMER ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerEdgeTM PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHCTM UltraFET(R) UniFETTM VCXTM WireTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I16 |
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