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| C20G 2.0m High Voltage CMOS/DMOS Process 5V CMOS integrated with high voltage lateral DMOS and extended drain PMOS-- particularly cost effective for applications with a low digital gate count C20G Overview Double poly, two metal layers P-type epitaxy over p+ substrate Allows the integration of 5V CMOS with high voltage lateral DMOS and extended drain PMOS. Particularly cost effective for applications with a low digital gate count. Features 5V mixed signal CMOS Fully enhanced with 5V on the Gate DMOS Blocking Voltages from 72V to >300V High Voltage PMOS 72V to 300V Isolated vertical NPN High Value (10k/sq) and Low TCR poly resistors Low specific RON Low mask count Double resurf technique allows wide range of breakdown voltage to be attained simply through layout variation BSIM3v3.22 models available in Spectre and HSPICE format Cadence Foundry Design Kit (FDK) available Safe Operating Area characterised for high voltage devices Applications Information Technology - Ink jet printers heads, Digital Mirror Displays, Computer peripherals, Display drivers, Printer, Plotter Biomedical - Electrokinetics, LOAC, -Fluidics, Bio-particles Sorting, Drug Delivery, Ultrasound imaging Telecom - DWDM, VOAs, OADMs, OXCs, Electro-optics, Mirrors, -coils, RF amplifier, Multiplexer, SLIC, Ring generator Automotive - Most Applications : Speed, Angles, Acceleration, Pressure, I-MEMS Industrial - AC-DC converter, Relays, Linear amplifier, Current regulator, HV generator D M O S O n -Re sista n ce vs B re a kd o w n Voltag e S p e c i f ic O n -R e s i s ta n c e ( m -c m 2 ) 1 0 00 100 10 1 0 .1 100 Analog Capabilities Double Poly Capacitor (C=0.75fF/sq m) Four types of poly resistors including high value and low TCR Isolated 10V vertical npn ( = 75) C2 0G Th e o r e tica l s ilico n lim it 1 0 00 B V d ss (V ) Simplified Cross-Section of DMOS B S G p -to p N -W e ll D n+ p -to p G 27-Sep-02 03-70-00149-00 www.dalsasemi.com p+ n+ p -ba se p -e p ita xy p -b a se DALSA Semiconductor * C20G High Voltage CMOS/DMOS Process C20F 2.0m 5/40V CMOS/DMOS Process Electrical Parameters of Representative Transistors Parameter W x L (m) VT (V) Ids (mA) Bvdss (V) Isub (A/m) RON () 5V NMOS 50 X 2 0.7 7.5 15 0.15 220 5V PMOS 50 X 2 -0.7 3.75 14 630 200V DMOS 120 X 0.8 1.25 16 225 0.27 380 100V EDPMOS 148 X 3 -0.7 8.7 135 1100 200V DMOS (L=0.8m, W=120m) 100V EDPMOS (L=3m, W=148m) For More Information DALSA Semiconductor 18 Blvd de l'aeroport Bromont Quebec Canada J2L 1S7 Tel : +01 800 718 9701 Fax : +01 450 534 3201 e-mail: sales@dalsasemi.com www.dalsasemi.com 27-Sep-02 27-Sep-02 03-70-00149-00 03-70-00149-00 www.dalsasemi.com www.dalsasemi.com |
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