View WEDF1M32B-905_365983.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

WEDF1M32B-XXX5
HI-RELIABILITY PRODUCT
1Mx32 5V FLASH MODULE
FEATURES
ADVANCED*
s Access Times of 70, 90, 120ns s Packaging: * 66 pin, PGA Type, 1.185" square, Hermetic Ceramic HIP (Package 401) * 68 lead, 22mm Low Profile CQFP, 4.6mm (0.180"), (Package 509) s Sector Architecture * One 16KByte Sectors * Two 8KByte Sectors * One 32KByte Sectors * Fifteen 64KByte Sectors s 1,000,000 Erase/Program Cycles
s s s s s s
Organized as 1Mx32, user configurable as 2Mx16 or 4Mx8. Commercial, Industrial and Military Temperature Ranges 5V 10% for Read and Write Operations. Low Power CMOS Embedded Erase and Program Algorithm Built-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation s Weight WEDF1M32B-XG2TX5 - 8 grams typical WEDF1M32B-XHX5 - 13 grams typical
* This data sheet describes a product that may or may not be under development and is subject to change or cancellation without notice.
FIG. 1
1 I/O8 I/O9 I/O10 A14 A16 A11 A0 A18 I/O0 I/O1 I/O2 11
PIN CONFIGURATION FOR WEDF1M32B-XHX5 TOP VIEW
12 RESET CS2 GND I/O11 A10 A9 A15 VCC CS1 A19 I/O3 22 33 23 I/O15 I/O14 I/O13 I/O12 OE A17 WE I/O7 I/O6 I/O5 I/O4 I/O24 I/O25 I/O26 A7 A12 NC A13 A8 I/O16 I/O17 I/O18 44 34 VCC CS4 NC I/O27 A4 A5 A6 NC CS3 GND I/O19 55 45 I/O31 I/O30 I/O29 I/O28 A1 A2 A3 I/O23 I/O22 I/O21 I/O20
1M x 8 1M x 8 1M x 8 1M x 8 RESET WE OE A0-19
PIN DESCRIPTION
56
I/O0-31 A0-19 WE CS1-4 OE RESET VCC GND NC
Data Inputs/Outputs Address Inputs Write Enable Chip Selects Output Enable Reset Power Supply Ground Not Connected
BLOCK DIAGRAM
CS1 CS2 CS3 CS4
66
8 8 8 8
I/O0-7
I/O8-15
I/O16-23
I/O24-31
May 1999 Rev. 1
1
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
WEDF1M32B-XXX5
FIG. 2
PIN CONFIGURATION FOR WEDF1M32B-XG2TX5 TOP VIEW
RESET A0 A1 A2 A3 A4 A5 CS3 GND CS4 WE1 A6 A7 A8 A9 A10 VCC
PIN DESCRIPTION
I/O0-31 A0-19 WE1-4
I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31
Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Reset Power Supply
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
A16 CS1 OE CS2 A17 WE2 WE3 WE4 A18 A19 NC A11 A12 A13 A14 VCC A15
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44
CS1-4 OE
0.940"
RESET VCC
The White 68 lead G2T CQFP GND Ground fills the same fit and function as NC Not Connected the JEDEC 68 lead CQFJ or 68 PLCC. But the G2T has the TCE and lead inspection advantage of the CQFP form. BLOCK DIAGRAM
WE1 CS1 RESET OE A0-19 WE2 CS2 WE3 CS3 WE4 CS4
1M x 8
1M x 8
1M x 8
1M x 8
8
8
8
8
I/O0-7
I/O8-15
I/O16-23
I/O24-31
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
2
WEDF1M32B-XXX5
ABSOLUTE MAXIMUM RATINGS
Parameter Voltage on Any Pin with Respect to GND - VCC and VPP) Voltage with Respect to GND - A9, OE, and RESET (2) Voltage with Respect to GND - All other pins (1) Output Short Circuit Current -0.5 to +7.0 -2.0 to +12.5 -2.0 to +7.0 200 Unit V V V mA Parameter OE capacitance WE1-4 capacitance CS1-4 capacitance Data I/O capacitance Address input capacitance
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage Input High Voltage Input Low Voltage Operating Temp. (Mil.) Symbol VCC VIH VIL TA Min 4.5 2.0 -0.5 -55 Max 5.5 VCC + 0.5 +0.8 +125 Unit V V V C
CAPACITANCE (TA = +25C)
Symbol COE CWE CCS CI/O CAD Conditions VIN = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz VI/O = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz Max 50 20 20 20 50 Unit pF pF pF pF pF
NOTES: 1. Minimum DC voltage is -0.5V on input/output pins. During transitions, this level may undershoot to -2.0V for periods <20ns. Maximum DC voltage on input/output pins is VCC + 0.5V which, during transitions, may overshoot to VCC + 2.0V for periods <20ns. 2. Minimum DC input voltage on pins A9, OE, and RESET is -0.5V. During voltage transitions, A9, OE, and RESET may undershoot Vss to -2.0V for periods of up to 20ns. See Figure 6. Maximum DC input voltage on pin A9 is +12.5V which may overshoot to +13.5V for periods up to 20ns. 3. Output shorted for no more than one second. No more than one output shorted at a time. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a Stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
This parameter is guaranteed by design but not tested.
DATA RETENTION
Parameter Minimum Pattern Data Retention Time Test Conditions 150C 125C Min 10 20 Unit Years Years
FIG. 3
AC TEST CIRCUIT
Current Source I OL
AC TEST CONDITIONS
Parameter Input Pulse Levels Input Rise and Fall Input and Output Reference Level
D.U.T. VZ
Typ VIL = 0, VIH = 3.0 5 1.5 1.5
Unit V ns V V
1.5V
Output Timing Reference Level
C eff = 50 pf
(Bipolar Supply)
I OH Current Source
NOTES: VZ is programmable from -2V to +7V. IOL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75 . VZ is typically the midpoint of VOH and VOL. IOL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance.
3
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
WEDF1M32B-XXX5
DC CHARACTERISTICS - CMOS COMPATIBLE (VCC = 5.0V, GND = 0V, TA = -55C to +125C)
Parameter Input Leakage Current Output Leakage Current VCC Read Current (1,2) VCC Write Current (2,3,4) VCC Standby Current (2,5) Output Low Voltage Output High Voltage Low VCC Lockout Voltage (4) Symbol ILI ILO ICC1 ICC2 ICC3 VOL VOH VLKO VIN = VCC to GND VOUT = VCC to GND CS = VIL, OE VIH, f = 5 MHz, IOUT = 0mA CS = VIL, OE VIH CS = RESET = OE = VIH, f = 5MHz VCC = 4.5, IOL = 5.8 mA VCC = 4.5, IOH = -2.5 mA 2.4 3.2 4.2 Conditions Min Max 10 10 160 200 20.0 0.45 Unit A A mA mA mA V V V
NOTES: 1. The Icc current listed is typically less than 2mA/MHz, with OE at VIH. 2. Maximum Icc specifications are tested with VCC = VCC max. 3. ICC active while Embedded Erase or Embedded Program is in progress. 4. Not 100% tested. 5. ICC3 = 20A max at extended temperature (> +85C).
AC CHARACTERISTICS - WRITE/ERASE/PROGRAM OPERATIONS - WE CONTROLLED (VCC = 5.0V, GND = 0V, TA = -55C to +125C)
Parameter Write Cycle Time Chip Select Setup Time Write Enable Pulse Width Address Setup Time Data Setup Time Data Hold Time Address Hold Time Chip Select Hold Time Write Enable Pulse Width High Programming Operation (2) Sector Erase Operation (3) Write Recovery before Read Chip Programming Time NOTES: 1. Guaranteed by design, not tested. 2. Typical value for tWHWH1 is 7s. 3. Typical value for tWHWH2 is 1sec. tAVAV tELWL tWLWH tAVWH tDVWH tWHDX tWHAX tWHEH tWHWL tWHWH1 tWHWH2 tWHGL 0 50 Symbol Min tWC tCS tWP tAS tDS tDH tAH tCH tWPH 70 0 35 0 30 0 45 0 20 300 8 0 50 -70 Max Min 90 0 45 0 45 0 45 0 20 300 8 0 50 -90 Max Min 120 0 50 0 50 0 50 0 20 300 8 -120 Max ns ns ns ns ns ns ns ns ns s sec s sec Unit
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
4
WEDF1M32B-XXX5
AC CHARACTERISTICS - WRITE OPERATION - CS CONTROLLED (1) (VCC = 5.0V, GND = 0V, TA = -55C to +125C)
Parameter Write Enable Cycle Time Write Enable Setup Time Chip Select Pulse Width Address Setup Time Data Setup Time Data Hold Time Address Hold Time Write Enable Hold Time Chip Select Pulse Width High Programming Operation (1) Sector Erase Operation (2) Write Recovery before Read NOTES: 1. Typical value for tWHWH1 is 7s. 2. Typical value for tWHWH2 is 1sec. tAVAV tWLEL tELEH tAVEH tDVEH tEHDX tEHAX tEHWH tEHEL tWHWH1 tWHWH2 tEHGL 0 Symbol Min tWC tWS tCP tAS tDS tDH tAH tWH tEPH 70 0 35 0 30 0 45 0 20 300 8 0 -70 Max Min 90 0 45 0 45 0 45 0 20 300 8 0 -90 Max Min 120 0 50 0 50 5 50 0 20 300 8 -120 Max ns ns ns ns ns ns ns ns ns s sec s Unit
AC CHARACTERISTICS - READ-ONLY OPERATIONS (VCC = 5.0V, GND = 0V, TA = -55C to +125C)
Parameter Read Cycle Time Address Access Time Chip Select to Output Valid (1) Output Enable to Output Valid (1) Chip Select to Output Low Z (2) Chip Select High to Output High Z (2) Output Enable to Output Low Z (2) Output Enable High to Output High Z (2) Output Hold from Addresses, CS or OE Change, Whichever is First (2) tAVAV tAVQV tELQV tGLQV tELQX tEHQZ tGLOX tGHQZ Symbol Min tRC tACC tCE tOE tLZ tHZ tOLZ tDF tOH 0 0 20 0 0 20 0 20 0 70 70 70 30 0 20 0 30 -70 Max Min 90 90 90 35 0 50 -90 Max Min 120 120 120 50 -120 Max ns ns ns ns ns ns ns ns ns Unit
NOTES: 1. OE may be delayed up to tCE-tOE after the falling edge of CS without impact on tCS. 2. Guaranteed by design, not tested.
5
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
WEDF1M32B-XXX5
PACKAGE 509:
68 LEAD, LOW PROFILE CERAMIC QUAD FLAT PACK, CQFP (G2T)
25.15 (0.990) 0.26 (0.010) SQ 22.36 (0.880) 0.26 (0.010) SQ 4.57 (0.180) MAX 0.27 (0.011) 0.04 (0.002)
Pin 1
0.25 (0.010) REF
24.03 (0.946) 0.26 (0.010) 1 / 7 1.0 (0.040) 0.127 (0.005)
R 0.25 (0.010) 0.19 (0.007) 0.06 (0.002)
23.87 (0.940) REF
DETAIL A
1.27 (0.050) TYP 0.38 (0.015) 0.05 (0.002) 20.3 (0.800) REF SEE DETAIL "A"
The White 68 lead G2T CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2T has the TCE and lead inspection advantage of the CQFP form.
0.940" TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
6
WEDF1M32B-XXX5
PACKAGE 401:
66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H)
30.1 (1.185) 0.38 (0.015) SQ
PIN 1 IDENTIFIER SQUARE PAD ON BOTTOM
25.4 (1.0) TYP
6.22 (0.245) MAX 3.81 (0.150) 0.1 (0.005) 2.54 (0.100) TYP 1.27 (0.050) 0.1 (0.005) 0.76 (0.030) 0.1 (0.005) 15.24 (0.600) TYP 1.27 (0.050) TYP DIA 0.46 (0.018) 0.05 (0.002) DIA 25.4 (1.0) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
7
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
WEDF1M32B-XXX5
ORDERING INFORMATION WED F 1M32 B - XXX X X 5 X
LEAD FINISH: Blank = Gold plated leads A = Solder dip leads VPP PROGRAMMING VOLTAGE 5 = 5V DEVICE GRADE: M = Military Screened I = Industrial C = Commercial
-55C to +125C -40C to +85C 0C to +70C
PACKAGE TYPE: H = Ceramic Hex-In-Line Package, HIP (Package 401) G2T = 22mm Ceramic Quad Flat Pack, Low Profile CQFP (Package 509) ACCESS TIME (ns) Bottom Boot Block ORGANIZATION, 1M x 32 User configurable as 2M x 16 or 4M x 8 Flash WHITE ELECTRONIC DESIGNS CORP.
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
8

▲Up To Search▲

Price & Availability of WEDF1M32B-905

	To Download WEDF1M32B-905 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .