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 STB10NB20
N-CHANNEL 200V - 0.30 - 10A D2PAK PowerMESHTM MOSFET
TYPE STB10NB20
s s s s s s
VDSS 200 V
RDS(on) <0.40
ID 10 A
TYPICAL RDS(on) = 0.30 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED FOR THROUGH-HOLE VERSION CONTACT SALES OFFICE
3 1
D2PAK TO-263 (suffix"T4")
DESCRIPTION Using the latest high voltage MESH OVERLAYTM process, STMicroelectronis has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company's proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/ dt capabilities and unrivalled gate charge and switching characteristics. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLIES (SMPS) s DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM(*) Ptot dv/dt Tj
(2)
INTERNAL SCHEMATIC DIAGRAM
Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25C Drain Current (continuos) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature
Value 200 200 30 10 6 40 85 0.68 5.5 -65 to 150 150
ISD 10A, di/dt 300A/s, VDD V(BR)DSS, Tj TJMAX.
Unit V V V A A A W W/C V/ns C C
Tstg
(*)Pulse width limited by safe operating area.
December 2000
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THERMAL DATA
Rthj-case Rthj-amb Rthc-sink Tj Thermal Resistance Junction-case Thermal Resistance Junction-ambient Thermal Resistance Case-sink Maximum Lead Temperature For Soldering Purpose Max Max Typ 1.47 62.5 0.5 300 C/W C/W C/W C
AVALANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 50 V) Max Value 10 150 Unit A mJ
ELECTRICAL CHARACTERISTICS (Tcase = 25 C unless otherwise specified) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A VGS = 0 Min. 200 1 10 100 Typ. Max. Unit V A A nA
VDS = Max Rating VDS = Max Rating TC = 125 C VGS = 30 V
ON (*)
Symbol VGS(th) IDS(on) ID(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance On State Drain Current Test Conditions VDS = VGS VGS = 10V ID = 250 A ID = 5 A 10 Min. 3 Typ. 4 0.30 Max. 5 0.40 Unit V A
VDS > ID(on) x RDS(on)max VGS = 10 V
DYNAMIC
Symbol gfs
(*)
Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitances
Test Conditions VDS>ID(on) x RDS(on)max ID=5 A VDS = 25V f = 1 MHz VGS = 0
Min. 3
Typ. 4 470 135 22
Max.
Unit S
Ciss Coss Crss
650 190 30
pF pF pF
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ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Test Conditions Min. Typ. 10 15 17 7.5 5.5 Max. 14 20 24 Unit ns ns nC nC nC Turn-on Delay Time Rise Time VDD = 100 V ID = 5 A VGS = 10 V RG = 4.7 (see test circuit, Figure 3) Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD=160V ID=10A VGS=10V
SWITCHING OFF
Symbol tr(Voff) tr tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 160 V ID = 10 A VGS = 10 V RG = 4.7 (see test circuit, Figure 5) Min. Typ. 8 10 20 Max. 11 14 28 Unit ns ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (*) VSD (*) trr Qrr Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 10 A VGS = 0 170 980 11.5 Test Conditions Min. Typ. Max. 10 40 1.5 Unit A A V ns nC A
IRRM
ISD = 10 A di/dt = 100 A/s VDD = 50 V Tj = 150 C (see test circuit, Figure 5)
(*)Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. (*)Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedance
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STB10NB20
Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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Normalized Gate Threshold Voltage vs Temperature Normalized Gate Threshold Voltage vs Temperature
Source-drain Diode Forward Characteristics
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STB10NB20
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STB10NB20
D2PAK MECHANICAL DATA
DIM. A A1 A2 B B2 C C2 D D1 E E1 G L L2 L3 M R V2
mm. MIN. 4.4 2.49 0.03 0.7 1.14 0.45 1.23 8.95 8 10 8.5 4.88 15 1.27 1.4 2.4 0.4 0 8 5.28 15.85 1.4 1.75 3.2 0.192 0.590 0.050 0.055 0.094 10.4 0.393 TYP MAX. 4.6 2.69 0.23 0.93 1.7 0.6 1.36 9.35 MIN. 0.173 0.098 0.001 0.027 0.044 0.017 0.048 0.352
inch TYP. MAX. 0.181 0.106 0.009 0.036 0.067 0.023 0.053 0.368 0.315 0.334 0.208 0.625 0.055 0.068 0.126 0.015
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics (c) 2000 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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