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APT7M120B APT7M120S
1200V, 8A, 2.1 Max
N-Channel MOSFET
Power MOS 8TM is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability.
TO -2 47
D3PAK
APT7M120B
APT7M120S
D
Single die MOSFET
G S
FEATURES
* Fast switching with low EMI/RFI * Low RDS(on) * Ultra low Crss for improved noise immunity * Low gate charge * Avalanche energy rated * RoHS compliant
TYPICAL APPLICATIONS
* PFC and other boost converter * Buck converter * Two switch forward (asymmetrical bridge) * Single switch forward * Flyback * Inverters
Absolute Maximum Ratings
Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25C Continuous Drain Current @ TC = 100C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive
1
Ratings 8 5 28 30 575 3
Unit
A
V mJ A
Thermal and Mechanical Characteristics
Symbol PD RJC RCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) 0.22 Package Weight 6.2 10 Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw 1.1 MicrosemiWebsite-http://www.microsemi.com N*m -55 0.11 150 C 300
5-2009 050-8104 Rev B
Min
Typ
Max 335 0.37
Unit W C/W
oz g in*lbf
Static Characteristics
Symbol
VBR(DSS) VBR(DSS)/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS
TJ = 25C unless otherwise specified
Test Conditions
VGS = 0V, ID = 250A Reference to 25C, ID = 250A VGS = 10V, ID = 3A VGS = VDS, ID = 1mA VDS = 1200V VGS = 0V TJ = 25C TJ = 125C
APT7M120B_S
Typ 1.41 1.50 4 -10 Max Unit V V/C V mV/C A nA
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance
3
Min 1200
Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current
3
2.1 5 100 500 100
VGS = 30V
Dynamic Characteristics
Symbol
gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf
4
TJ = 25C unless otherwise specified
Test Conditions
VDS = 50V, ID = 3A VGS = 0V, VDS = 25V f = 1MHz
Parameter
Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related
Min
Typ 8 2565 31 190 75
Max
Unit S
pF
VGS = 0V, VDS = 0V to 800V
5
Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time
VGS = 0 to 10V, ID = 3A, VDS = 600V Resistive Switching VDD = 800V, ID = 3A RG = 4.7 6 , VGG = 15V
38 80 13 37 14 8 45 13
nC
ns
Source-Drain Diode Characteristics
Symbol
IS ISM VSD trr Qrr dv/dt
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt
Test Conditions
MOSFET symbol showing the integral reverse p-n junction diode (body diode)
Min
D
Typ
Max 8
Unit
G S
A 28 1.0 1165 18 10 V ns C V/ns
ISD = 3A, TJ = 25C, VGS = 0V ISD = 3A, VDD = 100V 3 diSD/dt = 100A/s, TJ = 25C ISD 3A, di/dt 1000A/s, VDD = 800V, TJ = 125C
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25C, L = 127.78mH, RG = 4.7, IAS = 3A. 3 Pulse test: Pulse Width < 380s, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -1.17E-7/VDS^2 + 1.42E-8/VDS + 2.01E-11.
5-2009
6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
050-8104
Rev B
APT7M120B_S
25
V
GS
8
= 10V T = 125C
J
7 20 ID, DRAIN CURRENT (A)
TJ = -55C
V
GS
= 6, 7, 8 & 9V
ID, DRIAN CURRENT (A)
6 5 4
5V
15
10
TJ = 25C
3 2 1 0 0
4.5V
5
TJ = 125C TJ = 150C
0
0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics
5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
3.0
NORMALIZED TO VGS = 10V @ 3A
30
VDS> ID(ON) x RDS(ON) MAX. 250SEC. PULSE TEST @ <0.5 % DUTY CYCLE
2.5 ID, DRAIN CURRENT (A)
25
2.0
20
TJ = -55C TJ = 25C
1.5
15
1.0
10
TJ = 125C
0.5 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (C) Figure 3, RDS(ON) vs Junction Temperature 10
5 0
0
1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics
4,000 1,000 C, CAPACITANCE (pF)
TJ = -55C TJ = 25C TJ = 125C
Ciss
gfs, TRANSCONDUCTANCE
8
6
100
4
Coss 10 Crss 1
2
0
0
1 2 3 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current
ID = 3A
4
200 400 600 800 1000 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 30 ISD, REVERSE DRAIN CURRENT (A)
0
16 VGS, GATE-TO-SOURCE VOLTAGE (V) 14 12
25
VDS = 240V
10
VDS = 600V
20
TJ = 25C
8 6
VDS = 960V
15
TJ = 150C
4 2 20 40 60 80 100 120 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 0 0
5 0 Rev B 050-8104
0.2 0.4 0.6 0.8 1.0 1.2 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
0
5-2009
10
APT7M120B_S
40 40
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
10
IDM
10
IDM Rds(on) 13s 100s 1ms 10ms 100ms DC line
13s 100s
1
Rds(on) 1ms 10ms TJ = 125C TC = 75C 100ms DC line
1
TJ = 150C TC = 25C
Scaling for Different Case & Junction Temperatures: ID = ID(T = 25C)*(TJ - TC)/125
0.1
1
10 100 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area
0.1
C
10 100 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area
1
0.40 0.35 0.30 0.7 0.25 0.20 0.15 0.3 0.10 0.05 0 10-5 0.1 0.05 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration 10-4 1.0 SINGLE PULSE 0.5
Note:
ZJC, THERMAL IMPEDANCE (C/W)
D = 0.9
PDM
t1 t2
t1 = Pulse Duration Duty Factor D = 1/t2 Peak TJ = PDM x ZJC + TC
t
TO-247 (B) Package Outline
e3 100% Sn Plated
15.49 (.610) 16.26 (.640) 5.38 (.212) 6.20 (.244)
D3PAK Package Outline
Drain (Heat Sink)
4.98 (.196) 5.08 (.200) 1.47 (.058) 1.57 (.062) 15.95 (.628) 16.05(.632) 13.41 (.528) 13.51(.532)
4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 6.15 (.242) BSC
1.04 (.041) 1.15(.045)
Drain
20.80 (.819) 21.46 (.845) 3.50 (.138) 3.81 (.150)
Revised 4/18/95
13.79 (.543) 13.99(.551)
Revised 8/29/97
11.51 (.453) 11.61 (.457)
0.46 (.018) 0.56 (.022) {3 Plcs}
4.50 (.177) Max. 2.87 (.113) 3.12 (.123) 1.65 (.065) 2.13 (.084) 1.01 (.040) 1.40 (.055)
5-2009
0.40 (.016) 0.79 (.031)
0.020 (.001) 0.178 (.007) 2.67 (.105) 2.84 (.112)
1.27 (.050) 1.40 (.055) 1.98 (.078) 2.08 (.082) 5.45 (.215) BSC {2 Plcs.}
19.81 (.780) 20.32 (.800)
1.22 (.048) 1.32 (.052)
3.81 (.150) 4.06 (.160) (Base of Lead)
Rev B
Gate Drain Source
Heat Sink (Drain) and Leads are Plated
2.21 (.087) 2.59 (.102)
050-8104
5.45 (.215) BSC 2-Plcs.
Dimensions in Millimeters and (Inches)
Source Drain Gate Dimensions in Millimeters (Inches)
Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.

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