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WS512K32-XXX / EDI8C32512CA HI-RELIABILITY PRODUCT
512Kx32 SRAM MODULE, SMD 5962-94611
FEATURES
s Access Times of 15*, 17, 20, 25, 35, 45, 55ns s Packaging * 66 pin, PGA Type, 1.075" square, Hermetic Ceramic HIP (Package 400). * 68 lead, 40mm Hermetic Low Profile CQFP, 3.5mm (0.140") (Package 502), Package to be developed. * 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880") square (Package 509) 4.57mm (0.180") height. Designed to fit JEDEC 68 lead 0.990" CQFJ footprint (Fig. 3). s Organized as 512Kx32, User Configurable as 1Mx16 or 2Mx8 s Commercial, Industrial and Military Temperature Ranges s TTL Compatible Inputs and Outputs s 5 Volt Power Supply s Low Power CMOS s Built-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation s Weight WS512K32-XH1X - 13 grams typical WS512K32-XG2TX / EDI8C32512CA-E - 13 grams typical WS512K32-XG4TX - 20 grams typical NOTE: For non-SMD new designs, please use the WS512K32XXX part number for inquiries and orders.
* 15ns Access Time available only in Commercial and Industrial Temperature. This speed is not fully characterized and is subject to change without notice.
FIG. 1
1 I/O8 I/O9 I/O10 A13 A14 A15 A16 A17 I/O0 I/O1 I/O2 11
PIN CONFIGURATION FOR WS512K32N-XH1X TOP VIEW
12 WE2 CS2 GND I/O11 A10 A11 A12 VCC CS1 NC I/O3 22 33 23 I/O15 I/O14 I/O13 I/O12 OE A18 WE1 I/O7 I/O6 I/O5 I/O4 I/O24 I/O25 I/O26 A6 A7 NC A8 A9 I/O16 I/O17 I/O18 44 34 VCC CS4 WE4 I/O27 A3 A4 A5 WE3 CS3 GND I/O19 55 45 I/O31 I/O30 I/O29 I/O28 A0 A1 A2 I/O23 I/O22 I/O21 I/O20
8 8 8 8
PIN DESCRIPTION
56
I/O0-31 A0-18 WE1-4 CS1-4 OE VCC GND NC
Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Power Supply Ground Not Connected
BLOCK DIAGRAM
W E1 CS1 OE A0-18 512K x 8 512K x 8 W E2 CS2 W E3 CS3 W E4 CS4
512K x 8
512K x 8
66
I/O0-7 I/O8-15 I/O16-23 I/O24-31
June 1999 Rev. 4
1
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
WS512K32-XXX / EDI8C32512CA
FIG. 2
PIN CONFIGURATION FOR WS512K32-XG4TX TOP VIEW
NC A0 A1 A2 A3 A4 A5 CS1 GND CS3 WE A6 A7 A8 A9 A10 VCC
PIN DESCRIPTION
I/O0-31 A0-18 Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Power Supply Ground Not Connected
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
8 8 8
WE
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31
CS1-4 OE VCC GND NC
BLOCK DIAGRAM
CS1 WE OE A0-18 512K x 8 512K x 8 CS 2 CS 3 CS 4
512K x 8
512K x 8
8
VCC A11 A12 A13 A14 A15 A16 CS2 OE CS4 A17 A18 NC NC NC NC NC
I/O0-7
I/O8-15
I/O16-23
I/O24-31
FIG. 3
PIN CONFIGURATION FOR WS512K32-XG2TX AND EDI8C32512CA-E TOP VIEW
NC A0 A1 A2 A3 A4 A5 CS3 GND CS4 WE1 A6 A7 A8 A9 A10 VCC
PIN DESCRIPTION
I/O0-31 A0-18
I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31
Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Power Supply
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
CS2 A17 WE2 WE3
WE4 A11 A12 A13 A14 A15 A16 VCC
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44
CS1
A18 OE
WE1-4 CS1-4 OE
0.940"
VCC
GND Ground The White 68 lead G2T CQFP NC Not Connected fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2T has the TCE and lead inspection advantage of the CQFP form. BLOCK DIAGRAM
W E1 CS1 OE A0-18 512K x 8 512K x 8 W E2 CS2 W E3 CS3 W E4 CS4
NC NC
512K x 8
512K x 8
8
8
8
8
I/O0-7
I/O8-15
I/O16-23
I/O24-31
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
2
WS512K32-XXX / EDI8C32512CA
ABSOLUTE MAXIMUM RATINGS
Parameter Operating Temperature Storage Temperature Signal Voltage Relative to GND Junction Temperature Supply Voltage Symbol TA TSTG VG TJ VCC -0.5 Min -55 -65 -0.5 Max +125 +150 Vcc+0.5 150 7.0 Unit C C V C V CS H L L L OE X L H X WE X H H L
TRUTH TABLE
Mode Standby Read Out Disable Write Data I/O High Z Data Out High Z Data In Power Standby Active Active Active
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage Input High Voltage Input Low Voltage Operating Temp (Mil) Symbol VCC VIH VIL TA Min 4.5 2.2 -0.5 -55 Max 5.5 VCC + 0.3 +0.8 +125 Unit V V V C Parameter OE capacitance WE1-4 capacitance HIP (PGA) CQFP G4T CQFP G2T/E CS1-4 capacitance Data I/O capacitance Address input capacitance
CAPACITANCE (TA = +25C)
Symbol COE CWE Conditions VIN = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz 20 50 20 CCS CI/O CAD VIN = 0 V, f = 1.0 MHz VI/O = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz 20 20 50 pF pF pF Max 50 Unit pF pF
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS (VCC = 5.0V, VSS = 0V, TA = -55C to +125C)
Parameter Input Leakage Current Output Leakage Current Operating Supply Current x 32 Mode Standby Current Output Low Voltage Output High Voltage Symbol ILI ILO ICC x 32 ISB VOL VOH Conditions Min VCC = 5.5, VIN = GND to VCC CS = VIH, OE = VIH, VOUT = GND to VCC CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5 CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5 IOL = 8mA for 15 - 35ns, IOL = 2.1mA for 45 - 55ns, Vcc = 4.5 IOH = -4.0mA for 15 - 35ns, IOH = -1.0mA for 45 - 55ns, Vcc = 4.5 2.4 Max 10 10 540 80 0.4 Units A A mA mA V V
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V
DATA RETENTION CHARACTERISTICS (TA = -55C to +125C)
Parameter Data Retention Supply Voltage Data Retention Current Symbol VDR ICCDR1 Conditions Min CS VCC -0.2V VCC = 3V 2.0 3.2 Typ Max 5.5 28* V mA Units
* Also available in Low Power version, please call factory for information.
3
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
WS512K32-XXX / EDI8C32512CA
AC CHARACTERISTICS (VCC = 5.0V, VSS = 0V, TA = -55C to +125C)
Parameter Read Cycle Read Cycle Time Address Access Time Output Hold from Address Change Chip Select Access Time Output Enable to Output Valid Chip Select to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z tRC tAA tOH tACS tOE tCLZ 1 tOLZ 1 tCHZ 1 tOHZ 1 2 0 12 12 0 15 8 2 0 12 12 Symbol -15* Min 15 15 0 17 9 2 0 12 12 Max Min 17 17 0 20 10 2 0 12 12 -17 Max Min 20 20 0 25 12 4 0 15 15 -20 Max Min 25 25 0 35 25 4 0 20 20 -25 Max Min 35 35 0 45 25 4 0 20 20 -35 Max Min 45 45 0 55 25 -45 Max -55 Min 55 55 Max ns ns ns ns ns ns ns ns ns Units
* 15ns Access Time available only in Commercial and Industrial Temperature. This speed is not fully characterized and is subject to change without notice. 1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS (VCC = 5.0V, VSS = 0V, TA = -55C to +125C)
Parameter Write Cycle Write Cycle Time Chip Select to End of Write Address Valid to End of Write Data Valid to End of Write Write Pulse Width Address Setup Time Address Hold Time Output Active from End of Write Write Enable to Output in High Z Data Hold Time tWC tCW tAW tDW tWP tAS tAH tOW 1 tWHZ 1 tDH 0 Symbol -15* Min 15 13 13 10 13 2 0 2 8 0 Max 17 15 15 11 15 2 0 2 9 0 -17 Min Max 20 15 15 12 15 2 0 3 11 0 -20 Min Max Min 25 17 17 13 17 2 0 4 13 0 -25 Max Min 35 25 25 20 25 2 0 4 15 0 -35 Max 45 35 35 25 35 2 5 5 20 0 -45 Min Max 55 50 50 25 40 2 5 5 20 -55 Min Max ns ns ns ns ns ns ns ns ns ns Units
* 15ns Access Time available only in Commercial and Industrial Temperature. This speed is not fully characterized and is subject to change without notice. 1. This parameter is guaranteed by design but not tested. 2. The Address Setup Time of minimum 2ns is for the G2T and H1 packages. tAS minimum for the G4T package is 0ns.
FIG. 4
AC TEST CIRCUIT
Current Source I OL
AC TEST CONDITIONS
Parameter Input Pulse Levels Input Rise and Fall Input and Output Reference Level
D.U.T. VZ
Typ VIL = 0, VIH = 3.0 5 1.5 1.5
Unit V ns V V
1.5V
Output Timing Reference Level
C eff = 50 pf
(Bipolar Supply)
I OH Current Source
NOTES: VZ is programmable from -2V to +7V. IOL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75 . VZ is typically the midpoint of VOH and VOL. IOL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance.
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
4
WS512K32-XXX / EDI8C32512CA
FIG. 5
TIMING WAVEFORM - READ CYCLE
ADDRESS
tRC tAA
CS
tRC
ADDRESS
tACS tCLZ
OE
tCHZ
tAA tOH
DATA I/O
PREVIOUS DATA VALID DATA VALID
tOE tOLZ
DATA I/O
HIGH IMPEDANCE
tOHZ
DATA VALID
READ CYCLE 1 (CS = OE = VIL, WE = VIH)
READ CYCLE 2 (WE = VIH)
FIG. 6
WRITE CYCLE - WE CONTROLLED
tWC
ADDRESS
tAW tCW
CS
tAH
tAS
WE
tWP tOW tWHZ tDW tDH
DATA I/O
DATA VALID
WRITE CYCLE 1, WE CONTROLLED
FIG. 7
WRITE CYCLE - CS CONTROLLED
tWC
ADDRESS
WS32K32-XHX
tCW tAH
tAS
CS
tAW
tWP
WE
tDW
DATA I/O
DATA VALID
tDH
WRITE CYCLE 2, CS CONTROLLED
5
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
WS512K32-XXX / EDI8C32512CA
PACKAGE 400:
66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
27.3 (1.075) 0.25 (0.010) SQ
PIN 1 IDENTIFIER SQUARE PAD ON BOTTOM
25.4 (1.0) TYP
4.34 (0.171) MAX 3.81 (0.150) 0.13 (0.005) 2.54 (0.100) TYP 1.42 (0.056) 0.13 (0.005) 0.76 (0.030) 0.13 (0.005) 15.24 (0.600) TYP 1.27 (0.050) TYP DIA 0.46 (0.018) 0.05 (0.002) DIA 25.4 (1.0) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 502:
68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G4T)
39.6 (1.56) 0.38 (0.015) SQ 3.56 (0.140) MAX
PIN 1 IDENTIFIER
Pin 1
12.7 (0.500) 0.5 (0.020) 4 PLACES 5.1 (0.200) 0.25 (0.010) 4 PLACES 0.25 (0.010) 0.05 (0.002)
1.27 (0.050) TYP 38 (1.50) TYP 4 PLACES
0.38 (0.015) 0.08 (0.003) 68 PLACES
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
6
WS512K32-XXX / EDI8C32512CA
PACKAGE 509:
68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2T/E)
25.15 (0.990) 0.26 (0.010) SQ 22.36 (0.880) 0.26 (0.010) SQ 4.57 (0.180) MAX 0.27 (0.011) 0.04 (0.002)
Pin 1
0.25 (0.010) REF
24.03 (0.946) 0.26 (0.010) 1 / 7 1.0 (0.040) 0.127 (0.005)
R 0.25 (0.010) 0.19 (0.007) 0.06 (0.002)
23.87 (0.940) REF
DETAIL A
1.27 (0.050) TYP 0.38 (0.015) 0.05 (0.002) 20.3 (0.800) REF SEE DETAIL "A"
The White 68 lead G2T CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2T has the TCE and lead inspection advantage of the CQFP form.
0.940" TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
7
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
WS512K32-XXX / EDI8C32512CA
ORDERING INFORMATION NOTE: For non-SMD new designs, please use the WS128K32-XXX part number for inquiries and orders. W S 512K 32 X - XXX X X X
LEAD FINISH: Blank = Gold plated leads A = Solder dip leads DEVICE GRADE: Q = MIL-STD-883 Compliant M = Military Screened -55C to +125C I = Industrial C = Commercial -40C to 85C 0C to +70C
PACKAGE TYPE: H1 = Ceramic Hex-In-line Package, HIP (Package 400) G2T = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 509) G4T = 40mm Low Profile CQFP (Package 502) ACCESS TIME (ns) IMPROVEMENT MARK: N = No Connect at pin 21 and 39 in HIP for Upgrades ORGANIZATION, 512Kx32 User configurable as 1Mx16 or 2Mx8 SRAM WHITE ELECTRONIC DESIGNS CORP.
EDI 8 C 32 512 CA X E X
WHITE ELECTRONIC DESIGNS SRAM CERAMIC MCM ORGANIZATION, 512Kx32 TECHNOLOGY: CA = CMOS Standard Power LPA = Low Power * ACCESS TIME (ns) PACKAGE TYPE: E = 22.4mm Ceramic Quad Flat Pack, Low Profile CQFP (Package 509) DEVICE GRADE: B = MIL-STD-883 Compliant M = Military Screened -55C to +125C I = Industrial -40C to +85C C = Commercial 0C to +70C
* Low Power Data Retention only available in G2T/E Package Type 8
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
WS512K32-XXX / EDI8C32512CA
DEVICE TYPE
512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module 512K x 32 SRAM Module
SPEED
55ns 45ns 35ns 25ns 20ns 17ns 55ns 45ns 35ns 25ns 20ns 17ns 55ns 45ns 35ns 25ns 20ns 17ns
PACKAGE
66 pin HIP (H1) 66 pin HIP (H1) 66 pin HIP (H1) 66 pin HIP (H1) 66 pin HIP (H1) 66 pin HIP (H1) 68 lead CQFP Low Profile (G4T) 68 lead CQFP Low Profile (G4T) 68 lead CQFP Low Profile (G4T) 68 lead CQFP Low Profile (G4T) 68 lead CQFP Low Profile (G4T) 68 lead CQFP Low Profile (G4T) 68 lead CQFP/J (G2T) 68 lead CQFP/J (G2T) 68 lead CQFP/J (G2T) 68 lead CQFP/J (G2T) 68 lead CQFP/J (G2T) 68 lead CQFP/J (G2T)
SMD NO.
5962-94611 05HTX 5962-94611 06HTX 5962-94611 07HTX 5962-94611 08HTX 5962-94611 09HTX 5962-94611 10HTX 5962-94611 05HYX 5962-94611 06HYX 5962-94611 07HYX 5962-94611 08HYX 5962-94611 09HYX 5962-94611 10HYX 5962-94611 05HMX 5962-94611 06HMX 5962-94611 07HMX 5962-94611 08HMX 5962-94611 09HMX 5962-94611 10HMX
9
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520

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