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1/10 february 2004 std3nm50 std3nm50-1 n-channel 550v @ tjmax- 2.5 ? - 3a dpak/ipak zener-protected mdmesh? mosfet typical r ds (on) = 2.5 ? high dv/dt and avalanche capabilities improved esd capability low input capacitance and gate charge low gate input resistance tight process control and high manufactoring yields description the mdmesh? is a new revolutionary mosfet technology that associates the multiple drain pro- cess with the company?s powermesh? horizontal layout. the resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. the adoption of the company?s proprietary strip technique yields overall dynamic performance that is significantly better than that of similar completition?s products. applications the mdmesh? family is very suitable for increase the power density of high voltage converters allow- ing system miniaturization and higher efficiencies. absolute maximum ratings ()pulse width limited by safe operating area (1)i sd < 3a, di/dt< 400a/s, v dd 3/10 std3nm50/std3nm50-1 electrical characteristics (continued) switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. gate-source zener diode protection features of gate-to-source zener diodes the built-in back-to-back zener diodes have specifically been designed to enhance not only the device ? s esd capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. in this respect the zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device ? s integrity. these integrated zener diodes thus avoid the usage of external components. symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time rise time v dd =250v,i d =1.5a r g =4.7 ? v gs =10v (see test circuit, figure 3) 7ns t r 10 ns q g total gate charge v dd =400v,i d =3a, v gs =10v 5.5 nc q gs gate-source charge 2.5 nc q gd gate-drain charge 2.4 nc symbol parameter test conditions min. typ. max. unit t r(voff) off-voltage rise time v dd =480v,i d =3a, r g =4.7 ?, v gs = 10v (see test circuit, figure 5) 8ns t f fall time 9 ns t c cross-over time 15 ns symbol parameter test conditions min. typ. max. unit i sd source-drain current 3 a i sdm (2) source-drain current (pulsed) 12 a v sd (1) forwardonvoltage i sd =3a,v gs =0 1.5 v t rr reverse recovery time i sd = 3a, di/dt = 100a/s, v dd =100v,t j =25 c (see test circuit, figure 5) 210 ns q rr reverse recovery charge 790 nc i rrm reverse recovery current 7.5 a t rr reverse recovery time i sd = 3a, di/dt = 100a/s, v dd =100v,t j =150 c (see test circuit, figure 5) 282 ns q rr reverse recovery charge 1.1 c i rrm reverse recovery current 7.7 a symbol parameter test conditions min. typ. max. unit bv gso gate-source breakdown voltage igs= 1ma (open drain) 30 v std3nm50/std3nm50-1 4/10 static drain-source on resistance transconductance transfer characteristics output characteristics safe operating area for dpak / ipak thermal impedance for dpak / ipak 5/10 std3nm50/std3nm50-1 normalized bvdss vs temperature source-drain diode forward characteristics normalized gate threshold voltage vs temp. capacitance variations gate charge vs gate-source voltage normalized on resistance vs temperature std3nm50/std3nm50-1 6/10 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load 7/10 std3nm50/std3nm50-1 dim. mm inch min. typ. max. min. typ. max. a 2.20 2.40 0.087 0.094 a1 0.90 1.10 0.035 0.043 a2 0.03 0.23 0.001 0.009 b 0.64 0.90 0.025 0.035 b2 5.20 5.40 0.204 0.213 c 0.45 0.60 0.018 0.024 c2 0.48 0.60 0.019 0.024 d 6.00 6.20 0.236 0.244 e 6.40 6.60 0.252 0.260 g 4.40 4.60 0.173 0.181 h 9.35 10.10 0.368 0.398 l2 0.8 0.031 l4 0.60 1.00 0.024 0.039 v2 0 o 8 o 0 o 0 o p032p_b to-252 (dpak) mechanical data std3nm50/std3nm50-1 8/10 dim. mm inch min. typ. max. min. typ. max. a 2.2 2.4 0.086 0.094 a1 0.9 1.1 0.035 0.043 a3 0.7 1.3 0.027 0.051 b 0.64 0.9 0.025 0.031 b2 5.2 5.4 0.204 0.212 b3 0.85 0.033 b5 0.3 0.012 b6 0.95 0.037 c 0.45 0.6 0.017 0.023 c2 0.48 0.6 0.019 0.023 d 6 6.2 0.236 0.244 e 6.4 6.6 0.252 0.260 g 4.4 4.6 0.173 0.181 h 15.9 16.3 0.626 0.641 l 9 9.4 0.354 0.370 l1 0.8 1.2 0.031 0.047 l2 0.8 1 0.031 0.039 a c2 c a3 h a1 d l l2 l1 1 3 = = b3 b b6 b2 e g = = = = b5 2 to-251 (ipak) mechanical data 0068771-e 9/10 std3nm50/std3nm50-1 tape and reel shipment (suffix ?t4?)* tube shipment (no suffix)* dpak footprint * on sales type dim. mm inch min. max. min. max. a 330 12.992 b 1.5 0.059 c 12.8 13.2 0.504 0.520 d 20.2 0.795 g 16.4 18.4 0.645 0.724 n 50 1.968 t 22.4 0.881 base qty bulk qty 2500 2500 reel mechanical data dim. mm inch min. max. min. max. a0 6.8 7 0.267 0.275 b0 10.4 10.6 0.409 0.417 b1 12.1 0.476 d 1.5 1.6 0.059 0.063 d1 1.5 0.059 e 1.65 1.85 0.065 0.073 f 7.4 7.6 0.291 0.299 k0 2.55 2.75 0.100 0.108 p0 3.9 4.1 0.153 0.161 p1 7.9 8.1 0.311 0.319 p2 1.9 2.1 0.075 0.082 r 40 1.574 w 15.7 16.3 0.618 0.641 tape mechanical data all dimensions areinmillimeters all dimensions are in millimeters std3nm50/std3nm50-1 10/10 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com |
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