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  1 ? fn7048 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2003. all rights reserved. elantec is a registered trademark of elantec semiconductor, inc. all other trademarks mentioned are the property of their respective owners. EL2140, el2141 150mhz differential twisted pair driver the EL2140/2141 is a very high band- width amplifier whose output is in differential form, and is thus primarily targeted for applications such as driv- ing twisted pair lines, or any application where common mode injection is likely to occur. the input signal can be in either single-ended or differential form, but the output is always in differential form. on the el2141, two feedback inputs provide the user with the ability to set the device gain, (stable at minimum gain of two), whereas the EL2140 comes with a fixed gain of two. the output common mode level is set by the reference pin (v ref ), which has a -3db bandwidth of over 100mhz. gen- erally, this pin is grounded, but it can be tied to any voltage reference. the transmission of adsl/hdsl signals requires very low distortion amplification, so th is amplifier was designed with this as a primary goal. the actual signal distortion levels depend upon input and output signal amplitude, as well as the output load impedance. (s ee distortion data inside.) both outputs (v out , v outb ) are short circuit protected to withstand temporary overload condition. features  fully differential inputs, outputs, and feedback  differential input range 2.3v  150mhz 3db bandwidth 800v/ s slew rate  -55db distortion at 3mhz  -75db distortion at 100khz  5v supplies or +6v single supply  50ma minimum output current  output swing (200 ? load) to within 1.5v of supplies (14v pkpk differential)  low power-11ma typical supply current applications  twisted pair driver  differential line driver  vga over twisted pair  adsl/hdsl driver  single ended to differential amplification  transmission of analog signals in a noisy environment ordering information part number temp. range package pkg. no. EL2140cn -40c to +85c 8-pin pdip mdp0031 EL2140cs -40c to +85c 8-pin soic mdp0027 el2141cn -40c to +85c 8-pin pdip mdp0031 el2141cs -40c to +85c 8-pin soic mdp0027 EL2140 (8-pin soic, pdip) top view el2141 (8-pin soic, pdip) top view data sheet october 1995, rev. a pinouts
2 absolute maximum ratings (t a = 25c) supply voltage v s + and gnd . . . . . . . . . . . . . . . . . . . . . . . . +12.6v maximum output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . 60ma storage temperature range . . . . . . . . . . . . . . . . . .-65c to +150c operating junction temperature . . . . . . . . . . . . . . . . . . . . . . +150c recommended operating temperature . . . . . . . . . . . -40c to 85c v in , v inb , v ref . . . . . . . . . . . . v ee +0.8v (min) to v cc -0.8v (max) v in ?v inb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5v caution: stresses above those listed in ?a bsolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a dc electrical specifications v cc = +5v, v ee = -5v, t a = 25c, v in = 0v, r l = 200, unless otherwise specified. parameter description min typ max units v supply supply operating range (v cc ?v ee ) 3.0 5.0 6.3 v i s power supply current (no load) 11 14 ma v os input referred offset voltage -25 10 40 mv i in input bias current (v in , v inb , v ref )-20620 a z in differential input impedance 400 k ? v diff differential input range 2.0 2.3 v a v voltage gain (EL2140) v in = 2v pk-pk 1.95 1.985 2.02 v/v a vol open loop voltage gain (el2141) 75 db v cm input common mode voltage range (EL2140) -2.6 +4.0 v v out (200) output voltage swing (200 ? load, v out to v outb ) (el2141) 3.4 3.6 v v out (100) output voltage swing (100 ? load, v out to v outb ) (el2141) 2.9 3.1 v v n input referred voltage noise 36 nv/ hz v ref output voltage control range (EL2140) -2.5 +3.3 v v refos output offset relative to v ref -60 -25 +60 mv psrr power supply rejection ratio 60 70 db i out (min) minimum output current 50 60 ma cmrr input common mode rejection ratio (EL2140) v cm = 2v 60 70 db r out (v out = v outb = 0v) output impedance 0.1 ? EL2140, el2141
3 note: 1. distortion measurement quoted for v out ?v outb = 12v pk-pk, r load = 200 ? , v gain = 8 ac electrical specifications v cc = +5v, v ee = -5v, t a = 25c, v in = 0v, r load = 200, unless otherwise specified parameter description min typ max units bw(-3db) -3db bandwidth (EL2140 and el2141 @ gain of 2) 150 mhz sr differential slewrate 800 v/ s tstl settling time to 1% 15 ns gbw gain bandwidth product 400 mhz v refbw (-3db) v ref -3db bandwidth 130 mhz v refsr v ref slewrate 100 v/ s thdf1 distortion at 100khz (note 1) -75 db dp differential phase @ 3.58mhz 0.16 dg differential gain @ 3.58mhz 0.24 % pin descriptions pin no. pin name function EL2140 el2141 12 v in non-inverting input 3v inb inverting input (EL2140 only) 1 fbp non-inverting feedback input. resistor r1 must be connected from this pin to v out . (el2141 only) 4 fbn inverting feedback input. resistor r3 must be connected from this pin to v outb . (el2141 only) 43v ref output common-mode control. the common-mode voltage of v out and v outb will follow the voltage on this pin. note that on the el2141, this pin is also the v inb pin. 55v outb inverting output 66 v cc positive supply 77 v ee negative supply 88v out non-inverting output EL2140, el2141
4 typical performance curves i s vs supply voltage el2 140 frequency response el2141 frequency response vs resistor r2 (gain = 2) frequency response vs temperature el2141 frequency response vs resistor r2 (gain = 8) el2141 distortion vs frequency (gain = 6, r load = 200 ? ) v in = 2v pk-pk EL2140, el2141
5 typical performance curves (continued) EL2140 cmrr vs fre quency el2141 output signal and common mode signal vs frequency EL2140 v ref frequency response EL2140 small signal response (note) note: photo shows voltages on a 100 ? transmission line terminated at both ends, so voltages at v out , v outb are twice the values shown. EL2140, el2141
6 applications information choice of feedback resistor there is little to be gained from choosing resistor r2 values below 400 ? and, in fact, it would only result in increased power dissipation and signal distortion. above 400 ? , the bandwidth response will develop some peaking (for a gain of two), but substantially higher resistor r2 values may be used for higher voltage gains, such as up to 2k ? at a gain of eight before peaking will develop. r1 and r3 are selected as needed to set the voltage gain, and while r1 = r3 is sug- gested, the gain equation above holds for any values (see distortion for further suggestions). capacitance considerations as with many high bandwidth amplifiers, the EL2140/2141 prefer not to drive highly capaci tive loads. it is best if the capacitance on v out and v outb is kept below 10pf if the user does not want gain peaking to develop. in addition, on the el2141, the two feedback nodes fbp and fbn should be laid out so as to minimize stray capacitance, else an additional pole will potentially develop in the response with possible gain peaking. the amount of capacitance tole rated on any of these nodes in an actual application will also be dependent on the gain setting and the resistor values in the feedback network. distortion considerations the harmonics that these amp lifiers will potentially produce are the 2nd, 3rd, 5th, and 6th. their amplitude is application dependent. all other harmonics should be negligible by com- parison. each should be considered separately: h2 the second harmonic arises from the input stage, and the lower the applied differential signal amplitude, the lower the magnitude of the second harmonic. for practical consid- erations of required output signal and input noise levels, the user will end up choosing a circuit gain. referring to figure 1, it is best if the voltage at the negative feedback node tracks the v ref node, and the voltage at the positive feedback node tracks the v in node respectively. this would theoreti- cally require that r1 + r2 = r3, although the lowest distortion is found at about r3 = r1 + (0.7*r2). with this arrangement, the second harmonic should be suppressed well below the value of the third harmonic. h3 the third harmonic should be the dominant harmonic and is primarily affected by output lo ad current which, of course, is unavoidable. however, this should encourage the user not to waste current in the gain setting resistors, and to use val- ues that consume only a small proportion of the load current, so long as peaking does not occur. the more load current, the worse the distortion, but depending on the frequency, it may be possible to reduce the amplifier gain so that there is more internal gain left to cancel out any distortion. h5 the fifth harmonic should always be below the third, and will not become significant until heavy load currents are drawn. generally, it should respond to the same efforts applied to reducing the third harmonic. h6 the sixth harmonic should not be a problem and is the result of poor power supply decoupling. while 100nf chip capacitors may be sufficient for some applications, it would be insufficient for driving full signal swings into a twisted pair line at 100khz. under these conditions, the addition of 4.7 f tantalum capacitors would cure the problem. el2141 EL2140 gain r1 r2 r3 ++ r2 ------------------------------------ - = v out v out b + 2 ------------------------------------------ v ref = gain = 2 (common mode) EL2140, el2141
7 typical applications circuits figure 1. typical twisted pair application figure 2. dual coaxial cable driver EL2140, el2141 figure 3. single supply twisted pair driver
8 all intersil u.s. products are manufactured, asse mbled and tested utilizin g iso9000 quality systems. intersil corporation?s quality certifications c an be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com typical applications circuits (continued) figure 4. differential line driver with equalization dcgain r1 r2 r3 ++ r2 ------------------------------------ - seefigure5 () = hf () gain r1 r2 r4 ? () r3 ++ r2 r4 ? () ----------------------------------------------------- - seefigure5 () = wheref o 1 2 c 1 r 2 ---------------------- = andf p 1 2 c 1 r 4 ---------------------- = figure 5. dual signal transmission circuit EL2140, el2141


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