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the SL2524 is a pin compatible replacement for the sl2521 and sl2522 series of log amplifiers, and exhibits a superior stability performance. the amplifier is a successive detection type which provides linear gain and accurate loga- rithmic signal compression over a wide bandwidth. the two stages can be operated independently. when six stages (three SL2524s) are cascaded the strip can be used for ifs between 30-650mhz whilst achieving greater than 65db dynamic range with a log accuracy of < 1.0db. the balanced limited output also offers accurate phase information with input amplitude. features n 1.3ghz bandwidth (-3db) n balanced if limiting n 3ns rise times/5ns fall times (six stages) n 20ns pulse handling (six stages) n temperature stabilised n surface mountable applications n ultra wideband log receivers n channelised receivers n monopulse applications absolute maximum ratings supply voltage (v cc above v ee ) +7.0v storage temperature -65 c to +150 c operating temperature range SL2524/b/lc -40 c to +85 c SL2524/c/hp -30 c to +85 c junction temperature - lc20 +175 c - hp20 +150 c applied dc voltage to rf input 0.4v (between rf i/p pins) applied rf power to rf input +15dbm value of r set resistors not less than 180 w thermal resistance:- die to case -lc 20 28 c/w - hp20 20 c/w die to ambient - lc20 73 c/w - hp20 82 c/w ordering information SL2524/b/lc (ceramic leadless chip carrier package) SL2524/c/hp (plastic j lead chip carrier package) SL2524/na/1c (dc probe tested bare die) 5962 - 92315 (smd) pin description 1 sub v ee 2 if output (a) 3 if output (a) 4v ee (a) 5 output v c (a) 6 if input (a) 7 if input (a) 8v cc (a) 9 det. output (a) 10 r set (a) pin description 11 n/c 12 r set (b) 13 det. output (b) 14 v cc (b) 15 if output (b) 16 if output (b) 17 output v cc (b) 18 v ee (b) 19 if input (b) 20 if input (b) fig.1 pin connections top view optional pin reference SL2524 1.3ghz dual wideband logarithmic amplifier ds4548 - 2.1 july 1995
SL2524 2 fig.2 circuit diagram of single stage a - (stage b pin nos bracketed) fig.3 pad map for SL2524 naked die
SL2524 3 supply current small signal gain (dual stage, single ended) detected output current (max) detected output current (no signal) upper cut off frequency (rf) lower cut off frequency (rf) detector cut off frequency limited if o/p voltage phase variation with input level (normalised to -30dbm) limited o/p var with temp. noise figure max i/p before overload input impedance output impedance electrical characteristics - SL2524b guaranteed at the following test conditions unless otherwise stated frequency = 200mhz, t amb = +25 c, input power = -30dbm, v cc = 6v 0.1v, source impedance = 50 w . load impedance = 50 w , test circuit = fig. 4, r set = 300 w . tested as a dual stage. ma db db db db db db db ma ma ma ma ma ma ma ma ma ma mhz mhz mhz mhz mhz mv degree degree mv db dbm k w w typ 87 11.4 11.6 11.3 11.0 11.2 10.7 9.7 3.45 3.25 3.30 3.30 3.10 3.15 3.10 0.95 0.93 0.90 1100 1100 800 0.35 700 155 0 2.0 -4.0 2.0 12 14 15 1 50 min 70 9.6 10.1 9.9 9.5 9.7 9.3 8.2 3.20 3.05 3.15 3.10 2.80 2.90 2.85 0.85 0.80 0.80 600 900 600 135 max 100 13.0 13.1 12.7 12.5 12.7 12.1 11.2 3.70 3.45 3.45 3.50 3.30 3.45 3.65 1.15 1.10 1.10 1 175 0 3.0 -4.0 3.0 25 value units conditions characteristic t amb = +25 c f = 25mhz see notes 1, 3 t amb = -40 c f = 200mhz see notes 2, 3 t amb = +25 c f = 200mhz see note 3 t amb = +85 c f = 200mhz see notes 2, 3 t amb = -40 c f = 500mhz see notes 2, 3 t amb = +25 c f = 500mhz see note 3 t amb = +85 c f = 500mhz see notes 2, 3 t amb = +25 c, v in = 0dbm, f = 25mhz see note 1 t amb = -40 c, v in = 0dbm, f = 200mhz see note 2 t amb = +25 c, v in = 0dbm, f = 200mhz t amb = +85 c, v in = 0dbm, f = 200mhz see note 2 t amb = -40 c, v in = 0dbm, f = 500mhz see note 2 t amb = +25 c, v in = 0dbm, f = 500mhz t amb = +85 c, v in = 0dbm, f = 500mhz see note 2 t amb = -40 c, see note 2 t amb = +25 c, see note 2 t amb = +85 c, see note 2 -3db w.r.t 200mhz, t amb = -40 c see note 2 -3db w.r.t 200mhz, t amb = +25 c -3db w.r.t 200mhz, t amb = +85 c see note 2 -3db w.r.t 200mhz, t amb = +25 c 50% o/p current w.r.t. 200mhz i/p power = 0dbm, t amb = +25 c frequency = 70mhz, -55 to +3dbm see note 2 frequency = 200mhz, -55 to +3dbm see note 2 see note 1 1k w in parallel with 2pf notes 1. parameter guaranteed but not tested 2. tested at 25 c only, but guaranteed at temperature 3. gain will typically increase by 6db, when rf outputs use 1k w loads in place of 50 w
SL2524 4 supply current small signal gain (dual stage, single ended) detected output current (max) detected output current (no signal) upper cut off frequency (rf) lower cut off frequency (rf) detector cut off frequency limited if o/p voltage phase variation with input level (normalised to -30dbm) limited o/p var with temp. noise figure max i/p before overload input impedance output impedance electrical characteristics - SL2524c guaranteed at the following test conditions unless otherwise stated frequency = 200mhz, t amb = +25 c, input power = -30dbm, v cc = 6v 0.1v, source impedance = 50 w . load impedance = 50 w , test circuit = fig. 4, r set = 300 w . tested as a dual stage. ma db db db db db db db ma ma ma ma ma ma ma ma ma ma mhz mhz mhz mv degree degree mv db dbm k w w typ 87 11.4 11.6 11.3 11.0 11.2 10.7 9.7 3.45 3.25 3.30 3.30 3.10 3.15 3.10 0.95 0.93 0.90 1000 0.35 600 135 0 2.0 -4.0 2.0 12 14 15 1 50 min 70 9.6 9.6 9.4 9.0 9.2 8.8 7.7 3.20 2.95 3.05 3.00 2.70 2.80 2.75 0.75 0.70 0.70 105 max 100 13.0 13.6 13.2 13.0 13.2 12.6 11.7 3.70 3.55 3.55 3.50 3.30 3.55 3.75 1.25 1.20 1.20 2 175 25 value units conditions characteristic t amb = +25 c f = 25mhz see note 3 t amb = -30 c f = 200mhz see notes 2, 3 t amb = +25 c f = 200mhz see note 3 t amb = +85 c f = 200mhz see notes 2, 3 t amb = -30 c f = 500mhz see notes 1, 3 t amb = +25 c f = 500mhz see note 1 t amb = +85 c f = 500mhz see notes 1, 3 t amb = +25 c, v in = 0dbm, f = 25mhz t amb = -30 c, v in = 0dbm, f = 200mhz see note 2 t amb = +25 c, v in = 0dbm, f = 200mhz t amb = +85 c, v in = 0dbm, f = 200mhz see note 2 t amb = -30 c, v in = 0dbm, f = 500mhz see note 1 t amb = +25 c, v in = 0dbm, f = 500mhz see note 1 t amb = +85 c, v in = 0dbm, f = 500mhz see note 1 t amb = -30 c, see note 2 t amb = +25 c, see note 2 t amb = +85 c, see note 2 -3db w.r.t 200mhz, t amb = +25 c see note 1 -3db w.r.t 200mhz, t amb = +25 c 50% o/p current w.r.t. 200mhz i/p power = 0dbm, t amb = +25 c frequency = 70mhz, -55 to +3dbm see note 1 frequency = 200mhz, -55 to +3dbm see note 1 see note 1 1k w in parallel with 2pf notes 1. parameter guaranteed but not tested 2. tested at 25 c only, but guaranteed at temperature 3. gain will typically increase by 6db, when rf outputs use 1k w loads in place of 50 w
SL2524 5 general description the SL2524 is primarily intended for use in radar and ew receivers. six stages (3 chip carriers) can be cascaded to form a very wideband logarithmic ampifier offering >65db of input dynamic range, with pulse handling of better than 25ns. (see figs 5 and 6.) a six stange strip also offers balanced if limiting, linearity (log accuracy) of < 1.0db, temperature stabilisation and programmable detector characteristics. the detector has an external resistor set (r set ) pin which allows the major characteristics of the detector to be programmed. with six stage strip it is possible to vary the value of r set on each detector and so improve the overall log error/linearity. the detector is full wave and good slew rates are achieved with 2ns rise and 5ns fall times (no video filter). the video bandwidth of a six stage strip is typically 600mhz (-3db). the amplifier also offers balanced if limiting, low phase shift versus input amplitude, and at an if of 120mhz, less than 5 of phase change is achievable over the input level of -55dbm to +5dbm. the if and video ports can be used simultaneously, so offering phase, frequency and pulse (video) information. a slight loss of dynamic range (2db) will be observed when the if ports are used in conjunction with the video. fig.4 test circuit fig.5 schematic diagram showing configuration of sd log strip
SL2524 6 fig.6 circuit diagram for 6-log strip (results shown in figs. 11 to 24 were achieved with this circuit) typical characteristics for a dual - stage amplifier (i.e. one SL2524) fig.7 if gain vs frequency of 2 amplifiers (one SL2524)
SL2524 7 typical characteristics for a dual - stage amplifier (i.e. one SL2524) cont. fig.8 normalised phase vs cw input level at 50, 250 and 450mhz for 50 w o/p termination (25 c) fig.9 detector current vs r set at 200mhz (25 c)
SL2524 8 typical characteristics for a dual - stage amplifier (i.e. one SL2524) cont. fig.10 detector current vs frequency at rset = 200 w and 500 w (25 c) typical characteristics for a six stage strip, using detected output (ref. figs 5 & 6) fig.11 detector bandwidth (25 c)
SL2524 9 typical characteristics for a six stage strip, using detected output (ref. figs 5 & 6) cont. fig.12 detected o/p vs cw input at 60, 125, 450 and 600mhz at 25 c fig.13 detected o/p vs cw input level and temperature at 60 and 125mhz 0
SL2524 10 typical characteristics for a six stage strip, using detected output (ref. figs 5 & 6) cont. fig.14 detected o/p vs cw input level at 450mhz across temperature fig.15 typical log linearity of detected output measured at 450mhz (25 c)
SL2524 11 typical characteristics for a six stage strip as a low phase shift wideband limiter (ref. figs 5 & 6) fig.16 if limiting characteristics at 60mhz and 500mhz (25 c) fig.17 if limiting characteristic at 60mhz across temperature
SL2524 12 typical characteristics for a six stage strip as a low phase shift wideband limiter (ref. figs 5 & 6) fig.18 if limiting characteristic at 500mhz across temperature fig.19 small signal gain vs frequency across temperature
SL2524 13 typical characteristics for a six stage strip as a low phase shift wideband limiter (ref. figs 5 & 6) fig.20 phase deviation vs cw input level (normalised at -30dbm) at 25 c across input frequency fig.21 phase deviation vs cw input level (normalised at -30dbm) at 50mhz across temperature
SL2524 14 typical characteristics for a six stage strip as a low phase shift wideband limiter (ref. figs 5 & 6) fig.23 peak phase deviation over -65dbm ? +10dbm cw input level vs cw input frequency. across temperature fig.22 phase deviation vs cw input level (normalised at -30dbm) at 450mhz across temperature

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