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co.,ltd. no. description: 5.8" wide q-vga tft color lcd module model number approval check check design toshiba matsushita display technology co.,ltd. reference specification preliminary date: 08 may 2002 EDTCA39QRF customer's parts number notice: this specification is "preliminary". the contents described in this specification may be changed without notice. please ask us to send final version and reconfirm before you start to design. tel:81-076-277-2113 fax:076-277-2906 toshiba matsushita display technology co.,ltd. 26-2 yamada-senden, kawakita, nomi-gun, ishikawa, 923-1296, japan av-use lcd div issue av-use marketing&engineering dept. j12-116z990715 ( datasheet : )
record of revision r/v no note check design 45 spec.no. 6 toshiba matsushita display technology co.,ltd. preliminary 1/21 model no.: 2 rev. ?p 3 EDTCA39QRF name of specification: ?@ reference specification contents of r/v approval change of date j12-116z990715
content 1. application p.3 2. general specification p.3 3. absolute maximum ratings p.4 4.environmental condition p.4 5. electro-o p tical s p ecification (ta=25 ?? ) p.5 5-1 measuring method for transmittance p.6 5-2 measuring method for contrast p.7 5-3 measuring method for viewing angle p.8 5-4 measuring method for response time p.9 6. electrical specification p.10 (1) contents p.10 (2) pixel arrangement and i / o interface pin assignment p.10 (3) interface p.11 (4) electrical specification p.12 (5) signal polarity and phase p.13 (6) timing characteristics of input signals p.14 (7) sequence for power - on / off and signal on / off p.17 (8) back light p.18 7. attention p.20 8. device outside view attached drawing 45 toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 spec.no. model no.: name of specification: ?@ reference specification 2/21 preliminary EDTCA39QRF j12-116z990715
1 ?d a pp lication production code(part no) : EDTCA39QRF 2. general s p ecification 144.5(w) 88.6(h) 7.2(d) 127.20 71.838 ?o 400(w) 3(rgb) 234(h) 136 ?? 10 ?? ?d?d u t yp e ag coat (with wv film) none 12.metal frame condition note 2-1: detailed dimensions are shown as per attached drawing. 45 spec.no. preliminary there are not remarkable defects. not be connected to inner circuit name of specification: ?@ reference specification 1.display ?@ technology 10.polarizer protective shee t EDTCA39QRF model no.: this specification is applied to the 5.8 inch wide , full colors and 400rgb234 dots color tft liquid crystal display module. controller circuit,inverter for lamp are not included in this module. toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 nw(normally white) a-si tft active-matri x 8.backlight 3/21 2.display mode 5.number of dots 11.appearance specification characteristic item 3.module outer ?@ dimension ?@ (note2-1) 9.front surface treatment 6.color-filter-array 4.effective display area rgb vertical stripes 7.weight ccfl with 3 wave-length spectrum j12-116z990715
?r?d absolute maximum ratings symbol min. max. unit remarks vdd -0.3 6.5 v source driver voltage vee -0.3 6.5 v vin -0.3 vdd+0.3 v vana -0.3 vee+0.3 v note 3-1 vgon -0.3 45 v gate driver negative voltage vss vgon-45 vgon+0.3 vbl - 3000 acv -30 80 ?? 4.environmental conditions logic voltage note 4-1?this value guarantees only operation, but doesn't guarantee all the contents of electro-optical specification. electro-optical specification can be guaranteed at the condition that ambient temperature is 25 ?? . note4-2 -20 ?` 70 ?? -30 ?` 80 ?? item ta=25 ?? ta=25 ?? note 4-2?please refer to section 7. "attention". logic signal voltage analog input voltage gate driver positive voltage back light input voltage panel surface temp condition characteristics ta=25 ?? operating temperature (panel surface temp.) ta=25 ?? ta=25 ?? ta=25 ?? ta=25 ?? absolute maximum ratings are the limited value which must not be applied to the product eve n a second,and the product may have a permanent damage when it is ?@ exceeded. accordingly, please pay attention to the surge of input voltage, fluctuation and/or ri pp le of su pp l y volta g e, ambient tem p erature and so on. note4-1,note4-2 5 note 3-1?analog input voltages mean seven kinds of voltage such as vb, red1, red2, ?@ green1, green2, blue1,blue2. remarks specification storage temperature (panel surface temp.) toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 4 spec.no. 4/21 preliminary name of specification: ?@ reference specification model no.: EDTCA39QRF j12-116z990715
5.electro-optical specification ??? min. max. b00 240 - 5-1 cmax 60 - 5-2 x00 0.26 0.36 y00 0.27 0.37 -00 0.7 - 5-1 ?? u -0 20 - ?? d- 0 40 - ?3 l 0 - 45 - ?3 r 0 - 45 - ?? r 0 0 -22 ?? d 0 0 -44 * note : fluorescent lamp current is 2.0ma.(measurin g temperture : 25 2 ?? ) measuring condition: ?? measuring surroundings : dark room or its coordinate ?? measuring temperature : 255 ?? ?? measuring humidity : 40 ?` 70%rh ?? adjust operating voltage to get optimum contrast at the center of the display. ?? use inverter : hiu-742a(16.5pf) 5-1 main viewing angle direction (contrast ratio becomes max.) 5-3 5-4 ms 22 ms 7.response time 5.vertical viewing ?@ angle 6.horizontal ?@?@ viewing angle 4.brightness uniformity deg. deg. deg. ?? 5 - 5 2 spec.no. 5/21 30 11 60 60 60 measure ment method name of specification: ?@ reference specification EDTCA39QRF model n o preliminary typ. sym bol toshiba matsushita display technology co.,ltd. 3 rev.1 6 4 300 unit cd/ ?u ?? 5 ?? 5 deg. - - 3.white color chromaticity 150 0.31 best angle - standard value condition characteristics c. - ?? 5 0.32 1.brightness *note 2.contrast ratio 130 ?u o'clock j12-116z990715
name of specification: ?@ reference specification 5-1. measuring method for brightness (1)measurin g instrument topcon bm-5a(measurin g field = 1 ?k?j (2)measuring point center of the dis p la y area ( ?? =0 ?k , ? =0 ?k ) ?? : viewin g an g le a g ainst vertical axis ? : viewin g an g le a g ainst horizontal axis (3)measuring method the distance from screen to "bm-5a" is 500 ?o . ?? definition of the brightness uniformity measure 5 points (so ?` s4) and define the brightness uniformity using the following formula. 45 measure the brightness b(cd/ ?u ) and white color chromaticity x,y supplying signal voltage to get maximum brightness at the display pattern to be all white. brightness uniformity = (the minimum brightness among s 1 ?` s4)/so model no.: spec.no. preliminary 6/21 EDTCA39QRF toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 liquid crystal display module topcon bm-5a ?i 200,117 ?j distance:500m center of display area s1 s2 s0 s4 s3 10% 10% 10% 10% j12-116z990715
topcon bm-5a (measuring field = 1) center of the display area ?e set the lcd module at ?? = ?? 0 , ? = ? 0 ?? : viewin g an g le in vertical axis ? : viewin g an g le in horizontal axis ?? 0 , ? 0 are the best an g le to g et the maximum contrast. ?e measure maximum bri g htness "y1"(vlc=0v)and minimum bri g htness ?@ "y2"(vlc=5v). ?e the contrast ratio c is y1/y2. where, vlc means the effective voltage applied to liquid crystal in lcd panel. 45 toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 (1)measuring instrument (2)measuring point (3)measuring method 5-2. measuring method for contrast model no.: spec.no. name of specification: ?@ reference specification EDTCA39QRF 7/21 preliminary j12-116z990715
5-3. measuring method for viewing angle (1)measuring instrument eldim : ez contrast (2)measuring point center of the display area ?? u : upper side viewing angle ?? l : lower side viewing angle ? l : left side viewing angle ? r: right side viewing angle record upper, lower, right, left angles of contrast 5 from circular chart data of ez contrast. 45 preliminary 8/21 EDTCA39QRF spec.no. model no.: name of specification: ?@ reference specification toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 lcd modu le upper ? ?? lower left right ez contrast lcd module j12-116z990715
name of specification: ?@ reference specification 5-4. measuring method for response time (1)measuring instrument ohtsuka electric. lcd evaluation equipment lcd-7000 measurin g s p ot size(a p erture size)i s ? 12 ?o . (2)measuring point center of the display area (3)measuring method ?e set lcd module at ? =0 ?k and ?? =0 ?k when normalizing each brightness level corresponding to the display signal "off" and " on" as 45 9/21 model no.: preliminary EDTCA39QRF ?e apply the signal voltage at maximum contrast ratio and switch lcd-cell off/on/off. (make screen white, then black and white) shown in the figure below, the rise time ?? r is defined as the time until the brightness level goes down to 10% from 90% after display signal changed from off to on and also fall-time ?? d is defined as the time until the brightness level goes up to 90% from 10% after display signal changes from spec.no. toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 ?? d ?? r on(black) off(white) off(white) display signal optical response 100% 90% 10% 0% time j12-116z990715
6. electrical specification (1)contents (2)pixel arrangement and i/o interface pin assignment 45 spec.no. name of specification: ?@ reference specification EDTCA39QRF toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 10/21 model no.: preliminary pixel arrangement input video signal control voltage a-si tft active-matrix line-at-a-time scan item screen size display mode driving method contents 15 cm (5.8 inch)wide normally white tn type full color(transmitting type) remark (fig 6-1) p.15/21 (fig 6-2) p.16/21 backlight light-guiding plate with u type lamp p.18,19/21 rgb stripe arrangement rgb line-inverted cmos level 1 123456 1198 1199 1200 ?r?o r r r r r g g g g g b b b b b 1 2 3 233 234 r r r r r g g g g g b b b b b r r r r r g g g g g b b b b b (connecting surface of fpc is back side) surface treatment j12-116z990715
(3)interface 45 gate driver negative voltage gate driver scanning clock pulse source driver output enable power line for logic gate scanning start signal 2 gate driver negative voltage gate driver output enable 2 gate driver output enable 3 up/down scanning change gate driver output enable 1 function green video signal 2 blue video signal 2 source output current adjustment source driver clock input 1 gnd vb red2 gate driver positive voltage green video signal 1 ?a connect to 11 pin red video signal 1 ?a connect to 10 pin blue video signal 1 ?a connect to 12 pin voltage applied to color filter substrate power line for source driver ic gate scanning start signal 1 blue1 mod sth2 29 21 22 23 24 17 18 30 25 26 27 28 19 20 13 14 15 16 9 10 11 12 pin no 1 2 3 4 5 6 7 8 u/d cpv vss green1 red1 oeh vdd green2 blue2 vss vcom vee stv1 stv2 vgon oev1 oev2 oev3 rl symbol clk1 sth1 gnd clk2 clk3 spec.no. preliminary 11/21 name of specification: ?@ reference specification EDTCA39QRF model no.: toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 connector : il ?| fpr series (0.5 ?o pitch 30p) (jae) gilded type source driver clock input 2 (set "h" at simultaneous mode) source driver clock input 3 (set "h" at simultaneous mode) ground source scanning start signal 1 ground sampling mode change (h: simultaneous, l: sequential) source scanning start signal 2 right / left scanning change red video signal 2 j12-116z990715
under tft lcd module operating condition symbol unit remaeks vdd v vee v vil v vih v vsb+ v r,g,b, vee=5v vsw+ v r,g,b, vee=5v vsb- v r,g,b, vee=5v vsw- v r,g,b, vee=5v vspp v r,g,b, note 6-4 vsc v r,g,b, vee=5v vee=5.0v vspp=3.5v vcom=7.0v vgon v vss v vcom v note 6-2 vcpp vpp note 6-1 & 6-4 idd ma note 6-3 iee ma note 6-3vb=2.5v igh ma note 6-3 iss ma note 6-3 note 6-1?brightness level is adjusted by varying this amplitude. note 6-3?current value is an average level , not a peak level. note 6-4...vspp/2+vcpp/2<5.5(v) please keep this condition for picture quality. ?? the function of stv1 and stv2 is changed as follows by the u/d terminal (up/down scanning) ?? the function of sth1 and sth2 is changed as follows by the rl terminal (right/left scanning) h(vd l(0v) 45 source signal width 0 4)electrical specification min. 2.70 4.50 v center applied to color filter sub. v amplitude applied to color filter sub. 3 2 rev.1 logic signal input voltage spec.no. preliminary 12/21 name of specification: ?@ reference specification EDTCA39QRF model no.: 6 white input voltage(-) gate driver positive voltage gate driver negative voltage item ic logic voltage source driver ic voltage black input voltage(+) white input voltage(+) black input voltage(-) 0.70 2.70 0.80*vdd (0.20) (vsb+) (vsw-) (0.20) 16.00 -14.00 logic supply current source driver ic supply current gate driver ic positive supply curren gate driver ic negative supply current -13.00 1.70 3.0 ?` 3.3 5.00 0.75 4.25 4.25 0.75 2.70 6.70 1.60 21.20 8.70 typ. max. 18.00 (vsw+) (4.8) (4.8) (vsb-) 17.00 -12.00 3.60 5.50 0.20*vdd vdd 2.60 -0.01 0.08 3.20 42.40 1.00 -1.00 signal input toshiba matsushita display technology co.,ltd. sth2 signal output signal output signal input sth1 rl 2.30 2.50 2.70 source output current adjustment vb 2.30 2.50 - 3.50 vee-0.4 u/v stv1 stv2 note 6-2?please adjust vcom voltage between -1.5v and +2.5v to make the flicker level be minimum. attention) electrical specification guarantees the normal operation of the product. in case of using the product over electrical specification, the normal operation is not guaranteed even within absolute maximum ratings. v source driver center voltage signal output l(0v) signal output signal input signal input h(vdd) j12-116z990715
note ?e please adjust the brightness level by varying the amplitude of vcpp. ?? relation of black/white display and signal voltages 45 vcom h level l level black higher voltage video signal lower voltage (5)signal polarity and phase applied to color filter substrate (vcom) synchronizing inversion timing. it is needed to modulate rgb video signal (inverted polarity line by line), the voltage white white black model no.: spec.no. preliminary 13/21 name of specification: ?@ reference specification EDTCA39QRF toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 100?? white pedestal 1h vsc pedestal vsb- vsw+ vsb+ pedestal vsw- 4.25v 2.5v 0.75v 5.05v 1.7v -1.65v vcom vcpp voltage (vcom) r,g,b video signal (line-inverted) composite video signal color filter sub. (variable) 1h j12-116z990715
symbol min typ max unit remarks tlv - 262.5 - h tlh - 63.5 - ? s fhc 1.0 8.25 9.0 mhz full scan mode fhc (13.0) mhz side panel area tchw 110 121.2 1000 ns tchd 36.4 40.4 44.4 ns tchwh 54.4 60.6 66.6 ns tchd 12,23 tchwl 54.4 60.6 66.6 ns tshw 40 121.2 240* ns *shset=tshhld tshset 15 60.6 - ns tshhld 25 60.6 - ns tohw 7.5 8.0 8.5 ? s tss 1.45 9.85 10.96 ? s tvs 1.59 10.0 11.11 ? s toc 1.5 2.3 - ? s tvcvw 10 63.5 - ? s tcvwh 5 10.3 58.5 ? s tsvwl 5 53.2 58.5 ? s tsvw 5 63.5 126** ? s **tsvset=tsvhld tsvset 2 31.75 - ? s tsvhld 2 31.75 - ? s tosp 0 0.5 - ? s tohs - 1 1.9 ? s note ) ?e rise time (tr) and fall time (tf) of source driver lo g ic si g nal are both 6ns. ?e rise time (tr) and fall time (tf) of g ate driver lo g ic si g nal are both 50ns. gate start signal hold time toshiba matsushita display technology co.,ltd. gate clock pulse width (h) phase difference between oeh & sth phase difference between sync & oeh gate clock pulse width (l) gate start signal pulse width gate start signal setup time gate clock period signal sampling pulse width(l) source start signal pulse width source start signal setup time source start signal hold time EDTCA39QRF 3 2 (6) timing characteristics of input signals 14/21 source driver operating frequency 56 spec.no. name of specification: ?@ reference specification 1 field scanning period 1 line scanning period characteristics model no.: preliminary signal sampling pulse width 4 signal sampling pulse delay signal sampling pulse width(h) source output enable pulse width source start signal rising time video input signal start point phase difference between oeh & cpv j12-116z990715
45 toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 (fig.6-1) video signal timing chart 15/21 name of specification: ?@ reference specification EDTCA39QRF spec.no. model no.: preliminary tcvw (285h ?` 519h) 287 hd vd 1st display period 2nd display period 2 17 22 23 265 266 267 268 269 280 3 567 285 286 (22h ?` 256h) xout stv (5-stage dummy flip-flops exist in the gate driver) tsvw tshw ?? 1 ?g =508cphc1k=63.5 ? sec sth 1 , 2 cph 1 505 506 507 508 1 2 400 401 508 1 invalid data valid data r, g, b hd tss tshw sth 1 , 2 tvs r, g, b tohs tosp tohw oeh tcvwh toc tcvwl cpv t1v=262.5h 4 invalid data j12-116z990715
(fig. 6-2)control signal timing diagram rev.1 5 spec.no. name of specification: ?@ reference specification model no.: preliminary 16/21 EDTCA39QRF 4 toshiba matsushita display technology co.,ltd. 3 2 6 tchd12 tchd23 tchwh tchwl tchw tshset tshhld tshw clk1 clk2 clk3 sth1,2 tsvset tsvhld tsvw cpv stv1,2 tcvw tcvwh tcvwl r,g,b 1 2 3 j12-116z990715
(7)sequence for power-on /off and signal on / off toshiba matsushita display technology co.,ltd. 3 2 6 5 4 rev.1 1) 10ms ?? t1 ?? t2, 0 ?? t3 ?? t4 ?? 10ms 2)please use the schottky barrier diode among vdd ,vee and vgon, shown as follows. spec.no. name of specification: ?@ reference specification model no.: preliminary 17/21 EDTCA39QRF vgon vee vdd ?n?m ?u?f?n?m ?u?d?d ?u?c?c logic signal,vcom,vgoff,rgb-video si l ?o?u ?o?u ?n?e?e ?n?e?e t1 t3 t2 t4 ?u?r?r j12-116z990715
(8) backli g ht min unit ?| marms ?| vrms ?| ?v?????? ?| khz ?| vrms 10000 hour attention) *1 panel surface temperature should be kept less than contents of "3. absolute maximum ratings". *2 inverter should be designed to be subject to the conditions below: (1) both the area and the peak under the positive and negative cycles of the waveform of the lamp current and lamp voltage should be symmetric. (the symmetric ratio should be larger than 90%) (2) there should not be any spikes in the waveform. (3) the waveform should be close to a sine wave whenever possible. (4) lamp current should not exceed the "max" value under the "operating temperature" (it is prohibited to exceed the "max" value even if it is operated in the non-guaranteed temperature). when lamp current exceed the maximum value for a lon g time, it may cause a smoking and ignition. therefore, it is recommended that the inverte r have the current limited circuit that is used as a protection circuit and/or the lamp current-controlled inverter. (5) please check the lamp current not to exceed the "max" value in the inverter open/short test. (6) the "min" of "lamp current " is the necessary value which must not be applied to the product for an stable working condition. please pay attention to keep the "min" of "lamp current" for a light dimmer. *3 the lamp frequency should be selected as different as possible from display horizontal synchronous signal (including harmonic frequency of this scanning frequency) to avoid "beat "interference which may be observed on the screen as horizontal stripes like moving wave. this phenomenon is caused by interference between lamp (ccfl) lighting frequency and lcd horizontal synchronous signal. *4 "life time" is defined as a lamp maker's warranty value which applied to ccfl only. "life time" is defined as the lamp brightness decrease to 50% original brightness at il=max; continuous lighting, ta=25 ?? . max 5.0 typ 30 ?` 80 ?| 800 ?| 1.6 ?| remarks 2.0 4 ?| life time ?|?| characteristics lamp current lamp voltage symbol il vl name of specification: ?@ reference specification 18/21 spec.no. preliminar y model no.: EDTCA39QRF toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 5 ta=-20 ?? - 2100 starting voltage lamp power consumption pl fl possible lightin g frequency vs j12-116z990715
*5 v alues of "lam p volta g e", "lam p p ower consum p tion" and "startin g volta g e" are defined on conditon of the lcd module drived b y matsushita standard inverter (harison hiu-742a; 16.5 p f). the "max" of "startin g volta g e "means the minimum volta g e to li g ht normall y in the lcd module. however this isn't the values that we can assure stabilit y of startin g lam p on condition that the module is installed in y our set. it is careful that "startin g volta g e" is chan g ed b y an increase of stra y ca p acitance in y our set, inverter method, value of ballast ca p acitor in y our inverter and so on. es p eciall y , the value of "startin g volta g e" is hi g her in low tem p erature condition than in normal tem p erature condition, because im p edance of ccfl is increased. so, p lease check y our set in low tem p erature condition. *6 please do not brin g the hi g h volta g e wire into contact with metallic frame and the gnd lead wire, so as to ensure the safet y and decrease the difference of bri g htness. *7 "startin g volta g e" and "lam p volta g e" are defined as follows. (1) startin g volta g e (2) lam p volta g e *use inverter : hiu-742a *use inverter : hiu-742a lam p connector use connector : bhr ?| 03vs ?| 1 ?i jst ?j ccfl power su pp l y (hi g h volta g e) non connect remarks 1 h cable color : red pin no. symbol function toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 5 name of specification: ?@ reference specification 19/21 spec.no. preliminary model no.: EDTCA39QRF 2nc ?| 4 3 l ccfl power suppl y (ground) cable color : white transformer vs no load load(lcd module) transformer vl j12-116z990715
7. attention (1)because the liquid crystal display panel is made of glass, especially pay attention not to give it vibration, impact and so on when installing. (2)as for liquid crystal display panel ,the thickness of the liquid crystal layer is very thin with about 5 ? m, and the polarizer on the panel surface is easy to get damaged. so please pay attention to the following points. 1)don?t hold a panel surface strongly. in case that you held a panel surface in the construction process, after leaving for a while, then turn on. 2)in installation, pay attention not to give a stress and damage to the liquid crystal display panel. (3)be careful not to leave long in the high temperature, the high humidity. (4)cleaning polarizer which covers a display part should be treated carefully because it is extremely delicate. also, when cleaning a display surface, make the following solvent into the soft cloth like the gauze ?@ and so on sufficiently and wipe it lightly. ?e isopropyl alcohol (recommend) ?e ethyl alcohol because it bruises the surface of polarizer, avoid cleaning with the dried cloth. avoid using the following solvents, because they causes the dissolving, the decoloring of the polarizer. ?@?@?e ketones (ex, acetone) ?e aromatic compounds(ex. ; xylene, toluene) ?e water (5)when inserting the flexible cable of the module to the input connecter, or pulling out it from the input connecter, always, turn off the power supply to input to the module. (6)because cmos-lsi is used for the circuit in the liquid crystal display panel, pay attention to the static electricity. (especially, be careful of the interface flexible cable.) (7)because lcd module does?t have a protective circuit, please prepare the protective function such as fuses or shut -down circuit in user?s power supply circuit. (8)never use in the products which have opportunity to be dropped on hard floor such as concrete. it may be regarded as defectives. 45 (9)storage condition name of specification: ?@ reference specification EDTCA39QRF 20/21 model no.: preliminary spec.no. don't leave lcd module unattended for long time in high temperature in case of preservation for long time, the storage condition must be humidity of less than or equal to 70%, and not expose to direct sunlight and fluorescent light. also, storage condition of more thac 60 ?? should be humidity of less than or equal to 45% and non condensing. toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 j12-116z990715
(10)appearance defects shall be claimed at or before the customer's inspection. after the customer's inspection, we consider that the defects are caused in the customer's production process. appearance defects include stains and scratches on the polarizer and fractures in the glass. (11) revision of specification in case that changes in parts and materials used happen after formally signing the specification, its contents will be informed by prior written notice. changes are implemented after confirmation of receipt. if new problems happen concerning to this specification , they should be solved by mutual discussion. (12) warranty period warranty period of this lcd module is 12 mouths after manufacturing date code. (13)caution ?p?d please do not work durin g o p eratin g of ccfl b y connectin g inverter to avoid electric shock , because there is ver y hi g h volta g e on wirin g between ccfl or el and out p ut terminal of switchin g inverter . please do not harm cable and connectors action with care. ?q?d inverter out p ut volta g e should be sto pp ed automaticall y and simultaneousl y when o p en-circuit or short-circuit ha pp ened between the inverter out p ut and ccfl. (please desi g n the inverter which has shutdown function in case of no load for inverter out p ut.) continuos volta g e out p ut from the inverter under the o p en or short circuit ma y cause excessive leak current and overheat. however inverter out p ut volta g e is re q uired to remain for on-condition at least 3 seconds , because ccfl needs 1 or 2 seconds as start-u p time. ?r?d please take care burrs to be in j ured at the ed g es lcd metal frame. we would like y ou to desi g n carefull y to de-touch cable with frame ed g e section. ?s?d please be careful with work to avoid in j ur y b y the ed j es of lcd p anel. we would like y ou to p a y attension to desi g n for avoidin g dama g e of lcd g lass b y wirin g and surroundin g com p onents. ?t?d to make sure safet y, p lease install fuse or shutdown circuit as safet y function at p ower su pp l y section inside of customer p roducts , because there is no p rotect circuit inside lcd module to coo p with short circuited issue of p ower su pp l y (and so on)in lcd module. 45 EDTCA39QRF 21/21 model no.: preliminary caution of treatment spec.no. toshiba matsushita display technology co.,ltd. 3 2 rev.1 6 name of specification: ?@ reference specification ! ! caution j12-116z990715

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