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utron UT62L2568 rev. 1.1 256k x 8 bit low power cmos sram utron technology inc. p80059 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 1 ? revision history revision description release date preliminary rev. 0.1 original. jun 18, 2001 rev. 1.0 1. revised power supply a ?b 55ns (max.) for vcc=2.7v~3.6v b ?b 70/100ns (max.) for vcc=2.5v~3.6v 2. revised dc electrical characteristics ?g a ?b revised v ih as 2.2v b ?b revised standby current i sb1 of ll-version typical : 3ua b 2ua maximum : 25ua b 20ua 3. revised ac electrical characteristics ?g a ?b revised t oh as 10ns (min.) 4. revised 36-pin tfbga package outline dimension ?g a ?b rev. 0.1 ball diameter=0.3mm b ?b rev. 1.0 ball diameter=0.35mm jul 30, 2002 rev. 1.1 1.revised ?features? operating current : 40/35/25ma(i cc max) 20/18/15ma (i cc typ.) 2.truth table & dc electrical : delete i sb2 3.revised v term : -0.5 to vcc+0.3v -0.5 to 4.6v 4.added v oh : 2.7v at vcc=3.0v 5.revised dc (i cc max) 45/35/25ma 35/30/25ma (i cc typ.) 30/25/20ma 20/18/15ma 6.add under/overshoot range of v il & v ih 7.revised ac t ohz *@100ns (max): 35ns 30ns t whz *(max) :30/30/40 20/25/30ns 8.revised ?data retention characteristics? : i dr -ll (typ.) : na 1ua, i dr -l (typ.) : na 10ua i dr -ll (max.) : 25ua 6ua t r (min) : 5ns ?t rc ? 9.add order information for lead free product apr 28, 2003
utron UT62L2568 rev. 1.1 256k x 8 bit low power cmos sram utron technology inc. p80059 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 2 ? features fast access time : 55ns(max.) for vcc=2.7v~3.6v 70/100ns(max.) for vcc=2.5v~3.6v cmos low power operation operating : 20/18/15ma (typ.) standby : 20 ua(typ.) l -version 2 ua(typ.) ll-version single 2.5v~3.6v power supply operating temperature: commercial : 0 j ~70 j extended : -20 j ~80 j all ttl compatible inputs and outputs fully static operation three state outputs data retention voltage: 1.5v (min) package : 32-pin 8mm x 20mm tsop- 1 32-pin 8mm x 13.4mm stsop 36-pin 6mm 8mm tfbga general description the UT62L2568 is a 2,097,152-bit low power cmos static random access memory organized as 262,144 words by 8 bits. it is fabricated using high performance, high reliability cmos technology. the UT62L2568 is designed for very low power system applications. it is particularly well suited for battery back-up nonvolatile memory applications. it operates from a wide range of 2.5v~ 3.6v supply voltage. easy memory expans ion is provided by using two chip enable input ( ce ,ce2). and all inputs and three-state outputs are fully ttl compatible. functional block diagram decoder i/o data circuit control circuit 256k ?? 8 memory array column i/o a0-a17 vcc vss i/o1-i/o8 ce2 ce we oe
utron UT62L2568 rev. 1.1 256k x 8 bit low power cmos sram utron technology inc. p80059 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 3 ? pin configuration oe we a12 a11 a13 nc a17 a10 a14 a15 i/o6 i/o7 i/o8 a9 vss a8 a16 i/o5 vcc vcc i/o4 vss a7 a0 i/o3 i/o2 i/o1 nc a6 a1 a3 a5 a4 a2 123456 h g c d e f a b tfbga ce2 ce i/o4 a11 a9 a8 a13 i/o3 a10 a14 a12 a7 a6 a5 vcc i/o8 i/o7 i/o6 i/o5 vss i/o2 i/o1 a0 a1 a2 a4 a3 UT62L2568 tsop-1 / stsop 28 14 13 12 11 10 9 8 7 6 5 4 3 2 1 17 16 15 20 19 18 22 23 24 25 26 27 21 we oe ce ce2 a17 a15 32 31 30 29 a16 pin description symbol description a0 - a17 address inputs i/o1 - i/o8 data inputs/outputs ce ,ce2 chip enable inputs we write enable input oe output enable input v cc power supply v ss ground nc no connection
utron UT62L2568 rev. 1.1 256k x 8 bit low power cmos sram utron technology inc. p80059 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 4 ? truth table mode ce ce2 55u 5?5u i/o operation supply current h x x x high - z i sb , i sb1 standby x l x x high - z i sb , i sb1 output disable l h h h high - z i cc , i cc1, i cc2 read l h l h d out i cc , i cc1, i cc2 write l h x l d in i cc , i cc1, i cc2 note: h = v ih , l=v il , x = don't care. absolute maximum ratings * parameter symbol rating unit terminal voltage with respect to v ss v term -0.5 to 4.6 v commercial t a 0 to 70 j operating temperature extended t a -20 to 80 j storage temperature t stg -65 to 150 j power dissipation p d 1 w dc output current i out 50 ma soldering temperature (under 10 secs) tsolder 260 j *stresses greater than those listed under ?absolute maximum rati ngs? may cause permanent damage to the device. this is a stress rating only and functional operation of the device or any other co nditions above those indicated in the operational sections of this specification is not implied. exposure to the absolute maximum rating conditions for extended period may affect device reliabil ity. dc electrical characteristics (v cc =2.5v~3.6v, t a = 0 j to 70 j / -20 j to 80 j (e) ) parameter symbol test condition min. typ. max. unit 55 2.7 3.0 3.6 v power voltage v cc 70/100 2.5 3.0 3.6 v input high voltage v ih ? 1 2.2 - vcc+0.3 v input low voltage v il ? 2 - 0.2 - 0.6 v input leakage current i li v ss ?? v in ?? v cc - 1 - 1 a output leakage current i lo v ss ?? v i/o ?? v cc, output disabled - 1 - 1 a output high voltage v oh i oh = - 1ma (i oh = -0.5ma when vcc<2.7v) 2.2 2.7 - v output low voltage v ol i ol = 2.1ma - - 0.4 v 55 - 20 35 ma 70 - 18 30 ma i cc cycle time=min.100% duty, ce =v il and ce2 = v ih , i i/o =0ma 100 - 15 25 ma i cc1 tcycle= 1 s - 4 5 ma operating current i cc2 100%duty, i i/o= 0ma, ce ?? 0.2v and ce2 ? vcc-0.2v, other pins at 0.2v or vcc-0.2v tcycle= 500ns - 8 10 ma standby current (ttl) i sb ce =v ih or ce2 = v il - 0.3 0.5 ma -l - 20 80 a standby current (cmos) i sb1 ce =v cc -0.2v or ce2=0.2v, other pins at 0.2v or vcc-0.2v -ll - 2 20 a notes: 1. overshoot : vcc+3.0v fo r pulse width less than 10ns. 2. undershoot : vss-3.0v fo r pulse width less than 10ns. 3. overshoot and undershoot ar e sampled, not 100% tested.
utron UT62L2568 rev. 1.1 256k x 8 bit low power cmos sram utron technology inc. p80059 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 5 ? capacitance (t a =25 j , f=1.0mhz) parameter symbol min. max unit input capacitance c in - 6 pf input/output capacitance c i/o - 8 pf note : these parameters are guaranteed by device characterization, but not production tested. ac test conditions input pulse levels 0v to 3v input rise and fall times 5ns input and output timing reference levels 1.5v output load c l = 30pf+1ttl, i oh = -1ma, i ol = 2.1ma ac electrical characteristics ( t a = 0 j to 70 j / -20 j to 80 j (e) ) (1) read cycle parameter symbol UT62L2568-55 v cc = 2.7v~3.6v UT62L2568-70 v cc = 2.5v~3.6v UT62L2568-100 v cc = 2.5v~3.6v unit min. max. min. max. min. max. read cycle time t rc 55 - 70 - 100 - ns address access time t aa - 55 - 70 - 100 ns chip enable access time t ace - 55 - 70 - 100 ns output enable access time t oe - 30 - 35 - 50 ns chip enable to output in low z t clz* 10 - 10 - 10 - ns output enable to output in low z t olz* 5 - 5 - 5 - ns chip disable to output in high z t chz* - 20 - 25 - 30 ns output disable to output in high z t ohz* - 20 - 25 - 30 ns output hold from address change t oh 10 - 10 - 10 - ns (2) write cycle parameter symbol UT62L2568-55 v cc = 2.7v~3.6v UT62L2568-70 v cc = 2.5v~3.6v UT62L2568-100 v cc = 2.5v~3.6v unit min. max. min. max. min. max. write cycle time t wc 55 - 70 - 100 - ns address valid to end of write t aw 50 - 60 - 80 - ns chip enable to end of write t cw 50 - 60 - 80 - ns address set-up time t as 0 - 0 - 0 - ns write pulse width t wp 45 - 55 - 70 - ns write recovery time t wr 0 - 0 - 0 - ns data to write time overlap t dw 25 - 30 - 40 - ns data hold from end of write time t dh 0 - 0 - 0 - ns output active from end of write t ow* 5 - 5 - 5 - ns write to output in high z t whz* - 20 - 25 - 30 ns *these parameters are guaranteed by device char acterization, but not production tested.
utron UT62L2568 rev. 1.1 256k x 8 bit low power cmos sram utron technology inc. p80059 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 6 ? timing waveforms read cycle 1 (address controlled) (1,2) t rc t aa data valid address dout t oh t oh previous data valid read cycle 2 ( ce and ce2 and oe controlled) (1,3,4,5) t rc t aa t ace t oe t ohz t clz t oh t olz high-z data valid high-z t chz address ce2 dout ce oe notes : 1. we is high for read cycle. 2.device is continuously selected oe =low, ce =low , ce2=high . 3.address must be valid prior to or coincident with ce =low , ce2=high ; otherwise t aa is the limiting parameter. 4.t clz , t olz , t chz and t ohz are specified with c l =5pf. transition is measured ? 500mv from steady state. 5.at any given temperature and voltage condition, t chz is less than t clz is less than t ohz is less than t olz .
utron UT62L2568 rev. 1.1 256k x 8 bit low power cmos sram utron technology inc. p80059 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 7 ? write cycle 1 ( we controlled) (1,2,3,5,6) t wc t aw t cw t as t wp t whz t ow t wr high-z (4) (4) address ce2 ce we dout din data valid t dw t dh write cycle 2 ( ce and ce2 controlled) (1,2,5,6) t wc t aw t cw t as t wr t wp t whz t dw t dh data valid high-z (4) address ce2 ce we dout din
utron UT62L2568 rev. 1.1 256k x 8 bit low power cmos sram utron technology inc. p80059 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 8 ? notes : 1. we , ce must be high or ce2 must be low during all address transitions. 2.a write occurs during the overlap of a low ce , high ce2, low we . 3.during a we controlled write cycle with oe low, t wp must be greater than t whz +t dw to allow the drivers to turn off and data to be placed on the bus. 4.during this period, i/o pins are in the out put state, and input signals must not be applied. 5.if the ce low transition and ce2 high transition o ccurs simultaneously with or after we low transition, the outputs remain in a high impedance state. 6.t ow and t whz are specified with c l = 5pf. transition is measured ? 500mv from steady state. data retention characteristics (t a =0 j to 70 j / -20 j to 80 j (e)) parameter symbol test condition min. typ. max. unit vcc for data retention v dr ce ? v cc -0.2v or ce2 ?? 0.2v 1.5 - 3.6 v data retention current i dr - l - 10 80 a v cc =1.5v ce ? v cc -0.2v or ce2 ?? 0.2v - ll - 1 10 a chip disable to data t cdr see data retention retention time waveforms (below) 0 - - ns recovery time t r t rc - - ns data retention waveform low vcc data retention waveform (1) ( ce controlled) v dr ? 1.5v ce ? v cc -0.2v v cc(min.) v cc(min.) v ih v ih v cc t r t cdr ce low vcc data retention waveform (2) (ce2 controlled) v dr ? 1.5v v cc(min.) v cc t r t cdr ce2 ?? 0.2v v il ce2 v cc(min.) v il
utron UT62L2568 rev. 1.1 256k x 8 bit low power cmos sram utron technology inc. p80059 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 9 ? package outline dimension 32 pin 8mm x 20mm tsop-i package outline dimension unit symbol inch(base) mm(ref) a 0.047 (max) 1.20 (max) a1 0.004 ? 0.002 0.10 ? 0.05 a2 0.039 ? 0.002 1.00 ? 0.05 b 0.008 + 0.002 - 0.001 0.20 + 0.05 -0.03 c 0.005 (typ) 0.127 (typ) d 0.724 ? 0.004 18.40 ? 0.10 e 0.315 ? 0.004 8.00 ? 0.10 e 0.020 (typ) 0.50 (typ) hd 0.787 ? 0.008 20.00 ? 0.20 l 0.0197 ? 0.004 0.50 ? 0.10 l1 0.0315 ? 0.004 0.08 ? 0.10 y 0.003 (max) 0.076 (max) k 0 o ?? 5 o 0 o ?? 5 o
utron UT62L2568 rev. 1.1 256k x 8 bit low power cmos sram utron technology inc. p80059 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 10 ? 32 pin 8mm x 13.4mm stsop package outline dimension 1 16 17 32 c l hd d "a" e e 12 x (2x) 12 x (2x) seating plane y 32 17 16 1 c a2 a1 l a 0.254 0 gauge plane 12 x (2x) 12 x (2x) seating plane "a" datail view l1 b unit symbol inch(base) mm(ref) a 0.049 (max) 1.25 (max) a1 0.005 ? 0.002 0.130 ? 0.05 a2 0.039 ? 0.002 1.00 ? 0.05 b 0.008 ? 0.01 0.20 ? 0.025 c 0.005 (typ) 0.127 (typ) d 0.465 ? 0.004 11.80 ? 0.10 e 0.315 ? 0.004 8.00 ? 0.10 e 0.020 (typ) 0.50 (typ) hd 0.528 ? 0.008 13.40 ? 0.20. l 0.0197 ? 0.004 0.50 ? 0.10 l1 0.0315 ? 0.004 0.8 ? 0.10 y 0.003 (max) 0.076 (max) k 0 o ?? 5 o 0 o ?? 5 o
utron UT62L2568 rev. 1.1 256k x 8 bit low power cmos sram utron technology inc. p80059 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 11 ? 36 pin 6mm8mm tfbga package outline dimension
utron UT62L2568 rev. 1.1 256k x 8 bit low power cmos sram utron technology inc. p80059 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 12 ? ordering information commercial temperature part no. access time (ns) standby current (a) typ. package UT62L2568lc-55l 55 20 32 pin tsop-i UT62L2568lc-55ll 55 2 32 pin tsop-i UT62L2568lc-70l 70 20 32 pin tsop-i UT62L2568lc-70ll 70 2 32 pin tsop-i UT62L2568lc-100l 100 20 32 pin tsop-i UT62L2568lc-100ll 100 2 32 pin tsop-i UT62L2568ls-55l 55 20 32 pin stsop UT62L2568ls-55ll 55 2 32 pin stsop UT62L2568ls-70l 70 20 32 pin stsop UT62L2568ls-70ll 70 2 32 pin stsop UT62L2568ls-100l 100 20 32 pin stsop UT62L2568ls-100ll 100 2 32 pin stsop UT62L2568bs-55l 55 20 36 pin tfbga UT62L2568bs-55ll 55 2 36 pin tfbga UT62L2568bs-70l 70 20 36 pin tfbga UT62L2568bs-70ll 70 2 36 pin tfbga UT62L2568bs-100l 100 20 36 pin tfbga UT62L2568bs-100ll 100 2 36 pin tfbga extended temperature part no. access time (ns) standby current (a) typ. package UT62L2568lc-55le 55 20 32 pin tsop-i UT62L2568lc-55lle 55 2 32 pin tsop-i UT62L2568lc-70le 70 20 32 pin tsop-i UT62L2568lc-70lle 70 2 32 pin tsop-i UT62L2568lc-100le 100 20 32 pin tsop-i UT62L2568lc-100lle 100 2 32 pin tsop-i UT62L2568ls-55le 55 20 32 pin stsop UT62L2568ls-55lle 55 2 32 pin stsop UT62L2568ls-70le 70 20 32 pin stsop UT62L2568ls-70lle 70 2 32 pin stsop UT62L2568ls-100le 100 20 32 pin stsop UT62L2568ls-100lle 100 2 32 pin stsop UT62L2568bs-55le 55 20 36 pin tfbga UT62L2568bs-55lle 55 2 36 pin tfbga UT62L2568bs-70le 70 20 36 pin tfbga UT62L2568bs-70lle 70 2 36 pin tfbga UT62L2568bs-100le 100 20 36 pin tfbga UT62L2568bs-100lle 100 2 36 pin tfbga
utron UT62L2568 rev. 1.1 256k x 8 bit low power cmos sram utron technology inc. p80059 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 13 ? ordering information (for lead free product) commercial temperature part no. access time (ns) standby current (a) typ. package UT62L2568lcl-55l 55 20 32 pin tsop-i UT62L2568lcl-55ll 55 2 32 pin tsop-i UT62L2568lcl-70l 70 20 32 pin tsop-i UT62L2568lcl-70ll 70 2 32 pin tsop-i UT62L2568lcl-100l 100 20 32 pin tsop-i UT62L2568lcl-100ll 100 2 32 pin tsop-i UT62L2568lsl-55l 55 20 32 pin stsop UT62L2568lsl-55ll 55 2 32 pin stsop UT62L2568lsl-70l 70 20 32 pin stsop UT62L2568lsl-70ll 70 2 32 pin stsop UT62L2568lsl-100l 100 20 32 pin stsop UT62L2568lsl-100ll 100 2 32 pin stsop UT62L2568bsl-55l 55 20 36 pin tfbga UT62L2568bsl-55ll 55 2 36 pin tfbga UT62L2568bsl-70l 70 20 36 pin tfbga UT62L2568bsl-70ll 70 2 36 pin tfbga UT62L2568bsl-100l 100 20 36 pin tfbga UT62L2568bsl-100ll 100 2 36 pin tfbga extended temperature part no. access time (ns) standby current (a) typ. package UT62L2568lcl-55le 55 20 32 pin tsop-i UT62L2568lcl-55lle 55 2 32 pin tsop-i UT62L2568lcl-70le 70 20 32 pin tsop-i UT62L2568lcl-70lle 70 2 32 pin tsop-i UT62L2568lcl-100le 100 20 32 pin tsop-i UT62L2568lcl-100lle 100 2 32 pin tsop-i UT62L2568lsl-55le 55 20 32 pin stsop UT62L2568lsl-55lle 55 2 32 pin stsop UT62L2568lsl-70le 70 20 32 pin stsop UT62L2568lsl-70lle 70 2 32 pin stsop UT62L2568lsl-100le 100 20 32 pin stsop UT62L2568lsl-100lle 100 2 32 pin stsop UT62L2568bsl-55le 55 20 36 pin tfbga UT62L2568bsl-55lle 55 2 36 pin tfbga UT62L2568bsl-70le 70 20 36 pin tfbga UT62L2568bsl-70lle 70 2 36 pin tfbga UT62L2568bsl-100le 100 20 36 pin tfbga UT62L2568bsl-100lle 100 2 36 pin tfbga
utron UT62L2568 rev. 1.1 256k x 8 bit low power cmos sram utron technology inc. p80059 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 14 ? this page is left blank intentionally.

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