2003.4 www.RENESAS.com RENESAS semiconductor lead-free packages RENESAS semiconductor lead-free packages keep safety first in your circuit designs! 1. RENESAS technology corporation puts the maximum effort into making semiconductor products better and more reliable, but ther e is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the RENESAS technology corporation p roduct best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to RENESAS technology corporat ion or a third party. 2. RENESAS technology corporation assumes no responsibility for any damage, or infringement of any third-party's rights, origin ating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents i nformation on products at the time of publication of these materials, and are subject to change by RENESAS technology corporation without notice due to product improvements or other reas ons. it is therefore recommended that customers contact RENESAS technology corporation or an authorized RENESAS technology corporation product distributor for the latest produ ct information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. RENESAS technology corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracie s or errors. please also pay attention to information published by RENESAS technology corporation by various means, including the RENESAS te chnology corporation semiconductor home page (http://www.RENESAS.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, a nd algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. RENESAS technology corp oration assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. RENESAS technology corporation semiconductors are not designed or manufactured for use in a device or system that is used un der circumstances in which human life is potentially at stake. please contact RENESAS technology corporation or an authorized RENESAS technology corporation product distributor wh en considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or u ndersea repeater use. 6. the prior written approval of RENESAS technology corporation is necessary to reprint or reproduce in whole or in part these materials. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a lic ense from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is pro hibited. 8. please contact RENESAS technology corporation for further details on these materials or the products contained therein. http://www.RENESAS.com copyright ? 2003. RENESAS technology corporation, all rights reserved. printed in japan. colophon 0.0 rej01k0001-0100o sales strategic planning div. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan
lead-free packaging lead-free specifications ir/air reflow profiles of small, thin packages and large, thick packages surface finish of lead making terminals lead-free lead-free soldering generally requires higher reflow temperature. RENESAS has set the heat-resisting temperature of a surface- mount type package at 260 c or 245 c to withstand mounting with an sn-ag-cu or similar high-melting-point lead-free solder. solder heat-resistance is defined by the package surface temperature, and an appropriate temperature profile is offered accordi ng to the heat capacity of the package. heat-resistance reflow profiles of small, thin packages and large, thick packages are sho wn below. solder balls information is available on an individual basis for devices that do not conform to the profiles shown below. background to the trend toward lead-free products it is widely recognized that the absorption of lead into the human body can lead to a variety of health problems. to protect the environment against contamination by lead from waste electronic equipment and components, there is a growing worldwide movement to restrict the use of lead. semiconductor products are no exception, and moves are also underway toward making RENESAS semiconductor packages lead-free. the european union has agreed to implement the rohs directive (the restriction of the use of certain hazardous substances in electrical and elecironic equipment), starting in july 2006, prohibiting the use of lead, mercury, cadmium, hexavalent chromium, pbb (polybrominated biphenyls), and pbde (polybrominated diphenyl ethers). this directive was published in the official journal of the european union in february 2003. lead-free packaging the RENESAS approach using lead free materials for semiconductors. initially, priority will be given to making terminals lead-free.* the higher melting points of lead-free solders and the resulting higher mounting temperatures require enhanced heat resistance in components. technologies are under development for eliminating lead inside packages, including sealing glass, and also die-bonding materials in some products. * heat-resistance improvement and provisions for mass production of lead-free terminals have been completed for all product families, and some products are already in mass production. consult a RENESAS sales representative for the mass production details concerning particular products. the target date for the total abolition of lead from terminals is end of 2005. lead-free products are differentiated from conventional products by a "pb-free t." marking on the label of the inner bag, box. making package terminals lead-free improving heat resistance sn-pb plating ni/pd/au plating same as conventional specifications sn-ag-cu ball sn-bi plating sn-cu plating sn-cu plating sn-bi plating ni/pd/au plating package conventional specifications lead-free specifications surface-mount type (smd) pin insertion type (thd) sn-pb plating sn-pb dipping sn-cu plating au plating sn-cu dipping ni/pd/au plating same as conventional specifications same as conventional specifications sn-pb ball
lead-free packaging lead-free specifications ir/air reflow profiles of small, thin packages and large, thick packages surface finish of lead making terminals lead-free lead-free soldering generally requires higher reflow temperature. RENESAS has set the heat-resisting temperature of a surface- mount type package at 260 c or 245 c to withstand mounting with an sn-ag-cu or similar high-melting-point lead-free solder. solder heat-resistance is defined by the package surface temperature, and an appropriate temperature profile is offered accordi ng to the heat capacity of the package. heat-resistance reflow profiles of small, thin packages and large, thick packages are sho wn below. solder balls information is available on an individual basis for devices that do not conform to the profiles shown below. background to the trend toward lead-free products it is widely recognized that the absorption of lead into the human body can lead to a variety of health problems. to protect the environment against contamination by lead from waste electronic equipment and components, there is a growing worldwide movement to restrict the use of lead. semiconductor products are no exception, and moves are also underway toward making RENESAS semiconductor packages lead-free. the european union has agreed to implement the rohs directive (the restriction of the use of certain hazardous substances in electrical and elecironic equipment), starting in july 2006, prohibiting the use of lead, mercury, cadmium, hexavalent chromium, pbb (polybrominated biphenyls), and pbde (polybrominated diphenyl ethers). this directive was published in the official journal of the european union in february 2003. lead-free packaging the RENESAS approach using lead free materials for semiconductors. initially, priority will be given to making terminals lead-free.* the higher melting points of lead-free solders and the resulting higher mounting temperatures require enhanced heat resistance in components. technologies are under development for eliminating lead inside packages, including sealing glass, and also die-bonding materials in some products. * heat-resistance improvement and provisions for mass production of lead-free terminals have been completed for all product families, and some products are already in mass production. consult a RENESAS sales representative for the mass production details concerning particular products. the target date for the total abolition of lead from terminals is end of 2005. lead-free products are differentiated from conventional products by a "pb-free t." marking on the label of the inner bag, box. making package terminals lead-free improving heat resistance sn-pb plating ni/pd/au plating same as conventional specifications sn-ag-cu ball sn-bi plating sn-cu plating sn-cu plating sn-bi plating ni/pd/au plating package conventional specifications lead-free specifications surface-mount type (smd) pin insertion type (thd) sn-pb plating sn-pb dipping sn-cu plating au plating sn-cu dipping ni/pd/au plating same as conventional specifications same as conventional specifications sn-pb ball
various test results lead-free specifications for various packages shear strength of ball products :lead-free specifications :same as conventional specifications in the case of packages for which a number of specifications are indicated, the specification is determined by products. specifications may differ for outsourced products. qfp,tqfp lqfp,hqfp ic,lsi package transistor, diode package ic,lsi package sop,tssop tsop(1),tsop(2) hsop qfj soj p-vqfn bga tfbga hbga lga upak,sot-89 dpak(s),mp-3 ldpak(s),to-22os dip sdip g-dip c-dip zip pga to-92,to-220 to-3p dpak(l) ldpak(l) urp ufp mpak sot-23mod surface- mount type (smd) pin insertion type(thd) do-34 do-35 package name package transistor, diode package package: 208-pin qfp (alloy 42) temperature cycle test conditions: -55/125 c package: 20-pin sop (cu) temperature cycle test conditions: -55/125 c package: cmpak-4 (cu) temperature cycle test conditions: -55/125 c package: 100-pin qfp (alloy 42) temperature cycle test conditions: -40/125 c package: 100-pin qfp (cu) temperature cycle test conditions: -40/125 c number of temperature cycles 0 500 1000 0 2 4 6 8 10 sn-bi sn-bi sn-bi sn-bi sn-pb solder paste sn-3ag-0.7cu sn-2.5ag-1bi-0.5cu sn-3ag-3bi-0.7cu sn-37pb sn-37pb(ref.) 0 500 1000 0 10 20 30 number of temperature cycles sn-bi sn-bi sn-bi sn-pb solder paste sn-3ag-0.5cu sn-2.5ag-1bi-0.5cu sn-37pb sn-37pb(ref.) number of temperature cycles number of temperature cycles 500 0 1000 1500 2000 0 20 18 16 14 12 10 8 6 4 2 sn-cu sn-cu sn-cu sn-cu sn-cu sn-pb solder paste sn-3.5ag-0.7cu sn-3.0ag-0.5cu sn-2.5ag-05cu-2.5bi sn-8zn-3bi sn-37pb sn-37pb(ref.) 500 0 1000 1500 2000 0 20 18 16 14 12 10 8 6 4 2 sn-cu sn-cu sn-cu sn-cu sn-cu sn-pb solder paste sn-3.5ag-0.7cu sn-3.0ag-0.5cu sn-2.5ag-05cu-2.5bi sn-8zn-3bi sn-37pb sn-37pb(ref.) 0 500 1000 0 10 20 30 number of temperature cycles ni/pd/au ni/pd/au ni/pd/au sn-pb solder paste sn-3ag-0.5cu sn-2.5ag-1bi-0.5cu sn-37pb sn-37p(ref.) 10 9 8 7 6 5 4 3 2 1 0 sn-ag-cu ball sn-pb ball package: 240-pin fbga test conditions: left at 150 c appearance sn-bi plating sn-cu plating ni/pd/au plating sn-cu dipping sn-ag-cu ball sn plating au plating terminal surface finish terminal surface finish terminal surface finish terminal surface finish terminal surface finish storage time (h) 800 1000 600 400 200 0 speed: 12 mm/min shear strength 45 hook hook 45 pull 45 pull 45 pull shear vertical pull 45 hook 45 hook the joint strengths for both alloy 42 and cu lead frames are equivalent to conventional products (using sn-pb plating and sn-pb solder paste). the joint strengths for sn-ag-cu ball prodncts are equivalent to conventional products. joint strength test results of lead-free plating products joint strength test results of lead-free ball products joint strength (n) joint strength (n) joint strength (n) joint strength (n) joint strength (n) joint strength test results joint strength test results test method test method shear strength (n)
various test results lead-free specifications for various packages shear strength of ball products :lead-free specifications :same as conventional specifications in the case of packages for which a number of specifications are indicated, the specification is determined by products. specifications may differ for outsourced products. qfp,tqfp lqfp,hqfp ic,lsi package transistor, diode package ic,lsi package sop,tssop tsop(1),tsop(2) hsop qfj soj p-vqfn bga tfbga hbga lga upak,sot-89 dpak(s),mp-3 ldpak(s),to-22os dip sdip g-dip c-dip zip pga to-92,to-220 to-3p dpak(l) ldpak(l) urp ufp mpak sot-23mod surface- mount type (smd) pin insertion type(thd) do-34 do-35 package name package transistor, diode package package: 208-pin qfp (alloy 42) temperature cycle test conditions: -55/125 c package: 20-pin sop (cu) temperature cycle test conditions: -55/125 c package: cmpak-4 (cu) temperature cycle test conditions: -55/125 c package: 100-pin qfp (alloy 42) temperature cycle test conditions: -40/125 c package: 100-pin qfp (cu) temperature cycle test conditions: -40/125 c number of temperature cycles 0 500 1000 0 2 4 6 8 10 sn-bi sn-bi sn-bi sn-bi sn-pb solder paste sn-3ag-0.7cu sn-2.5ag-1bi-0.5cu sn-3ag-3bi-0.7cu sn-37pb sn-37pb(ref.) 0 500 1000 0 10 20 30 number of temperature cycles sn-bi sn-bi sn-bi sn-pb solder paste sn-3ag-0.5cu sn-2.5ag-1bi-0.5cu sn-37pb sn-37pb(ref.) number of temperature cycles number of temperature cycles 500 0 1000 1500 2000 0 20 18 16 14 12 10 8 6 4 2 sn-cu sn-cu sn-cu sn-cu sn-cu sn-pb solder paste sn-3.5ag-0.7cu sn-3.0ag-0.5cu sn-2.5ag-05cu-2.5bi sn-8zn-3bi sn-37pb sn-37pb(ref.) 500 0 1000 1500 2000 0 20 18 16 14 12 10 8 6 4 2 sn-cu sn-cu sn-cu sn-cu sn-cu sn-pb solder paste sn-3.5ag-0.7cu sn-3.0ag-0.5cu sn-2.5ag-05cu-2.5bi sn-8zn-3bi sn-37pb sn-37pb(ref.) 0 500 1000 0 10 20 30 number of temperature cycles ni/pd/au ni/pd/au ni/pd/au sn-pb solder paste sn-3ag-0.5cu sn-2.5ag-1bi-0.5cu sn-37pb sn-37p(ref.) 10 9 8 7 6 5 4 3 2 1 0 sn-ag-cu ball sn-pb ball package: 240-pin fbga test conditions: left at 150 c appearance sn-bi plating sn-cu plating ni/pd/au plating sn-cu dipping sn-ag-cu ball sn plating au plating terminal surface finish terminal surface finish terminal surface finish terminal surface finish terminal surface finish storage time (h) 800 1000 600 400 200 0 speed: 12 mm/min shear strength 45 hook hook 45 pull 45 pull 45 pull shear vertical pull 45 hook 45 hook the joint strengths for both alloy 42 and cu lead frames are equivalent to conventional products (using sn-pb plating and sn-pb solder paste). the joint strengths for sn-ag-cu ball prodncts are equivalent to conventional products. joint strength test results of lead-free plating products joint strength test results of lead-free ball products joint strength (n) joint strength (n) joint strength (n) joint strength (n) joint strength (n) joint strength test results joint strength test results test method test method shear strength (n)
solder ball connection reliability cross-sections of fillet shape after mounting on board cumulative failure rate (%) sn-bi plating vs sn-pb plating sn-cu dipping vs sn-pb dipping sn-ag-cu ball vs sn-pb ball sn-cu plating vs sn-pb plating ni/pd/au plating vs sn-pb plating sn-bi plating conventional sn-pb plating sn-ag-cu ball sn-cu dipping conventional sn-pb dipping conventional sn-pb ball sn-cu plating conventional sn-pb plating ni/pd/au plating conventional sn-pb plating breakage evaluation with mounting on both sides of board connection reliability evaluation test conditions temperature : -25/125 c time : 20 min/cycle package 240pin fbga mounting board specifications fr-4 number of temperature cycles 99.9 99.0 95.0 90.0 80.0 70.0 60.0 50.0 40.0 30.0 20.0 15.0 10.0 5.0 4.0 3.0 2.0 1.5 1.0 0.5 0.4 0.3 0.2 0.15 0.1 100 1000 10000 10 solder ball : sn-ag-cu solder paste : sn-ag-cu solder ball : sn-pb solder paste : sn-pb package board solder enlarged views of observed area connection reliability of sn-ag-cu balls is equivalent to conventional products.
solder ball connection reliability cross-sections of fillet shape after mounting on board cumulative failure rate (%) sn-bi plating vs sn-pb plating sn-cu dipping vs sn-pb dipping sn-ag-cu ball vs sn-pb ball sn-cu plating vs sn-pb plating ni/pd/au plating vs sn-pb plating sn-bi plating conventional sn-pb plating sn-ag-cu ball sn-cu dipping conventional sn-pb dipping conventional sn-pb ball sn-cu plating conventional sn-pb plating ni/pd/au plating conventional sn-pb plating breakage evaluation with mounting on both sides of board connection reliability evaluation test conditions temperature : -25/125 c time : 20 min/cycle package 240pin fbga mounting board specifications fr-4 number of temperature cycles 99.9 99.0 95.0 90.0 80.0 70.0 60.0 50.0 40.0 30.0 20.0 15.0 10.0 5.0 4.0 3.0 2.0 1.5 1.0 0.5 0.4 0.3 0.2 0.15 0.1 100 1000 10000 10 solder ball : sn-ag-cu solder paste : sn-ag-cu solder ball : sn-pb solder paste : sn-pb package board solder enlarged views of observed area connection reliability of sn-ag-cu balls is equivalent to conventional products.
2003.4 www.RENESAS.com RENESAS semiconductor lead-free packages RENESAS semiconductor lead-free packages keep safety first in your circuit designs! 1. RENESAS technology corporation puts the maximum effort into making semiconductor products better and more reliable, but ther e is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the RENESAS technology corporation p roduct best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to RENESAS technology corporat ion or a third party. 2. RENESAS technology corporation assumes no responsibility for any damage, or infringement of any third-party's rights, origin ating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents i nformation on products at the time of publication of these materials, and are subject to change by RENESAS technology corporation without notice due to product improvements or other reas ons. it is therefore recommended that customers contact RENESAS technology corporation or an authorized RENESAS technology corporation product distributor for the latest produ ct information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. RENESAS technology corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracie s or errors. please also pay attention to information published by RENESAS technology corporation by various means, including the RENESAS te chnology corporation semiconductor home page (http://www.RENESAS.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, a nd algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. RENESAS technology corp oration assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. RENESAS technology corporation semiconductors are not designed or manufactured for use in a device or system that is used un der circumstances in which human life is potentially at stake. please contact RENESAS technology corporation or an authorized RENESAS technology corporation product distributor wh en considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or u ndersea repeater use. 6. the prior written approval of RENESAS technology corporation is necessary to reprint or reproduce in whole or in part these materials. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a lic ense from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is pro hibited. 8. please contact RENESAS technology corporation for further details on these materials or the products contained therein. http://www.RENESAS.com copyright ? 2003. RENESAS technology corporation, all rights reserved. printed in japan. colophon 0.0 rej01k0001-0100o sales strategic planning div. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan
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