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1. general description the gtl2008 is a customized translator betw een dual xeon processors, platform health management, south bridge and power supply lvttl and gtl signals. functionally and footprint identical to the gtl2007, the gtl2008 lvttl and gtl outputs were changed to put them into a high-imp edance state when en1 and en2 are low, with the exception of 11bo because its normal state is low, so it is forced low. en1 and en2 will remain low until v cc is at normal voltage, the other inputs are in valid states and vref is at its proper voltage to assu re that the outputs will remain high -impedance through power-up. the gtl2008 has the enable function that dis ables the error output to the monitoring agent for platforms that monitor the individual error conditions from each processor. this enable function can be used so that fals e error conditions are not passed to the monitoring agent when the system is un expectedly powered down. this unexpected power-down could be from a power supply overload, a cpu thermal trip, or some other event of which the monitoring agent is unaware. a typical implementation would be to connec t each enable line to the system power good signal or the individual enables to the vrd power good for each processor. typically xeon processors specify a v tt of 1.1 v to 1.2 v, as well as a nominal v ref of 0.73 v to 0.76 v. to allow for future vo ltage level changes that may extend v ref to 0.63 of v tt (minimum of 0.693 v with v tt of 1.1 v) the gtl2008 allows a minimum v ref of 0.66 v. characterization results show that there is little dc or ac performance variation between these v ref levels. 2. features and benefits ? operates as a gtl to lvttl sampling receiver or lvttl to gtl driver ? operates at gtl ? /gtl/gtl+ signal levels ? en1 and en2 disable error output ? all lvttl and gtl outputs are put in a high-impedance state when en1 and en2 are low ? 3.0 v to 3.6 v operation ? lvttl i/o not 5 v tolerant ? series termination on the lvttl outputs of 30 ? esd protection exceeds 2000 v hbm per jesd22-a114, 150 v mm per jesd22-a115, and 1000 v cdm per jesd22-c101 gtl2008 12-bit gtl to lvttl translator with power good control and high-impedance lvttl and gtl outputs rev. 04 ? 19 february 2010 product data sheet
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 2 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs ? latch-up testing is done to jedec standard jesd78 class ii, level a which exceeds 500 ma ? package offered: tssop28 3. quick reference data 4. ordering information table 1. quick reference data t amb =25 c symbol parameter conditions min typ max unit c io input/output capacitance a port; v o = 3.0 v or 0 v - 2.5 3.5 pf b port; v o =v tt or 0 v - 1.5 2.5 pf v ref =0.73v; v tt =1.1v t plh low to high propagation delay na to nbi; see figure 4 14 8ns nbi to na or nao (open-drain outputs); see figure 14 21318ns t phl high to low propagation delay na to nbi; see figure 4 2 5.5 10 ns nbi to na or nao (open-drain outputs); see figure 14 2 4 10 ns v ref =0.76v; v tt =1.2v t plh low to high propagation delay na to nbi; see figure 4 14 8ns nbi to na or nao (open-drain outputs); see figure 14 21318ns t phl high to low propagation delay na to nbi; see figure 4 2 5.5 10 ns nbi to na or nao (open-drain outputs); see figure 14 2 4 10 ns table 2. ordering information t amb = ? 40 cto +85 c type number topside mark package name description version GTL2008PW gtl2008 tssop28 plastic thin shrink small outline package; 28 leads; body width 4.4 mm sot361-1
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 3 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs 5. functional diagram (1) the enable on 7bo1/7bo2 include a delay that prevents the tr ansient condition where 5bi/6bi go from low to high, and the low to high on 5a/6a lags up to 100 ns from causing a low glitch on the 7bo1/7bo2 outputs. (2) the 11bo output is driven low after v cc is powered up with en2 low to prevent reporting of a fault condition before en2 goes high. fig 1. logic diagram of gtl2008 002aab968 gtl2008 1bi 2bi 27 26 gtl inputs 7bo1 25 7bo2 24 gtl outputs en2 23 lvttl input 11bo 22 gtl output delay (1) 5bi 6bi 21 20 3bi 19 4bi 18 delay (1) gtl inputs 7 11bi 8 11a 9 9bi lvttl input/output (open-drain) gtl input gtl input 1 vref 2 1ao 3 2ao 4 5a 5 6a 6 en1 lvttl input gtl lvttl inputs/outputs (open-drain) lvttl outputs (open-drain) 10 3ao 11 4ao lvttl outputs (open-drain) 10bo1 17 10bo2 16 gtl outputs 12 10ai1 13 10ai2 lvttl inputs 9ao 15 lvttl output (2) 1 1 & & 1
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 4 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs 6. pinning information 6.1 pinning 6.2 pin description fig 2. pin configuration for tssop28 GTL2008PW vref v cc 1ao 1bi 2ao 2bi 5a 7bo1 6a 7bo2 en1 en2 11bi 11bo 11a 5bi 9bi 6bi 3ao 3bi 4ao 4bi 10ai1 10bo1 10ai2 10bo2 gnd 9ao 002aab969 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 18 17 20 19 22 21 24 23 26 25 28 27 table 3. pin description symbol pin description vref 1 gtl reference voltage 1ao 2 data output (lvttl), open-drain 2ao 3 data output (lvttl), open-drain 5a 4 data input/output (lvttl), open-drain 6a 5 data input/output (lvttl), open-drain en1 6 enable input (lvttl) 11bi 7 data input (gtl) 11a 8 data input/output (lvttl), open-drain 9bi 9 data input (gtl) 3ao 10 data output (lvttl), open-drain 4ao 11 data output (lvttl), open-drain 10ai1 12 data input (lvttl) 10ai2 13 data input (lvttl) gnd 14 ground (0 v) 9ao 15 data output (lvttl), 3-state 10bo2 16 data output (gtl) 10bo1 17 data output (gtl) 4bi 18 data input (gtl) 3bi 19 data input (gtl)
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 5 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs 7. functional description refer to figure 1 ? logic diagram of gtl2008 ? . 7.1 function tables [1] 1ao, 2ao, 3ao, 4ao and 5a/6a condition chang ed by enn power good signal as described in table 5 and ta b l e 6 . 6bi 20 data input (gtl) 5bi 21 data input (gtl) 11bo 22 data output (gtl) en2 23 enable input (lvttl) 7bo2 24 data output (gtl) 7bo1 25 data output (gtl) 2bi 26 data input (gtl) 1bi 27 data input (gtl) v cc 28 positive supply voltage table 3. pin description ?continued symbol pin description table 4. gtl input signals h = high voltage level; l = low voltage level. input output [1] 1bi/2bi/3bi/4bi/9bi 1ao/2ao/3ao/4ao/9ao ll hh table 5. en1 power good signal h = high voltage level; l = low voltage level. en1 1ao and 2ao 5a l 1bi and 2bi disconnected (high-z) 5bi disconnected h follows bi 5bi connected table 6. en2 power good signal h = high voltage level; l = low voltage level. en2 3ao and 4ao 6a l 3bi and 4bi disconnected (high-z) 6bi disconnected h follows bi 6bi connected
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 6 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs [1] the enable on 7bo1/7bo2 includes a delay that prevents the transient condition where 5bi/6bi go from low to high, and the low to high on 5a/6a lags up to 100 ns from causing a low glitch on the 7bo1/7bo2 outputs. [2] open-drain input/output terminal is driv en to logic low state by other driver. [1] open-drain input/output terminal is driv en to logic low state by other driver. table 7. smi signals h = high voltage level; l = low voltage level; x = don?t care. inputs output 10ai1/10ai2 en2 9bi 10bo1/10bo2 lhll l hhl hhl l hhhh llxl hl xh table 8. prochot signals h = high voltage level; l = low voltage level. input input/output output 5bi/6bi 5a/6a (open-drain) 7bo1/7bo2 llh [1] hl [2] l hhh table 9. nmi signals h = high voltage level; l = low voltage level; x = don?t care. inputs input/output output 11bi en2 11a (open-drain) 11bo l hhl lhl [1] h hhl h xl hl xl l [1] h
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 7 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs 8. application design-in information (1) if 9ao needs to be high before en2 goes high, a pull-up resi stor is required because it is high-impedance until en2 goes high. all other outputs, both gtl and lvttl, requ ire pull-up resistors bec ause they are open-drain. fig 3. typical application thrmtrip l cpu1 ierr_l forcepr_l cpu2 disable_l gtl2008 prochot l forcepr_l prochot l thrmtrip l ierr_l cpu1 disable_l cpu2 nmi nmi 10bo2 10bo1 4bi 3bi 6bi 5bi en2 7bo2 7bo1 2bi 1bi 1ao 2ao 5a 6a 11a 3ao 4ao 10ai1 10ai2 en1 gnd 9bi 9ao platform health management cpu1 1err_l cpu1 thrmtrip l cpu1 prochot l cpu2 prochot l nmi_l cpu2 1err_l cpu2 thrmtrip l cpu1 smi l cpu2 smi l smi_buff_l southbridge nmi southbridge smi_l power supply power good 1.5 k to 1.2 k v cc v tt 56 1.5 k r 2r vref 11b1 v cc v cc 11b0 002aab970 56 v tt (1)
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 8 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs 9. limiting values [1] the input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. [2] current into any output in the low state. [3] current into any output in the high state. [4] the performance capability of a high-perfo rmance integrated circuit in conjunction with its thermal environment can create j unction temperatures which are detrimental to reliability. the maximum junction temperature of this integrated circuit should not excee d 150 c. 10. recommended operating conditions table 10. limiting values in accordance with the absolute ma ximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +4.6 v i ik input clamping current v i <0v - ? 50 ma v i input voltage a port (lvttl) ? 0.5 [1] +4.6 v b port (gtl) ? 0.5 [1] +4.6 v i ok output clamping current v o <0v - ? 50 ma v o output voltage output in of f or high state; a port ? 0.5 [1] +4.6 v output in off or high state; b port ? 0.5 [1] +4.6 v i ol low-level output current [2] a port - 32 ma b port - 30 ma i oh high-level output current [3] a port - ? 32 ma t stg storage temperature ? 60 +150 c t j(max) maximum junction temperature [4] -+125 c table 11. operating conditions symbol parameter conditions min typ max unit v cc supply voltage 3.0 3.3 3.6 v v tt termination voltage gtl - 1.2 - v v ref reference voltage gtl 0.64 0.8 1.1 v v i input voltage a port 0 3.3 3.6 v b port 0 v tt 3.6 v v ih high-level input voltage a port and enn 2 - - v b port v ref +0.050 - - v v il low-level input voltage a port and enn - - 0.8 v b port - - v ref ? 0.050 v i oh high-level output current a port - - ? 16 ma i ol low-level output current a port - - 16 ma b port - - 15 ma t amb ambient temperature operating in free-air ? 40 - +85 c
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 9 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs 11. static characteristics [1] all typical values are measured at v cc = 3.3 v and t amb =25 c. [2] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [3] this is the increase in supply current for each input th at is at the specified lvttl voltage level rather than v cc or gnd. table 12. static characteristics recommended operating conditions; voltages are referenced to gnd (ground = 0 v). t amb = ? 40 cto +85 c symbol parameter conditions min typ [1] max unit v oh high-level output voltage 9ao; v cc = 3.0 v to 3.6 v; i oh = ? 100 a [2] v cc ? 0.2 3.0 - v 9ao; v cc =3.0v; i oh = ? 16 ma [2] 2.1 2.3 - v v ol low-level output voltage a port; v cc = 3.0 v; i ol =4ma [2] -0.150.4v a port; v cc = 3.0 v; i ol =8ma [2] - 0.3 0.55 v a port; v cc = 3.0 v; i ol =16ma [2] -0.60.8v b port; v cc = 3.0 v; i ol =15ma [2] -0.130.4v i oh high-level output current open-drain outputs; a port other than 9ao; v o =v cc ; v cc =3.6v -- 1 a i i input current a port; v cc = 3.6 v; v i =v cc -- 1 a a port; v cc = 3.6 v; v i =0v - - 1 a b port; v cc = 3.6 v; v i =v tt or gnd - - 1 a i cc supply current a or b port; v cc =3.6v; v i =v cc or gnd; i o =0ma -812ma i cc [3] additional supply current per input; a port or control inputs; v cc =3.6v; v i =v cc ? 0.6 v - - 500 a c io input/output capacitance a port; v o =3.0vor0v - 2.5 3.5 pf b port; v o =v tt or 0 v - 1.5 2.5 pf
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 10 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs 12. dynamic characteristics table 13. dynamic characteristics v cc =3.3v 0.3 v symbol parameter conditions min typ [1] max unit v ref =0.73v; v tt =1.1v t plh low to high propagation delay na to nbi; see figure 4 148ns 9bi to 9ao; see figure 5 25.510ns nbi to na or nao (open-drain outputs); see figure 14 21318ns 9bi to 10bon 2 6 11 ns 11a to 11bo; see figure 10 148ns 11bi to 11a; see figure 9 27.511ns 11bi to 11bo 2 8 13 ns 5bi to 7bo1 or 6bi to 7bo2; see figure 7 4712ns t phl high to low propagation delay na to nbi; see figure 4 25.510ns 9bi to 9ao; see figure 5 25.510ns nbi to na or nao (open-drain outputs); see figure 14 2410ns 9bi to 10bon 2 6 11 ns 11a to 11bo; see figure 10 15.510ns 11bi to 11a; see figure 9 28.513ns 11bi to 11bo [2] 21421ns 5bi to 7bo1 or 6bi to 7bo2; see figure 7 100 205 350 ns t plz low to off-state propagation delay en1 to nao or en2 to nao; see figure 8 1310ns en1 to 5a (i/o) or en2 to 6a (i/o); see figure 8 137ns t pzl off-state to low propagation delay en1 to nao or en2 to nao; see figure 8 2710ns en1 to 5a (i/o) or en2 to 6a (i/o); see figure 8 2710ns t phz high to off-state propagation delay en2 to 9ao; see figure 11 2510ns t pzh off-state to high propagation delay en2 to 9ao; see figure 11 1410ns
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 11 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs [1] all typical values are at v cc = 3.3 v and t amb =25 c. [2] includes ~7.6 ns rc rise time of test load pull-up on 11a, 1.5 k pull-up and 21 pf load on 11a has about 23 ns rc rise time. v ref =0.76v; v tt =1.2v t plh low to high propagation delay na to nbi; see figure 4 148ns 9bi to 9ao; see figure 5 25.510ns nbi to na or nao (open-drain outputs); see figure 14 21318ns 9bi to 10bon 2 6 11 ns 11a to 11bo; see figure 10 148ns 11bi to 11a; see figure 9 27.511ns 11bi to 11bo 2 8 13 ns 5bi to 7bo1 or 6bi to 7bo2; see figure 7 4712ns t phl high to low propagation delay na to nbi; see figure 4 25.510ns 9bi to 9ao; see figure 5 25.510ns nbi to na or nao (open-drain outputs); see figure 14 2410ns 9bi to 10bon 2 6 11 ns 11a to 11bo; see figure 10 15.510ns 11bi to 11a; see figure 9 28.513ns 11bi to 11bo [2] 21421ns 5bi to 7bo1 or 6bi to 7bo2; see figure 7 100 205 350 ns t plz low to off-state propagation delay en1 to nao or en2 to nao; see figure 8 1310ns en1 to 5a (i/o) or en2 to 6a (i/o); see figure 8 137ns t pzl off-state to low propagation delay en1 to nao or en2 to nao; see figure 8 2710ns en1 to 5a (i/o) or en2 to 6a (i/o); see figure 8 2710ns t phz high to off-state propagation delay en2 to 9ao; see figure 11 2510ns t pzh off-state to high propagation delay en2 to 9ao; see figure 11 2410ns table 13. dynamic characteristics ?continued v cc =3.3v 0.3 v symbol parameter conditions min typ [1] max unit
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 12 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs 12.1 waveforms v m = 1.5 v at v cc 3.0 v for a ports; v m =v ref for b ports. v m = 1.5 v for a port and v ref for b port a port to b port a. pulse duration b. propagation delay times fig 4. voltage waveforms 002aaa999 v oh 0 v t p v m v m 002aab000 3.0 v 0 v v tt v ol t plh t phl v ref v ref 1.5 v 1.5 v input output prr 10 mhz; z o =50 ; t r 2.5 ns; t f 2.5 ns fig 5. propagation delay, 9bi to 9ao fig 6. nb i to na (i/o) or nbi to nao open-drain outputs fig 7. 5bi to 7bo1 or 6bi to 7bo2 fig 8. en1 to 5a (i/o) or en2 to 6a (i/o) or en1 to nao or en2 to nao 002aab001 v tt 1 / 3 v tt v oh v ol t plh t phl 1.5 v 1.5 v v ref v ref input output 002aab002 v tt 1 / 3 v tt v cc t plz t pzl v ref v ref input output v ol + 0.3 v 1.5 v 002aac195 v tt 1 / 3 v tt v tt v ol t plh t phl v ref v ref input output v ref v ref 002aab005 3.0 v 0 v v oh v ol t plz t pzl 1.5 v 1.5 v input output 1.5 v v ol + 0.3 v
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 13 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs fig 9. 11bi to 11a fig 10. 11a to 11bo fig 11. en2 to 9ao 002aac196 v tt 0 v v oh v ol t plz t pzl v ref v ref input output 1.5 v v ol + 0.3 v 002aac197 3.0 v 0 v v tt v ol t plh t phl v ref v ref 1.5 v 1.5 v input output 002aab980 3.0 v 0 v v oh v ol t phz t pzh 1.5 v 1.5 v input output 1.5 v v ol + 0.3 v
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 14 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs 13. test information r l ? load resistor c l ? load capacitance; includes jig and probe capacitance r t ? termination resistance; should be equal to z o of pulse generators. fig 12. load circuit for a outputs (9ao) fig 13. load circuit for b outputs fig 14. load circuit for open-drain lvttl i/o and open-drain outputs fig 15. load circuit for 9ao off-state to low and low to off-state pulse generator v o c l 50 pf 002aab98 1 r l 500 r t v i v cc dut pulse generator dut v o c l 30 pf 50 002aab26 4 r t v i v cc v tt pulse generator dut v o c l 21 pf r l 1.5 k 002aab26 5 r t v i v cc v cc pulse generator dut v o c l 50 pf r l 500 002aab98 2 r t v i v cc 6 v r l 500
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 15 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs 14. package outline fig 16. package outline sot361-1 (tssop28) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 9.8 9.6 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.8 0.5 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot361-1 mo-153 99-12-27 03-02-19 0.25 w m b p z e 114 28 15 pin 1 index a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a d y 0 2.5 5 mm scale t ssop28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm sot361 -1 a max. 1.1
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 16 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs 15. soldering of smd packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 ?surface mount reflow soldering description? . 15.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electr ical circuits. the soldered joint provides both the mechanical and the electrical connection. th ere is no single sold ering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for fine pitch smds. reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 15.2 wave and reflow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased pr obability of bridging. the reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. leaded packages, packages with solder balls, and leadless packages are all reflow solderable. key characteristics in both wave and reflow soldering are: ? board specifications, in cluding the board finish , solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivit y level of the packages ? package placement ? inspection and repair ? lead-free soldering versus snpb soldering 15.3 wave soldering key characteristics in wave soldering are: ? process issues, such as application of adhe sive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath specifications, including temperature and impurities
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 17 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs 15.4 reflow soldering key characteristics in reflow soldering are: ? lead-free versus snpb solderi ng; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see figure 17 ) than a snpb process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? reflow temperature profile; this profile includ es preheat, reflow (in which the board is heated to the peak temperature) and coolin g down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classified in accordance with ta b l e 1 4 and 15 moisture sensitivity precautions, as indicat ed on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during reflow soldering, see figure 17 . table 14. snpb eutectic process (from j-std-020c) package thickness (mm) package reflow temperature ( c) volume (mm 3 ) < 350 350 < 2.5 235 220 2.5 220 220 table 15. lead-free process (from j-std-020c) package thickness (mm) package reflow temperature ( c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 18 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs for further information on temperature profiles, refer to application note an10365 ?surface mount reflow soldering description? . 16. abbreviations msl: moisture sensitivity level fig 17. temperature profiles for large and small components 001aac84 4 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature table 16. abbreviations acronym description cdm charged device model cmos complementary metal oxide semiconductor cpu central processing unit dut device under test esd electrostatic discharge gtl gunning transceiver logic hbm human body model lvttl low voltage transistor-transistor logic mm machine model prr pulse rate repetition ttl transistor-transistor logic vrd voltage regulator down
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 19 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs 17. revision history table 17. revision history document id release date data sheet status change notice supersedes gtl2008_4 20100219 product data sheet - gtl2008_3 modifications: ? section 2 ? features and benefits ? , 8 th bullet item: corrected from ?200 v mm per jesd22-a115? to ?150 v mm per jesd22-a115? gtl2008_3 20070201 product data sheet - gtl2008_gtl2107_2 gtl2008_gtl2107_2 20060926 product data sheet - gtl2008_1 gtl2008_1 20060502 product data sheet - -
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 20 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs 18. legal information 18.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 18.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 18.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interrupt ion, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer?s third party customer(s) (hereinafter both referred to as ?application?). it is customer?s sole responsibility to check whether the nxp semiconductors product is suitable and fit for the application planned. customer has to do all necessary testing for the application in order to avoid a default of the application and the product. nxp semiconducto rs does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. quick reference data ? the quick reference data is an extract of the product data given in the limiting values and characteristics sections of this document, and as such is not comp lete, exhaustive or legally binding. non-automotive qualified products ? unless the data sheet of an nxp semiconductors product expressly states that the product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this docu ment contains the product specification.
gtl2008_4 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 04 ? 19 february 2010 21 of 22 nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs in the event that customer uses t he product for design-in and use in automotive applications to automotive s pecifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully in demnifies nxp semi conductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. 18.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 19. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors gtl2008 gtl translator with power good control and high-impedance outputs ? nxp b.v. 2010. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 19 february 2010 document identifier: gtl2008_4 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 20. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 quick reference data . . . . . . . . . . . . . . . . . . . . . 2 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 functional description . . . . . . . . . . . . . . . . . . . 5 7.1 function tables . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 application design-in information . . . . . . . . . . 7 9 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 8 10 recommended operating conditions. . . . . . . . 8 11 static characteristics. . . . . . . . . . . . . . . . . . . . . 9 12 dynamic characteristics . . . . . . . . . . . . . . . . . 10 12.1 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 13 test information . . . . . . . . . . . . . . . . . . . . . . . . 14 14 package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 15 soldering of smd packages . . . . . . . . . . . . . . 16 15.1 introduction to soldering . . . . . . . . . . . . . . . . . 16 15.2 wave and reflow soldering . . . . . . . . . . . . . . . 16 15.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 16 15.4 reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 17 16 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18 17 revision history . . . . . . . . . . . . . . . . . . . . . . . . 19 18 legal information. . . . . . . . . . . . . . . . . . . . . . . 20 18.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 20 18.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 18.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 18.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 21 19 contact information. . . . . . . . . . . . . . . . . . . . . 21 20 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

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