revision 1.5 - 1 - dlp design DLP-USB1 usb to fifo parallel interface module DLP-USB1 features application areas send / receive data over usb at up to 1 m bytes / sec prototype development 384 byte fifo transmit buffer / 128 byte fifo receive usb isdn and adsl modems buffer for high data throughput high speed usb pda interface simple interface to cpu or mcu bus usb interface for digital cameras no in-depth knowledge of usb required as all usb usb interface for mp3 players protocol is handled automatically within the module high speed usb instrumentation ftdi?s virtual com port drivers eliminate the need for usb driver development in most cases. integrated 3.3v regulator ? no external regulator required 4.4v - 5.25v single supply taken directly from the usb port uhci / ohci compliant usb 1.1 specification compliant usb vid, pid, serial number and product description strings stored in on-board eeprom. virtual com port drivers for windows 98, windows 98 se, windows 2000, windows millennium, apple imac and linux general description the DLP-USB1 provides an easy cost-effective method of transferring data to / from a peripheral and a host at up to 8 million bits ( 1 megabyte ) per second. it?s simple fifo-like design makes it easy to interface to any microcontroller or microprocessor via io ports. to send data from the peripheral to the host computer simply write the byte wide data into the module when txe# is low. if the ( 384 byte ) transmit buffer fills up or is busy storing the previously written byte, the device takes txe# high in order to stop further data from being written until some of the fifo data has been transferred over usb to the host. when the host sends data to the peripheral over usb, the device will take rxf# low to let the peripheral know that data is available. the peripheral then reads the data until rxf# goes high indicating no more data is available to read. by using ftdi?s virtual com port drivers, the peripheral looks like a standard com port to the application software. commands to set the baud rate are ignored ? the device always transfers data at it?s fastest rate regardless of the application?s baud rate setting. the latest versions of the drivers are available for download from ftdi's drivers and utilities page at http://www.ftdi.co.uk/.
revision 1.5 - 2 - application notes usb devices transfer data in packets. if data is to be sent from the pc, a packet is built up by the application program and is sent via the device driver to the usb scheduler. this scheduler puts a request onto the list of tasks for the usb host controller to perform. this will typically take at least 1 millisecond to execute because it will not pick up the new request until the next ' usb frame' (the frame period is 1 millisecond). there is therefore a sizeable overhead (depending on your required throughput) associated with moving the data from the application to the usb device. if data is sent 'byte at a time' by an application, this will severely limit the overall throughput of the system as a whole. it must be stressed that in order to achieve maximum throughput , application programs should send or receive data using buffers and not individual characters.
revision 1.5 - 3 - table 1 - dlp- usb1 pinout description 1 pin # signal type description pin# description 1 extrst# (in) take low to reset the entire device 2 sleep# (out) goes low when module enters the suspend mode 3 txe# (out) when high, the fifo?s 384-byte transmit buffer is full or busy storing the last byte written. do not attempt to write data to the transmit buffer when txe# is high. 4 rxf# (out) when low, at least 1 byte is present in the fifo?s 128-byte receive buffer and is ready to be read with rd#. rxf# goes high when the receive buffer is empty. 5 wr (in) when taken from a high to a low state, wr reads the 8 data lines and writes the byte into the fifo?s transmit buffer. data written to the transmit buffer is immediately sent to the host pc and placed in the rs-232 buffer opened by the application program. 6 rd# (in) when pulled low, rd# takes the 8 data lines from a high impedance state to the current byte in the fifo's receive buffer. taking rd# high returns the data pins to a high impedance state and prepares the next byte (if available) in the fifo to be read. 7 vcc provides power for target electronics. up to 500ma available when usb is active. 8 gnd ground supply pin for target electronics. 16 d0 i/o bi-directional data bus bit # 0 15 d1 i/o bi-directional data bus bit # 1 14 d2 i/o bi-directional data bus bit # 2 13 d3 i/o bi-directional data bus bit # 3 12 d4 i/o bi-directional data bus bit # 4 11 d5 i/o bi-directional data bus bit # 5 10 d6 i/o bi-directional data bus bit # 6 9 d7 i/o bi-directional data bus bit # 7 1 6 7 16
revision 1.5 - 4 - DLP-USB1 timing diagram ? fifo read cycle t6 t5 rxf# t1 t2 rd# t3 t4 d description min max unit time description min max unit t1 rd active pulse width 50 ns t2 rd to rd pre-charge time 50 ns t3 rd active to valid data 30 ns t4 valid data hold time from rd inactive 10 ns t5 rd inactive to rxf# 5 25 ns t6 rxf inactive after rd cycle 80 ns DLP-USB1 timing diagram ? fifo write cycle time description min max unit t7 wr active pulse width 50 ns t8 wr to wr pre-charge time 50 ns t9 data setup time before wr inactive 20 ns t10 data hold time from wr inactive 10 ns t11 wr inactive to txe# 5 25 ns t12 txe inactive after rd cycle 80 ns valid data d[7..0] valid data d[7..0] t10 t9 txe# wr t11 t12 t7 t8
revision 1.5 - 5 - mechanical drawings (preliminary) inches(millimeters) unless otherwise noted 1.0 typ . (25.4 typ.) 1.2 typ . (30.5 typ.) 0.1 typ . (2.54 typ.) 2.0 typ . (50.8 typ.) 0.2 typ . (5.1 typ.) 0.135 typ . (3.4 typ.) 0.65 typ . (16.5 typ.) 0.48 typ . (12.2 typ.) 0.50 typ . (12.7 typ.) 0.425 typ . (10.8 typ.) 0.125 typ . (3.2 typ.) 0.6 typ . (15.24 typ.) .0252 typ . (.64 typ.)
revision 1.5 - 6 - absolute maximum ratings storage temperature -6 5c to + 150c ambient temperature ( power applied ) 0c to + 70c vcc supply voltage -0.5v to +6.00v dc input voltage - inputs -0.5v to vcc + 0.5v dc input voltage - high impedance bidirectionals -0.5v to vcc + 0.5v dc output current ? outputs 24ma dc output current ? low impedance bidirectionals 24ma dc characteristics ( ambient temperature = 0 - 70 degrees c ) description min max units condition vcc operating supply voltage 4.5 5.25 v icc1 operating supply current 50 ma normal operation icc2 operating supply current 250 ** ua usb suspend ioh1 digital io pins source current 4 ma voh = vcc ? 0.5v iol1 digital io pins sink current 4 ma vol = + 0.5v voh1 input voltage threshold ( low ) 0.6 v vol1 input voltage threshold ( high ) 2.7 v vdif usb differential input sensitivity 0.2 v vcom usb differential common mode 0.8 2.5 v urxt usb single ended rx threshold 0.8 2.0 v uvh usb io pins static output ( low ) 0.3 v rl = 1.5k to 3.6v uvl usb io pins static output ( high ) 2.8 rl = 15k to gnd ** s ome early samples may exhibit a slightly higher current. disclaimer neither the whole nor any part of the information contained in, or the product described in this datasheet, may be adapted or reproduced in any material or electronic form without the prior written consent of the copyright holder. this product and its documentation are supplied on an as is basis and no warranty as to their suitability for any particular purpose is either made or implied. dlp design will not accept any claim for damages howsoever arising as a result of use or failure of this product. your statutory rights are not affected. this product or any variant of it is not intended for use in any medical appliance , device or system in which the failure of the product might reasonably be expected to result in personal injury. this document provides preliminary information that may be subject to change without notice. contact information dlp design po box 503762 san diego, ca 92150-3762 phone: 858-513-2777 fax: 858-513-2777 email: support@dlpdesign.com internet: http://www.dlpdesign.com
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