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TPC8403 2003-02-18 1 toshiba field effect transistor silicon p, n channel mos type (p channel u-mosii/n channel u-mosii) TPC8403 motor dreive notebook pc portable machines and tools low drain-source on resistance: p channel r ds (on) = 45 m ? (typ.) n channel r ds (on) = 25 m ? (typ.) high forward transfer admittance: p channel |y fs | = 6.2 s (typ.) n channel |y fs | = 7.8 s (typ.) low leakage current: p channel i dss = ?1 0 a (v ds = ? 30 v) n channel i dss = 1 0 a (v ds = 30 v) enhancement-mode : p channel v th = ?1 .0~ ? 2.2 v (v ds = ?1 0 v, i d = ?1 ma) : n channel v th = 1 .3~2.5 v (v ds = 1 0 v, i d = 1 ma) maximum ratings (ta 25c) rating characteristics symbol p channel n channel unit drain-source voltage v dss 30 30 v drain-gate voltage (r gs 20 k ) v dgr 30 30 v gate-source voltage v gss 20 20 v dc (note 1) i d 4.5 6 drain current pulse (note 1) i dp 18 24 a single-device operation (note 3a) p d(1) 1.5 1.5 drain power dissipation (t 10s) (note 2a) single-device value at dual operation (note 3b) p d(2) 1.1 1.1 single-device operation (note 3a) p d(1) 0.75 0.75 drain power dissipation (t 10s) (note 2b) single-device value at dual operation (note 3b) p d(2) 0.45 0.45 w single pulse avalanche energy e as 26.3 (note 4a) 46.8 (note 4b) mj avalanche current i ar 4.5 6 a repetitive avalanche energy single-device value at operation (note 2a, 3b, 5) e ar 0.11 mj channel temperature t ch 150 c storage temperature range t stg 55~150 c note: (note 1), (note 2ab), (note 3ab), (note 4), (note 5) please see next page. this transistor is an electrostatic sensitive device. please handle with caution. unit: mm jedec D jeita D toshiba 2-6j1e weight: 0.080 g (typ.) circuit configuration 8 7 6 5 1 2 3 4 n-ch p-ch
TPC8403 2003-02-18 2 thermal characteristics characteristics symbol max unit single-device operation (note 3a) r th (ch-a) (1) 83.3 thermal resistance, channel to ambient (t 10s) (note 2a) single-device value at dual operation (note 3b) r th (ch-a) (2) 114 single-device operation (note 2a) r th (ch-a) (1) 167 thermal resistance, channel to ambient (t 10s) (note 2b) single-device value at dual operation (note 2b) r th (ch-a) (2) 278 c/w marking note 1: please use devices on condition that the channel temperature is below 150c. note 2: a) device mounted on a glass-epoxy board (a) b) device mounted on a glass-epoxy board (b) note 3: a) the power dissipation and thermal resistance values are shown for a single device (during single-device operation, power is only applied to one device.). b) the power dissipation and thermal resistance values are shown for a single device (during dual operation, power is evenly applied to both devices.). note 4: a) v dd 24 v, t ch 25c (initial), l 1.0 mh, r g 25 , i ar 4.5 a b) v dd 24 v, t ch 25c (initial), l 1.0 mh, r g 25 , i ar 6.0 a note 5: repetitive rating; pulse width limited by max channel temperature. note 6: on lower left of the marking indicates pin 1. type TPC8403 fr-4 25.4 25.4 0.8 (unit: mm) (a) fr-4 25.4 25.4 0.8 (unit: mm) (b) lot no. weekly code: (three digits) week of manufacture (01 for first week of year, continues up to 52 or 53) year of manufacture (one low-order digits of calendar year)
TPC8403 2003-02-18 3 p-ch electrical characteristics (ta 25c) characteristics symbol test condition min typ. max unit gate leakage current i gss v gs 16 v, v ds 0 v 10 a drain cut-off current i dss v ds 30 v, v gs 0 v 10 a v (br) dss i d 10 ma, v gs 0 v 30 drain-source breakdown voltage v (br) dsx i d 10 ma, v gs 20 v 15 v gate threshold voltage v th v ds 10 v, i d 1 ma 1.0 2.2 v v gs 4.5 v, i d 2.2 a 66 90 drain-source on resistance r ds (on) v gs 10 v, i d 2.2 a 45 55 m forward transfer admittance |y fs | v ds 10 v, i d 2.2 a 3.1 6.2 s input capacitance c iss 940 reverse transfer capacitance c rss 270 output capacitance c oss v ds 10 v, v gs 0 v, f 1 mhz 390 pf rise time t r 13 turn-on time t on 21 fall time t f 25 switching time turn-off time t off duty 1%, t w 10 s 73 ns total gate charge (gate-source plus gate-drain) q g 18 gate-source charge 1 q gs 1 4 gate-drain (?miller?) charge q gd v dd
24 v, v gs 10 v, i d 4.5 a 4 nc source-drain ratings and characteristics (ta 25c) characteristics symbol test condition min typ. max unit drain reverse current pulse (note 1) i drp 18 a forward voltage (diode) v dsf i dr 4.5 a, v gs 0 v 1.2 v r l 6.8 v dd
15 v 10 v v gs 0 v 4.7 i d 2.2 a v out
TPC8403 2003-02-18 4 n-ch electrical characteristics (ta 25c) characteristics symbol test condition min typ. max unit gate leakage current i gss v gs 16 v, v ds 0 v 10 a drain cut-off current i dss v ds 30 v, v gs 0 v 10 a v (br) dss i d 10 ma, v gs 0 v 30 drain-source breakdown voltage v (br) dsx i d 10 ma, v gs 20 v 15 v gate threshold voltage v th v ds 10 v, i d 1 ma 1.3 2.5 v v gs 4.5 v, i d 3 a 38 46 drain-source on resistance r ds (on) v gs 10 v, i d 3 a 25 33 m forward transfer admittance |y fs | v ds 10 v, i d 3 a 3.9 7.8 s input capacitance c iss 850 reverse transfer capacitance c rss 180 output capacitance c oss v ds 10 v, v gs 0 v, f 1 mhz 270 pf rise time t r 11 turn-on time t on 18 fall time t f 6.5 switching time turn-off time t off duty 1%, t w 10 s 27 ns total gate charge (gate-source plus gate-drain) q g 17 gate-source charge 1 q gs 1 3 gate-drain (?miller?) charge q gd v dd
24 v, v gs 10 v, i d 6 a 4 nc source-drain ratings and characteristics (ta 25c) characteristics symbol test condition min typ. max unit drain reverse current pulse (note 1) i drp 24 a forward voltage (diode) v dsf i dr 6 a, v gs 0 v 1.2 v r l 5.0 v dd
15 v 0 v v gs 10 v 4.7 i d 3.0 a v out
TPC8403 2003-02-18 5 p-ch 0.1 0.1 1 10 100 1 10 100 common source v ds 10 v ta 55c 25c ta 100c 0.3 0.5 3 5 30 50 0.3 3 30 1 0.1 1 100 10 100 3 5 30 50 10 common source ta 25c pulse test v gs 4.5 v v gs 10 v 0.3 3 30 0 0 2 3 5 6 6 18 1 2 10 14 ta 100oc 55oc 25oc common source v ds 10 v pulse test 0 0 2 4 6 8 10 0.1 0.3 0.5 0.6 12 0.2 0.4 common source ta 25c pulse test 2.2 a i d 4.5 a 1.3a 0 1 2 3 4 5 0 2 4 6 8 10 v gs 2.2 v 2.4 v 2.6 v 2.8 v 3 v 3.2 v 4 v 3.6 v 10 v 8 v common source ta 25c pulse test 3.4 v 6 v common source ta 25c pulse test 0 0.2 0.4 0.6 0.8 1.0 0 1 2 3 4 5 v gs 2.2 v 2.4 v 2.6 v 2.8 v 3 v 3.2 v 4 v 6 v 10 v 8 v i d ? v ds i d ? v ds i d ? v gs v ds ? v gs |y fs | ? i d r ds (on) ? i d forward transfer admittance y fs (s) drain-source voltage v ds (v) drain-source voltage v ds (v) drain current i d (a) drain-source voltage v ds (v) drain current i d (a) gate-source voltage v gs (v) drain current i d (a) gate-source voltage v gs (v) drain current i d (a) drain current i d (a) drain-source on resistance r ds (on) (m )
TPC8403 2003-02-18 6 p-ch 1 0.1 1 10 100 10 100 1000 10000 0.3 3 30 common source ta 25c f 1mhz v gs 0 v c iss c oss c rss 0 80 0 160 80 1 2 3 40 40 120 common source v ds 10 v i d 1 ma pulse test 0 80 60 100 120 80 40 20 0 40 40 80 120 160 common source pulse test 1.3 a v gs 4.5 v v gs 10 v i d 4.5 a 2.2 a i d 4.5 a 1.3 a 2.2 a r ds (on) ? ta i dr ? v ds capacitance ? v ds v th ? ta p d ? ta dynamic input/output characteristics drain power dissipation p d (w) gate threshold voltage v th (v) ambient temperature ta (c) drain-source on resistance r ds (on) (m ) drain-source voltage v ds (v) drain-source voltage v ds (v) capacitance c (pf) ambient temperature ta (c) ambient temperature ta (c) drain-source voltage v ds (v) gate-source voltage v gs (v) total gate charge q g (nc) drain reverse current i dr (a) common source ta 25c pulse test v gs 0 v 0.1 0 0.2 0.4 0.6 0.8 1.2 0.3 0.5 1 10 3 5 1.0 10 3 5 1 0 8 16 24 32 16 12 8 4 0 common source i d 4.5 a ta 25c pulse test v dd 24 v v gs 40 30 20 10 0 0 0 0.4 0.8 1.2 1.6 2 40 80 200 160 120 device mounted on a glass-epoxy board ( a) (note 2a) (1) single-device operation (note 3a) (2) single-device value at dual operation (note 3b) device mounted on a glass-epoxy board (b) (note 2b) (3) single-device operation (note 3a) (4) single-device value at dual operation (note 3b) t 10 s (1) (2) (3) (4)
TPC8403 2003-02-18 7 p-ch 0.1 0.001 0.01 0.1 1 10 100 1000 1 0.3 0.5 3 5 10 30 50 100 300 1000 500 (1) single pulse (2) (3) (4) device mounted on a glass-epoxy board (a) (note 2a) (1) single-device operation (note 3a) (2) single-device value at dual operation (note 3b) device mounted on a glass-epoxy board (b) (note 2b) (3) single-device operation (note 3a) (4) single-device value at dual operation (note 3b) r th t w pulse width t w (s) drain-source voltage v ds (v) normalized transient thermal impedance r th (c/w) drain current i d (a) safe operating area 0.01 0.01 0.1 1 10 100 0.1 1 10 100 * single pulse ta 25c curves must be derated linearly with increase in temperature. i d max (pulse) * 10 ms * 1 ms * v dss max single-device value at dual operation (note 3b)
TPC8403 2003-02-18 8 n-ch 0.1 0.1 1 10 100 1 10 100 0.3 0.5 3 5 30 50 0.3 3 30 common source v ds 10 v pulse test ta 55c ta 25c ta 100c 1 0.1 1 100 10 100 3 5 30 50 10 common source ta 25c pulse test v gs 10 v v gs 4.5 v 0.3 3 30 0 0 2 4 6 8 10 0.1 0.3 0.5 0.6 12 0.2 0.4 3 a 1.5 a common source ta 25c pulse test i d 6 a 0 0 2 3 5 6 8 20 1 16 4 12 100oc ta 55oc 25oc common source v ds 10 v pulse test i d ? v ds i d ? v ds i d ? v gs v ds ? v gs |y fs | ? i d r ds (on) ? i d forward transfer admittance y fs (s) drain-source voltage v ds (v) drain-source voltage v ds (v) drain current i d (a) drain-source voltage v ds (v) drain current i d (a) gate-source voltage v gs (v) drain current i d (a) gate-source voltage v gs (v) drain current i d (a) drain current i d (a) drain-source on resistance r ds (on) (m ) 0 0.2 0.4 0.6 0.8 1.0 0 2 4 6 8 10 common source ta 25c pulse test v gs 2.6 v 2.8 v 2.9 v 3 v 3.1 v 3.2 v 3.3 v 3.4 v 3.6 v 4 v 6 v 10 v 8 v 0123 4 5 0 4 8 12 16 20 v gs 2.6 v 2.8 v 3 v 3.2 v 3.4 v 10 v common source ta 25c pulse test 3.6 v 3.8 v 4 v 6 v 8 v
TPC8403 2003-02-18 9 n-ch 0 0 10 20 30 40 8 16 24 32 16 12 8 4 0 v dd 24 v common source i d 6 a ta 25c pulse test v gs 0 80 0 160 80 1 2 3 common source v ds 10 v i d 1 ma pulse test 40 40 120 1 0.1 1 10 100 10 100 1000 10000 common source ta 25c f 1mhz v gs 0 v c iss c oss c rss 0.3 3 30 0 80 50 30 10 0 40 40 80 120 160 60 40 20 common source pulse test v gs 4.5 v 6 a v gs 10 v i d 1.5 a 3 a 6 a i d 1.5 a 3 a r ds (on) ? ta i dr ? v ds capacitance ? v ds v th ? ta p d ? ta gate-source voltage v gs (v) dynamic input/output characteristics drain power dissipation p d (w) gate threshold voltage v th (v) ambient temperature ta (c) drain-source on resistance r ds (on) (m ) drain-source voltage v ds (v) drain reverse current i dr (a) drain-source voltage v ds (v) capacitance c (pf) ambient temperature ta (c) ambient temperature ta (c) total gate charge q g (nc) drain-source voltage v ds (v) 0.1 0 0.2 0.4 0.6 0.8 1.2 0.3 0.5 1 10 3 5 1.0 30 common source ta 25c pulse test 10 5 3 1 v gs 0 v 0 0 0.4 0.8 1.2 1.6 2 40 80 200 160 120 device mounted on a glass-epoxy board ( a) (note 2a) (1) single-device operation (note 3a) (2) single-device value at dual operation (note 3b) device mounted on a glass-epoxy board (b) (note 2b) (3) single-device operation (note 3a) (4) single-device value at dual operation (note 3b) t 10 s (1) (2) (3) (4)
TPC8403 2003-02-18 10 n-ch r th t w pulse width t w (s) drain-source voltage v ds (v) normalized transient thermal impedance r th (c/w) drain current i d (a) safe operating area 0.1 0.001 0.01 0.1 1 10 100 1000 1 0.3 0.5 3 5 10 30 50 100 300 1000 500 (1) (2) (3) (4) device mounted on a glass-epoxy board (a) (note 2a) (1) single-device operation (note 3a) (2) single-device value at dual operation (note 3b) device mounted on a glass-epoxy board (b) (note 2b) (3) single-device operation (note 3a) (4) single-device value at dual operation (note 3b) single pulse 0.01 0.01 0.1 1 10 100 0.1 1 10 100 * single pulse ta 25c curves must be derated linearly with increase in temperature. i d max (pulse) * 10 ms * 1 ms * v dss max single-device value at dual operation (note 3b)
TPC8403 2003-02-18 11 toshiba is continually working to improve the quality and reliability of its products. nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. it is the responsibility of the buyer, when utilizing toshiba products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury or damage to property. in developing your designs, please ensure that toshiba products are used within specified operating ranges as set forth in the most recent toshiba products specifications. also, please keep in mind the precautions and conditions set forth in the ?handling guide for semiconductor devices,? or ?toshiba semiconductor reliability handbook? etc.. the toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (?unintended usage?). unintended usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. unintended usage of toshiba products listed in this document shall be made at the customer?s own risk. the information contained herein is presented only as a guide for the applications of our products. no responsibility is assumed by toshiba corporation for any infringements of intellectual property or other rights of the third parties which may result from its use. no license is granted by implication or otherwise under any intellectual property or other rights of toshiba corporation or others. the information contained herein is subject to change without notice. 000707ea a restrictions on product use

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